xref: /titanic_41/usr/src/uts/common/io/ixgbe/ixgbe_api.c (revision 47cd5876b2168926dea28a62f1857b167da29d6c)
1 /*
2  * CDDL HEADER START
3  *
4  * Copyright(c) 2007-2008 Intel Corporation. All rights reserved.
5  * The contents of this file are subject to the terms of the
6  * Common Development and Distribution License (the "License").
7  * You may not use this file except in compliance with the License.
8  *
9  * You can obtain a copy of the license at:
10  *      http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When using or redistributing this file, you may do so under the
15  * License only. No other modification of this header is permitted.
16  *
17  * If applicable, add the following below this CDDL HEADER, with the
18  * fields enclosed by brackets "[]" replaced with your own identifying
19  * information: Portions Copyright [yyyy] [name of copyright owner]
20  *
21  * CDDL HEADER END
22  */
23 
24 /*
25  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
26  * Use is subject to license terms of the CDDL.
27  */
28 
29 /* IntelVersion: 1.99 v2008-09-12 */
30 
31 #include "ixgbe_api.h"
32 #include "ixgbe_common.h"
33 #ident "$Id: ixgbe_api.c,v 1.99 2008/08/22 16:30:26 mrchilak Exp $"
34 
35 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
36 
37 /*
38  * ixgbe_init_shared_code - Initialize the shared code
39  * @hw: pointer to hardware structure
40  *
41  * This will assign function pointers and assign the MAC type and PHY code.
42  * Does not touch the hardware. This function must be called prior to any
43  * other function in the shared code. The ixgbe_hw structure should be
44  * memset to 0 prior to calling this function.  The following fields in
45  * hw structure should be filled in prior to calling this function:
46  * hw_addr, back, device_id, vendor_id, subsystem_device_id,
47  *  subsystem_vendor_id, and revision_id
48  */
49 s32
50 ixgbe_init_shared_code(struct ixgbe_hw *hw)
51 {
52 	s32 status;
53 
54 	/*
55 	 * Set the mac type
56 	 */
57 	(void) ixgbe_set_mac_type(hw);
58 
59 	switch (hw->mac.type) {
60 	case ixgbe_mac_82598EB:
61 		status = ixgbe_init_ops_82598(hw);
62 		break;
63 	default:
64 		status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
65 		break;
66 	}
67 
68 	return (status);
69 }
70 
71 /*
72  * ixgbe_set_mac_type - Sets MAC type
73  * @hw: pointer to the HW structure
74  *
75  * This function sets the mac type of the adapter based on the
76  * vendor ID and device ID stored in the hw structure.
77  */
78 s32
79 ixgbe_set_mac_type(struct ixgbe_hw *hw)
80 {
81 	s32 ret_val = IXGBE_SUCCESS;
82 
83 	DEBUGFUNC("ixgbe_set_mac_type\n");
84 
85 	if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) {
86 		switch (hw->device_id) {
87 		case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
88 		case IXGBE_DEV_ID_82598AF_DUAL_PORT:
89 		case IXGBE_DEV_ID_82598AT:
90 		case IXGBE_DEV_ID_82598EB_CX4:
91 		case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
92 		case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
93 		case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
94 		case IXGBE_DEV_ID_82598EB_XF_LR:
95 		case IXGBE_DEV_ID_82598EB_SFP_LOM:
96 			hw->mac.type = ixgbe_mac_82598EB;
97 			break;
98 		default:
99 			ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
100 			break;
101 		}
102 	} else {
103 		ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
104 	}
105 
106 	DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
107 	    hw->mac.type, ret_val);
108 
109 	return (ret_val);
110 }
111 
112 /*
113  * ixgbe_init_hw - Initialize the hardware
114  * @hw: pointer to hardware structure
115  *
116  * Initialize the hardware by resetting and then starting the hardware
117  */
118 s32
119 ixgbe_init_hw(struct ixgbe_hw *hw)
120 {
121 	return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
122 	    IXGBE_NOT_IMPLEMENTED);
123 }
124 
125 /*
126  * ixgbe_reset_hw - Performs a hardware reset
127  * @hw: pointer to hardware structure
128  *
129  * Resets the hardware by resetting the transmit and receive units, masks and
130  * clears all interrupts, performs a PHY reset, and performs a MAC reset
131  */
132 s32
133 ixgbe_reset_hw(struct ixgbe_hw *hw)
134 {
135 	return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
136 	    IXGBE_NOT_IMPLEMENTED);
137 }
138 
139 /*
140  * ixgbe_start_hw - Prepares hardware for Rx/Tx
141  * @hw: pointer to hardware structure
142  *
143  * Starts the hardware by filling the bus info structure and media type,
144  * clears all on chip counters, initializes receive address registers,
145  * multicast table, VLAN filter table, calls routine to setup link and
146  * flow control settings, and leaves transmit and receive units disabled
147  * and uninitialized.
148  */
149 s32
150 ixgbe_start_hw(struct ixgbe_hw *hw)
151 {
152 	return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
153 	    IXGBE_NOT_IMPLEMENTED);
154 }
155 
156 /*
157  * ixgbe_clear_hw_cntrs - Clear hardware counters
158  * @hw: pointer to hardware structure
159  *
160  * Clears all hardware statistics counters by reading them from the hardware
161  * Statistics counters are clear on read.
162  */
163 s32
164 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
165 {
166 	return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
167 	    IXGBE_NOT_IMPLEMENTED);
168 }
169 
170 /*
171  * ixgbe_get_media_type - Get media type
172  * @hw: pointer to hardware structure
173  *
174  * Returns the media type (fiber, copper, backplane)
175  */
176 enum ixgbe_media_type
177 ixgbe_get_media_type(struct ixgbe_hw *hw)
178 {
179 	return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
180 	    ixgbe_media_type_unknown);
181 }
182 
183 /*
184  * ixgbe_get_mac_addr - Get MAC address
185  * @hw: pointer to hardware structure
186  * @mac_addr: Adapter MAC address
187  *
188  * Reads the adapter's MAC address from the first Receive Address Register
189  * (RAR0) A reset of the adapter must have been performed prior to calling
190  * this function in order for the MAC address to have been loaded from the
191  * EEPROM into RAR0
192  */
193 s32
194 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
195 {
196 	return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
197 	    (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
198 }
199 
200 /*
201  * ixgbe_get_bus_info - Set PCI bus info
202  * @hw: pointer to hardware structure
203  *
204  * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
205  */
206 s32
207 ixgbe_get_bus_info(struct ixgbe_hw *hw)
208 {
209 	return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
210 	    IXGBE_NOT_IMPLEMENTED);
211 }
212 
213 /*
214  * ixgbe_get_num_of_tx_queues - Get Tx queues
215  * @hw: pointer to hardware structure
216  *
217  * Returns the number of transmit queues for the given adapter.
218  */
219 u32
220 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
221 {
222 	return (hw->mac.max_tx_queues);
223 }
224 
225 /*
226  * ixgbe_get_num_of_rx_queues - Get Rx queues
227  * @hw: pointer to hardware structure
228  *
229  * Returns the number of receive queues for the given adapter.
230  */
231 u32
232 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
233 {
234 	return (hw->mac.max_rx_queues);
235 }
236 
237 /*
238  * ixgbe_stop_adapter - Disable Rx/Tx units
239  * @hw: pointer to hardware structure
240  *
241  * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
242  * disables transmit and receive units. The adapter_stopped flag is used by
243  * the shared code and drivers to determine if the adapter is in a stopped
244  * state and should not touch the hardware.
245  */
246 s32
247 ixgbe_stop_adapter(struct ixgbe_hw *hw)
248 {
249 	return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
250 	    IXGBE_NOT_IMPLEMENTED);
251 }
252 
253 /*
254  * ixgbe_read_pba_num - Reads part number from EEPROM
255  * @hw: pointer to hardware structure
256  * @pba_num: stores the part number from the EEPROM
257  *
258  * Reads the part number from the EEPROM.
259  */
260 s32
261 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
262 {
263 	return (ixgbe_read_pba_num_generic(hw, pba_num));
264 }
265 
266 /*
267  * ixgbe_identify_phy - Get PHY type
268  * @hw: pointer to hardware structure
269  *
270  * Determines the physical layer module found on the current adapter.
271  */
272 s32
273 ixgbe_identify_phy(struct ixgbe_hw *hw)
274 {
275 	s32 status = IXGBE_SUCCESS;
276 
277 	if (hw->phy.type == ixgbe_phy_unknown) {
278 		status = ixgbe_call_func(hw,
279 		    hw->phy.ops.identify,
280 		    (hw),
281 		    IXGBE_NOT_IMPLEMENTED);
282 	}
283 
284 	return (status);
285 }
286 
287 /*
288  * ixgbe_reset_phy - Perform a PHY reset
289  * @hw: pointer to hardware structure
290  */
291 s32
292 ixgbe_reset_phy(struct ixgbe_hw *hw)
293 {
294 	s32 status = IXGBE_SUCCESS;
295 
296 	if (hw->phy.type == ixgbe_phy_unknown) {
297 		if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) {
298 			status = IXGBE_ERR_PHY;
299 		}
300 	}
301 
302 	if (status == IXGBE_SUCCESS) {
303 		status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
304 		    IXGBE_NOT_IMPLEMENTED);
305 	}
306 	return (status);
307 }
308 
309 /*
310  * ixgbe_get_phy_firmware_version -
311  * @hw: pointer to hardware structure
312  * @firmware_version: pointer to firmware version
313  */
314 s32
315 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
316 {
317 	s32 status = IXGBE_SUCCESS;
318 
319 	status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
320 	    (hw, firmware_version), IXGBE_NOT_IMPLEMENTED);
321 	return (status);
322 }
323 
324 /*
325  * ixgbe_read_phy_reg - Read PHY register
326  * @hw: pointer to hardware structure
327  * @reg_addr: 32 bit address of PHY register to read
328  * @phy_data: Pointer to read data from PHY register
329  *
330  * Reads a value from a specified PHY register
331  */
332 s32
333 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
334 	u16 *phy_data)
335 {
336 	return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
337 	    device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
338 }
339 
340 /*
341  * ixgbe_write_phy_reg - Write PHY register
342  * @hw: pointer to hardware structure
343  * @reg_addr: 32 bit PHY register to write
344  * @phy_data: Data to write to the PHY register
345  *
346  * Writes a value to specified PHY register
347  */
348 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
349     u16 phy_data)
350 {
351 	return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
352 	    device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
353 }
354 
355 /*
356  * ixgbe_setup_phy_link - Restart PHY autoneg
357  * @hw: pointer to hardware structure
358  *
359  * Restart autonegotiation and PHY and waits for completion.
360  */
361 s32
362 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
363 {
364 	return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
365 	    IXGBE_NOT_IMPLEMENTED);
366 }
367 
368 /*
369  * ixgbe_check_phy_link - Determine link and speed status
370  * @hw: pointer to hardware structure
371  *
372  * Reads a PHY register to determine if link is up and the current speed for
373  * the PHY.
374  */
375 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
376     bool *link_up)
377 {
378 	return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
379 	    link_up), IXGBE_NOT_IMPLEMENTED);
380 }
381 
382 /*
383  * ixgbe_setup_phy_link_speed - Set auto advertise
384  * @hw: pointer to hardware structure
385  * @speed: new link speed
386  * @autoneg: true if autonegotiation enabled
387  *
388  * Sets the auto advertised capabilities
389  */
390 s32
391 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
392     bool autoneg,
393     bool autoneg_wait_to_complete)
394 {
395 	return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
396 	    autoneg, autoneg_wait_to_complete),
397 	    IXGBE_NOT_IMPLEMENTED);
398 }
399 
400 /*
401  * ixgbe_setup_link - Configure link settings
402  * @hw: pointer to hardware structure
403  *
404  * Configures link settings based on values in the ixgbe_hw struct.
405  * Restarts the link.  Performs autonegotiation if needed.
406  */
407 s32
408 ixgbe_setup_link(struct ixgbe_hw *hw)
409 {
410 	return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw),
411 	    IXGBE_NOT_IMPLEMENTED);
412 }
413 
414 /*
415  * ixgbe_check_link - Get link and speed status
416  * @hw: pointer to hardware structure
417  *
418  * Reads the links register to determine if link is up and the current speed
419  */
420 s32
421 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
422     bool *link_up, bool link_up_wait_to_complete)
423 {
424 	return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
425 	    link_up, link_up_wait_to_complete), IXGBE_NOT_IMPLEMENTED);
426 }
427 
428 /*
429  * ixgbe_setup_link_speed - Set link speed
430  * @hw: pointer to hardware structure
431  * @speed: new link speed
432  * @autoneg: true if autonegotiation enabled
433  *
434  * Set the link speed and restarts the link.
435  */
436 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
437     bool autoneg,
438     bool autoneg_wait_to_complete)
439 {
440 	return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed,
441 	    autoneg, autoneg_wait_to_complete),
442 	    IXGBE_NOT_IMPLEMENTED);
443 }
444 
445 /*
446  * ixgbe_get_link_capabilities - Returns link capabilities
447  * @hw: pointer to hardware structure
448  *
449  * Determines the link capabilities of the current configuration.
450  */
451 s32
452 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
453     bool *autoneg)
454 {
455 	return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
456 	    speed, autoneg), IXGBE_NOT_IMPLEMENTED);
457 }
458 
459 /*
460  * ixgbe_led_on - Turn on LEDs
461  * @hw: pointer to hardware structure
462  * @index: led number to turn on
463  *
464  * Turns on the software controllable LEDs.
465  */
466 s32
467 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
468 {
469 	return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
470 	    IXGBE_NOT_IMPLEMENTED);
471 }
472 
473 /*
474  * ixgbe_led_off - Turn off LEDs
475  * @hw: pointer to hardware structure
476  * @index: led number to turn off
477  *
478  * Turns off the software controllable LEDs.
479  */
480 s32
481 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
482 {
483 	return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
484 	    IXGBE_NOT_IMPLEMENTED);
485 }
486 
487 /*
488  * ixgbe_blink_led_start - Blink LEDs
489  * @hw: pointer to hardware structure
490  * @index: led number to blink
491  *
492  * Blink LED based on index.
493  */
494 s32
495 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
496 {
497 	return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
498 	    IXGBE_NOT_IMPLEMENTED);
499 }
500 
501 /*
502  * ixgbe_blink_led_stop - Stop blinking LEDs
503  * @hw: pointer to hardware structure
504  *
505  * Stop blinking LED based on index.
506  */
507 s32
508 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
509 {
510 	return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
511 	    IXGBE_NOT_IMPLEMENTED);
512 }
513 
514 /*
515  * ixgbe_init_eeprom_params - Initialize EEPROM parameters
516  * @hw: pointer to hardware structure
517  *
518  * Initializes the EEPROM parameters ixgbe_eeprom_info within the
519  * ixgbe_hw struct in order to set up EEPROM access.
520  */
521 s32
522 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
523 {
524 	return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
525 	    IXGBE_NOT_IMPLEMENTED);
526 }
527 
528 
529 /*
530  * ixgbe_write_eeprom - Write word to EEPROM
531  * @hw: pointer to hardware structure
532  * @offset: offset within the EEPROM to be written to
533  * @data: 16 bit word to be written to the EEPROM
534  *
535  * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
536  * called after this function, the EEPROM will most likely contain an
537  * invalid checksum.
538  */
539 s32
540 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
541 {
542 	return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
543 	    IXGBE_NOT_IMPLEMENTED);
544 }
545 
546 /*
547  * ixgbe_read_eeprom - Read word from EEPROM
548  * @hw: pointer to hardware structure
549  * @offset: offset within the EEPROM to be read
550  * @data: read 16 bit value from EEPROM
551  *
552  * Reads 16 bit value from EEPROM
553  */
554 s32
555 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
556 {
557 	return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
558 	    IXGBE_NOT_IMPLEMENTED);
559 }
560 
561 /*
562  * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
563  * @hw: pointer to hardware structure
564  * @checksum_val: calculated checksum
565  *
566  * Performs checksum calculation and validates the EEPROM checksum
567  */
568 s32
569 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
570 {
571 	return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
572 	    (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
573 }
574 
575 /*
576  * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
577  * @hw: pointer to hardware structure
578  */
579 s32
580 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
581 {
582 	return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
583 	    IXGBE_NOT_IMPLEMENTED);
584 }
585 
586 /*
587  * ixgbe_set_rar - Set Rx address register
588  * @hw: pointer to hardware structure
589  * @index: Receive address register to write
590  * @addr: Address to put into receive address register
591  * @vmdq: VMDq "set"
592  * @enable_addr: set flag that address is active
593  *
594  * Puts an ethernet address into a receive address register.
595  */
596 s32
597 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
598     u32 enable_addr)
599 {
600 	return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
601 	    enable_addr), IXGBE_NOT_IMPLEMENTED);
602 }
603 
604 /*
605  * ixgbe_clear_rar - Clear Rx address register
606  * @hw: pointer to hardware structure
607  * @index: Receive address register to write
608  *
609  * Puts an ethernet address into a receive address register.
610  */
611 s32
612 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
613 {
614 	return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
615 	    IXGBE_NOT_IMPLEMENTED);
616 }
617 
618 /*
619  * ixgbe_set_vmdq - Associate a VMDq index with a receive address
620  * @hw: pointer to hardware structure
621  * @rar: receive address register index to associate with VMDq index
622  * @vmdq: VMDq set or pool index
623  */
624 s32
625 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
626 {
627 	return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
628 	    IXGBE_NOT_IMPLEMENTED);
629 }
630 
631 /*
632  * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
633  * @hw: pointer to hardware structure
634  * @rar: receive address register index to disassociate with VMDq index
635  * @vmdq: VMDq set or pool index
636  */
637 s32
638 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
639 {
640 	return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
641 	    IXGBE_NOT_IMPLEMENTED);
642 }
643 
644 /*
645  * ixgbe_init_rx_addrs - Initializes receive address filters.
646  * @hw: pointer to hardware structure
647  *
648  * Places the MAC address in receive address register 0 and clears the rest
649  * of the receive address registers. Clears the multicast table. Assumes
650  * the receiver is in reset when the routine is called.
651  */
652 s32
653 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
654 {
655 	return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
656 	    IXGBE_NOT_IMPLEMENTED);
657 }
658 
659 /*
660  * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
661  * @hw: pointer to hardware structure
662  */
663 u32
664 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
665 {
666 	return (hw->mac.num_rar_entries);
667 }
668 
669 /*
670  * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
671  * @hw: pointer to hardware structure
672  * @addr_list: the list of new multicast addresses
673  * @addr_count: number of addresses
674  * @func: iterator function to walk the multicast address list
675  *
676  * The given list replaces any existing list. Clears the secondary addrs from
677  * receive address registers. Uses unused receive address registers for the
678  * first secondary addresses, and falls back to promiscuous mode as needed.
679  */
680 s32
681 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
682     u32 addr_count, ixgbe_mc_addr_itr func)
683 {
684 	return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
685 	    addr_list, addr_count, func),
686 	    IXGBE_NOT_IMPLEMENTED);
687 }
688 
689 /*
690  * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
691  * @hw: pointer to hardware structure
692  * @mc_addr_list: the list of new multicast addresses
693  * @mc_addr_count: number of addresses
694  * @func: iterator function to walk the multicast address list
695  *
696  * The given list replaces any existing list. Clears the MC addrs from receive
697  * address registers and the multicast table. Uses unused receive address
698  * registers for the first multicast addresses, and hashes the rest into the
699  * multicast table.
700  */
701 s32
702 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
703     u32 mc_addr_count, ixgbe_mc_addr_itr func)
704 {
705 	return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
706 	    mc_addr_list, mc_addr_count, func),
707 	    IXGBE_NOT_IMPLEMENTED);
708 }
709 
710 /*
711  * ixgbe_enable_mc - Enable multicast address in RAR
712  * @hw: pointer to hardware structure
713  *
714  * Enables multicast address in RAR and the use of the multicast hash table.
715  */
716 s32
717 ixgbe_enable_mc(struct ixgbe_hw *hw)
718 {
719 	return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
720 	    IXGBE_NOT_IMPLEMENTED);
721 }
722 
723 /*
724  * ixgbe_disable_mc - Disable multicast address in RAR
725  * @hw: pointer to hardware structure
726  *
727  * Disables multicast address in RAR and the use of the multicast hash table.
728  */
729 s32
730 ixgbe_disable_mc(struct ixgbe_hw *hw)
731 {
732 	return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
733 	    IXGBE_NOT_IMPLEMENTED);
734 }
735 
736 /*
737  * ixgbe_clear_vfta - Clear VLAN filter table
738  * @hw: pointer to hardware structure
739  *
740  * Clears the VLAN filer table, and the VMDq index associated with the filter
741  */
742 s32
743 ixgbe_clear_vfta(struct ixgbe_hw *hw)
744 {
745 	return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
746 	    IXGBE_NOT_IMPLEMENTED);
747 }
748 
749 /*
750  * ixgbe_set_vfta - Set VLAN filter table
751  * @hw: pointer to hardware structure
752  * @vlan: VLAN id to write to VLAN filter
753  * @vind: VMDq output index that maps queue to VLAN id in VFTA
754  * @vlan_on: boolean flag to turn on/off VLAN in VFTA
755  *
756  * Turn on/off specified VLAN in the VLAN filter table.
757  */
758 s32
759 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
760 {
761 	return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
762 	    vlan_on), IXGBE_NOT_IMPLEMENTED);
763 }
764 
765 /*
766  * ixgbe_setup_fc - Set flow control
767  * @hw: pointer to hardware structure
768  * @packetbuf_num: packet buffer number (0-7)
769  *
770  * Configures the flow control settings based on SW configuration.
771  */
772 s32
773 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num)
774 {
775 	return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw, packetbuf_num),
776 	    IXGBE_NOT_IMPLEMENTED);
777 }
778 
779 /*
780  * ixgbe_read_analog_reg8 - Reads 8 bit analog register
781  * @hw: pointer to hardware structure
782  * @reg: analog register to read
783  * @val: read value
784  *
785  * Performs write operation to analog register specified.
786  */
787 s32
788 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
789 {
790 	return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
791 	    val), IXGBE_NOT_IMPLEMENTED);
792 }
793 
794 /*
795  * ixgbe_write_analog_reg8 - Writes 8 bit analog register
796  * @hw: pointer to hardware structure
797  * @reg: analog register to write
798  * @val: value to write
799  *
800  * Performs write operation to Atlas analog register specified.
801  */
802 s32
803 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
804 {
805 	return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
806 	    val), IXGBE_NOT_IMPLEMENTED);
807 }
808 
809 /*
810  * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
811  * @hw: pointer to hardware structure
812  *
813  * Initializes the Unicast Table Arrays to zero on device load.  This
814  * is part of the Rx init addr execution path.
815  */
816 s32
817 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
818 {
819 	return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
820 	    IXGBE_NOT_IMPLEMENTED);
821 }
822 
823 /*
824  * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
825  * @hw: pointer to hardware structure
826  * @byte_offset: EEPROM byte offset to read
827  * @eeprom_data: value read
828  *
829  * Performs byte read operation to SFP module's EEPROM over I2C interface.
830  */
831 s32
832 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
833 {
834 	return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
835 	    (hw, byte_offset, eeprom_data),
836 	    IXGBE_NOT_IMPLEMENTED);
837 }
838 
839 /*
840  * ixgbe_get_supported_physical_layer - Returns physical layer type
841  * @hw: pointer to hardware structure
842  *
843  * Determines physical layer capabilities of the current configuration.
844  */
845 s32
846 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
847 {
848 	return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
849 	    (hw), IXGBE_NOT_IMPLEMENTED);
850 }
851