1 /* 2 * CDDL HEADER START 3 * 4 * Copyright(c) 2007-2008 Intel Corporation. All rights reserved. 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at: 10 * http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When using or redistributing this file, you may do so under the 15 * License only. No other modification of this header is permitted. 16 * 17 * If applicable, add the following below this CDDL HEADER, with the 18 * fields enclosed by brackets "[]" replaced with your own identifying 19 * information: Portions Copyright [yyyy] [name of copyright owner] 20 * 21 * CDDL HEADER END 22 */ 23 24 /* 25 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms of the CDDL. 27 */ 28 29 /* IntelVersion: 1.81 v2008-03-04 */ 30 31 #pragma ident "%Z%%M% %I% %E% SMI" 32 33 #include "ixgbe_api.h" 34 #include "ixgbe_common.h" 35 36 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 37 38 /* 39 * ixgbe_init_shared_code - Initialize the shared code 40 * @hw: pointer to hardware structure 41 * 42 * This will assign function pointers and assign the MAC type and PHY code. 43 * Does not touch the hardware. This function must be called prior to any 44 * other function in the shared code. The ixgbe_hw structure should be 45 * memset to 0 prior to calling this function. The following fields in 46 * hw structure should be filled in prior to calling this function: 47 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 48 * subsystem_vendor_id, and revision_id 49 */ 50 s32 51 ixgbe_init_shared_code(struct ixgbe_hw *hw) 52 { 53 s32 status; 54 55 /* 56 * Set the mac type 57 */ 58 (void) ixgbe_set_mac_type(hw); 59 60 switch (hw->mac.type) { 61 case ixgbe_mac_82598EB: 62 status = ixgbe_init_ops_82598(hw); 63 break; 64 default: 65 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 66 break; 67 } 68 69 return (status); 70 } 71 72 /* 73 * ixgbe_set_mac_type - Sets MAC type 74 * @hw: pointer to the HW structure 75 * 76 * This function sets the mac type of the adapter based on the 77 * vendor ID and device ID stored in the hw structure. 78 */ 79 s32 80 ixgbe_set_mac_type(struct ixgbe_hw *hw) 81 { 82 s32 ret_val = IXGBE_SUCCESS; 83 84 DEBUGFUNC("ixgbe_set_mac_type"); 85 86 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 87 switch (hw->device_id) { 88 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 89 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 90 case IXGBE_DEV_ID_82598EB_CX4: 91 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 92 case IXGBE_DEV_ID_82598EB_XF_LR: 93 hw->mac.type = ixgbe_mac_82598EB; 94 break; 95 default: 96 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 97 break; 98 } 99 } else { 100 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 101 } 102 103 return (ret_val); 104 } 105 106 /* 107 * ixgbe_init_hw - Initialize the hardware 108 * @hw: pointer to hardware structure 109 * 110 * Initialize the hardware by resetting and then starting the hardware 111 */ 112 s32 113 ixgbe_init_hw(struct ixgbe_hw *hw) 114 { 115 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 116 IXGBE_NOT_IMPLEMENTED); 117 } 118 119 /* 120 * ixgbe_reset_hw - Performs a hardware reset 121 * @hw: pointer to hardware structure 122 * 123 * Resets the hardware by resetting the transmit and receive units, masks and 124 * clears all interrupts, performs a PHY reset, and performs a MAC reset 125 */ 126 s32 127 ixgbe_reset_hw(struct ixgbe_hw *hw) 128 { 129 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 130 IXGBE_NOT_IMPLEMENTED); 131 } 132 133 /* 134 * ixgbe_start_hw - Prepares hardware for Rx/Tx 135 * @hw: pointer to hardware structure 136 * 137 * Starts the hardware by filling the bus info structure and media type, 138 * clears all on chip counters, initializes receive address registers, 139 * multicast table, VLAN filter table, calls routine to setup link and 140 * flow control settings, and leaves transmit and receive units disabled 141 * and uninitialized. 142 */ 143 s32 144 ixgbe_start_hw(struct ixgbe_hw *hw) 145 { 146 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 147 IXGBE_NOT_IMPLEMENTED); 148 } 149 150 /* 151 * ixgbe_clear_hw_cntrs - Clear hardware counters 152 * @hw: pointer to hardware structure 153 * 154 * Clears all hardware statistics counters by reading them from the hardware 155 * Statistics counters are clear on read. 156 */ 157 s32 158 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 159 { 160 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 161 IXGBE_NOT_IMPLEMENTED); 162 } 163 164 /* 165 * ixgbe_get_media_type - Get media type 166 * @hw: pointer to hardware structure 167 * 168 * Returns the media type (fiber, copper, backplane) 169 */ 170 enum ixgbe_media_type 171 ixgbe_get_media_type(struct ixgbe_hw *hw) 172 { 173 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 174 ixgbe_media_type_unknown); 175 } 176 177 /* 178 * ixgbe_get_mac_addr - Get MAC address 179 * @hw: pointer to hardware structure 180 * @mac_addr: Adapter MAC address 181 * 182 * Reads the adapter's MAC address from the first Receive Address Register 183 * (RAR0) A reset of the adapter must have been performed prior to calling 184 * this function in order for the MAC address to have been loaded from the 185 * EEPROM into RAR0 186 */ 187 s32 188 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 189 { 190 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 191 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 192 } 193 194 /* 195 * ixgbe_get_bus_info - Set PCI bus info 196 * @hw: pointer to hardware structure 197 * 198 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 199 */ 200 s32 201 ixgbe_get_bus_info(struct ixgbe_hw *hw) 202 { 203 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 204 IXGBE_NOT_IMPLEMENTED); 205 } 206 207 /* 208 * ixgbe_get_num_of_tx_queues - Get Tx queues 209 * @hw: pointer to hardware structure 210 * 211 * Returns the number of transmit queues for the given adapter. 212 */ 213 u32 214 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 215 { 216 return (hw->mac.max_tx_queues); 217 } 218 219 /* 220 * ixgbe_get_num_of_rx_queues - Get Rx queues 221 * @hw: pointer to hardware structure 222 * 223 * Returns the number of receive queues for the given adapter. 224 */ 225 u32 226 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 227 { 228 return (hw->mac.max_rx_queues); 229 } 230 231 /* 232 * ixgbe_stop_adapter - Disable Rx/Tx units 233 * @hw: pointer to hardware structure 234 * 235 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 236 * disables transmit and receive units. The adapter_stopped flag is used by 237 * the shared code and drivers to determine if the adapter is in a stopped 238 * state and should not touch the hardware. 239 */ 240 s32 241 ixgbe_stop_adapter(struct ixgbe_hw *hw) 242 { 243 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 244 IXGBE_NOT_IMPLEMENTED); 245 } 246 247 /* 248 * ixgbe_read_pba_num - Reads part number from EEPROM 249 * @hw: pointer to hardware structure 250 * @pba_num: stores the part number from the EEPROM 251 * 252 * Reads the part number from the EEPROM. 253 */ 254 s32 255 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 256 { 257 return (ixgbe_read_pba_num_generic(hw, pba_num)); 258 } 259 260 /* 261 * ixgbe_identify_phy - Get PHY type 262 * @hw: pointer to hardware structure 263 * 264 * Determines the physical layer module found on the current adapter. 265 */ 266 s32 267 ixgbe_identify_phy(struct ixgbe_hw *hw) 268 { 269 s32 status = IXGBE_SUCCESS; 270 271 if (hw->phy.type == ixgbe_phy_unknown) { 272 status = ixgbe_call_func(hw, 273 hw->phy.ops.identify, 274 (hw), 275 IXGBE_NOT_IMPLEMENTED); 276 } 277 278 return (status); 279 } 280 281 /* 282 * ixgbe_reset_phy - Perform a PHY reset 283 * @hw: pointer to hardware structure 284 */ 285 s32 286 ixgbe_reset_phy(struct ixgbe_hw *hw) 287 { 288 s32 status = IXGBE_SUCCESS; 289 290 if (hw->phy.type == ixgbe_phy_unknown) { 291 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) { 292 status = IXGBE_ERR_PHY; 293 } 294 } 295 296 if (status == IXGBE_SUCCESS) { 297 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 298 IXGBE_NOT_IMPLEMENTED); 299 } 300 return (status); 301 } 302 303 /* 304 * ixgbe_read_phy_reg - Read PHY register 305 * @hw: pointer to hardware structure 306 * @reg_addr: 32 bit address of PHY register to read 307 * @phy_data: Pointer to read data from PHY register 308 * 309 * Reads a value from a specified PHY register 310 */ 311 s32 312 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 313 u16 *phy_data) 314 { 315 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 316 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 317 } 318 319 /* 320 * ixgbe_write_phy_reg - Write PHY register 321 * @hw: pointer to hardware structure 322 * @reg_addr: 32 bit PHY register to write 323 * @phy_data: Data to write to the PHY register 324 * 325 * Writes a value to specified PHY register 326 */ 327 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 328 u16 phy_data) 329 { 330 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 331 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 332 } 333 334 /* 335 * ixgbe_setup_phy_link - Restart PHY autoneg 336 * @hw: pointer to hardware structure 337 * 338 * Restart autonegotiation and PHY and waits for completion. 339 */ 340 s32 341 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 342 { 343 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 344 IXGBE_NOT_IMPLEMENTED); 345 } 346 347 /* 348 * ixgbe_setup_phy_link_speed - Set auto advertise 349 * @hw: pointer to hardware structure 350 * @speed: new link speed 351 * @autoneg: TRUE if autonegotiation enabled 352 * 353 * Sets the auto advertised capabilities 354 */ 355 s32 356 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 357 bool autoneg, 358 bool autoneg_wait_to_complete) 359 { 360 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 361 autoneg, autoneg_wait_to_complete), 362 IXGBE_NOT_IMPLEMENTED); 363 } 364 365 /* 366 * ixgbe_setup_link - Configure link settings 367 * @hw: pointer to hardware structure 368 * 369 * Configures link settings based on values in the ixgbe_hw struct. 370 * Restarts the link. Performs autonegotiation if needed. 371 */ 372 s32 373 ixgbe_setup_link(struct ixgbe_hw *hw) 374 { 375 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw), 376 IXGBE_NOT_IMPLEMENTED); 377 } 378 379 /* 380 * ixgbe_check_link - Get link and speed status 381 * @hw: pointer to hardware structure 382 * 383 * Reads the links register to determine if link is up and the current speed 384 */ 385 s32 386 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 387 bool *link_up) 388 { 389 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 390 link_up), IXGBE_NOT_IMPLEMENTED); 391 } 392 393 /* 394 * ixgbe_setup_link_speed - Set link speed 395 * @hw: pointer to hardware structure 396 * @speed: new link speed 397 * @autoneg: TRUE if autonegotiation enabled 398 * 399 * Set the link speed and restarts the link. 400 */ 401 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 402 bool autoneg, 403 bool autoneg_wait_to_complete) 404 { 405 return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed, 406 autoneg, autoneg_wait_to_complete), 407 IXGBE_NOT_IMPLEMENTED); 408 } 409 410 /* 411 * ixgbe_get_link_capabilities - Returns link capabilities 412 * @hw: pointer to hardware structure 413 * 414 * Determines the link capabilities of the current configuration. 415 */ 416 s32 417 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 418 bool *autoneg) 419 { 420 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 421 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 422 } 423 424 /* 425 * ixgbe_led_on - Turn on LEDs 426 * @hw: pointer to hardware structure 427 * @index: led number to turn on 428 * 429 * Turns on the software controllable LEDs. 430 */ 431 s32 432 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 433 { 434 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 435 IXGBE_NOT_IMPLEMENTED); 436 } 437 438 /* 439 * ixgbe_led_off - Turn off LEDs 440 * @hw: pointer to hardware structure 441 * @index: led number to turn off 442 * 443 * Turns off the software controllable LEDs. 444 */ 445 s32 446 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 447 { 448 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 449 IXGBE_NOT_IMPLEMENTED); 450 } 451 452 /* 453 * ixgbe_blink_led_start - Blink LEDs 454 * @hw: pointer to hardware structure 455 * @index: led number to blink 456 * 457 * Blink LED based on index. 458 */ 459 s32 460 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 461 { 462 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 463 IXGBE_NOT_IMPLEMENTED); 464 } 465 466 /* 467 * ixgbe_blink_led_stop - Stop blinking LEDs 468 * @hw: pointer to hardware structure 469 * 470 * Stop blinking LED based on index. 471 */ 472 s32 473 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 474 { 475 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 476 IXGBE_NOT_IMPLEMENTED); 477 } 478 479 /* 480 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 481 * @hw: pointer to hardware structure 482 * 483 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 484 * ixgbe_hw struct in order to set up EEPROM access. 485 */ 486 s32 487 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 488 { 489 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 490 IXGBE_NOT_IMPLEMENTED); 491 } 492 493 494 /* 495 * ixgbe_write_eeprom - Write word to EEPROM 496 * @hw: pointer to hardware structure 497 * @offset: offset within the EEPROM to be written to 498 * @data: 16 bit word to be written to the EEPROM 499 * 500 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 501 * called after this function, the EEPROM will most likely contain an 502 * invalid checksum. 503 */ 504 s32 505 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 506 { 507 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 508 IXGBE_NOT_IMPLEMENTED); 509 } 510 511 /* 512 * ixgbe_read_eeprom - Read word from EEPROM 513 * @hw: pointer to hardware structure 514 * @offset: offset within the EEPROM to be read 515 * @data: read 16 bit value from EEPROM 516 * 517 * Reads 16 bit value from EEPROM 518 */ 519 s32 520 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 521 { 522 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 523 IXGBE_NOT_IMPLEMENTED); 524 } 525 526 /* 527 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 528 * @hw: pointer to hardware structure 529 * @checksum_val: calculated checksum 530 * 531 * Performs checksum calculation and validates the EEPROM checksum 532 */ 533 s32 534 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 535 { 536 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 537 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 538 } 539 540 /* 541 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 542 * @hw: pointer to hardware structure 543 */ 544 s32 545 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 546 { 547 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 548 IXGBE_NOT_IMPLEMENTED); 549 } 550 551 /* 552 * ixgbe_set_rar - Set Rx address register 553 * @hw: pointer to hardware structure 554 * @index: Receive address register to write 555 * @addr: Address to put into receive address register 556 * @vmdq: VMDq "set" 557 * @enable_addr: set flag that address is active 558 * 559 * Puts an ethernet address into a receive address register. 560 */ 561 s32 562 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 563 u32 enable_addr) 564 { 565 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 566 enable_addr), IXGBE_NOT_IMPLEMENTED); 567 } 568 569 /* 570 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 571 * @hw: pointer to hardware structure 572 * @rar: receive address register index to associate with VMDq index 573 * @vmdq: VMDq set or pool index 574 */ 575 s32 576 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 577 { 578 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 579 IXGBE_NOT_IMPLEMENTED); 580 } 581 582 /* 583 * ixgbe_init_rx_addrs - Initializes receive address filters. 584 * @hw: pointer to hardware structure 585 * 586 * Places the MAC address in receive address register 0 and clears the rest 587 * of the receive address registers. Clears the multicast table. Assumes 588 * the receiver is in reset when the routine is called. 589 */ 590 s32 591 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 592 { 593 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 594 IXGBE_NOT_IMPLEMENTED); 595 } 596 597 /* 598 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 599 * @hw: pointer to hardware structure 600 */ 601 u32 602 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 603 { 604 return (hw->mac.num_rar_entries); 605 } 606 607 /* 608 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 609 * @hw: pointer to hardware structure 610 * @addr_list: the list of new multicast addresses 611 * @addr_count: number of addresses 612 * @func: iterator function to walk the multicast address list 613 * 614 * The given list replaces any existing list. Clears the secondary addrs from 615 * receive address registers. Uses unused receive address registers for the 616 * first secondary addresses, and falls back to promiscuous mode as needed. 617 */ 618 s32 619 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 620 u32 addr_count, ixgbe_mc_addr_itr func) 621 { 622 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 623 addr_list, addr_count, func), 624 IXGBE_NOT_IMPLEMENTED); 625 } 626 627 /* 628 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 629 * @hw: pointer to hardware structure 630 * @mc_addr_list: the list of new multicast addresses 631 * @mc_addr_count: number of addresses 632 * @func: iterator function to walk the multicast address list 633 * 634 * The given list replaces any existing list. Clears the MC addrs from receive 635 * address registers and the multicast table. Uses unused receive address 636 * registers for the first multicast addresses, and hashes the rest into the 637 * multicast table. 638 */ 639 s32 640 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 641 u32 mc_addr_count, ixgbe_mc_addr_itr func) 642 { 643 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 644 mc_addr_list, mc_addr_count, func), 645 IXGBE_NOT_IMPLEMENTED); 646 } 647 648 /* 649 * ixgbe_enable_mc - Enable multicast address in RAR 650 * @hw: pointer to hardware structure 651 * 652 * Enables multicast address in RAR and the use of the multicast hash table. 653 */ 654 s32 655 ixgbe_enable_mc(struct ixgbe_hw *hw) 656 { 657 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 658 IXGBE_NOT_IMPLEMENTED); 659 } 660 661 /* 662 * ixgbe_disable_mc - Disable multicast address in RAR 663 * @hw: pointer to hardware structure 664 * 665 * Disables multicast address in RAR and the use of the multicast hash table. 666 */ 667 s32 668 ixgbe_disable_mc(struct ixgbe_hw *hw) 669 { 670 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 671 IXGBE_NOT_IMPLEMENTED); 672 } 673 674 /* 675 * ixgbe_clear_vfta - Clear VLAN filter table 676 * @hw: pointer to hardware structure 677 * 678 * Clears the VLAN filer table, and the VMDq index associated with the filter 679 */ 680 s32 681 ixgbe_clear_vfta(struct ixgbe_hw *hw) 682 { 683 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 684 IXGBE_NOT_IMPLEMENTED); 685 } 686 687 /* 688 * ixgbe_set_vfta - Set VLAN filter table 689 * @hw: pointer to hardware structure 690 * @vlan: VLAN id to write to VLAN filter 691 * @vind: VMDq output index that maps queue to VLAN id in VFTA 692 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 693 * 694 * Turn on/off specified VLAN in the VLAN filter table. 695 */ 696 s32 697 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 698 { 699 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 700 vlan_on), IXGBE_NOT_IMPLEMENTED); 701 } 702 703 /* 704 * ixgbe_setup_fc - Set flow control 705 * @hw: pointer to hardware structure 706 * @packetbuf_num: packet buffer number (0-7) 707 * 708 * Configures the flow control settings based on SW configuration. 709 */ 710 s32 711 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num) 712 { 713 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw, packetbuf_num), 714 IXGBE_NOT_IMPLEMENTED); 715 } 716 717 /* 718 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 719 * @hw: pointer to hardware structure 720 * @reg: analog register to read 721 * @val: read value 722 * 723 * Performs write operation to analog register specified. 724 */ 725 s32 726 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 727 { 728 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 729 val), IXGBE_NOT_IMPLEMENTED); 730 } 731 732 /* 733 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 734 * @hw: pointer to hardware structure 735 * @reg: analog register to write 736 * @val: value to write 737 * 738 * Performs write operation to Atlas analog register specified. 739 */ 740 s32 741 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 742 { 743 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 744 val), IXGBE_NOT_IMPLEMENTED); 745 } 746