xref: /titanic_41/usr/src/uts/common/io/iwi/ipw2200_impl.h (revision b02e9a2d4d2071d770e5aa9ae8f83f2bbe1f2ced)
1 /*
2  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 /*
7  * Copyright (c) 2004, 2005
8  *      Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice unmodified, this list of conditions, and the following
15  *    disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  */
32 
33 #ifndef _SYS_IPW2200_IMPL_H
34 #define	_SYS_IPW2200_IMPL_H
35 
36 #pragma ident	"%Z%%M%	%I%	%E% SMI"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
42 /*
43  * Intel Wireless PRO/2200 mini-pci adapter driver
44  * ipw2200_impl.h includes:
45  * 	. implementation of ipw2200
46  * 	. hardware operations and interface definations for ipw2200
47  * 	. firmware operations and interface definations for ipw2200
48  */
49 #include <sys/ddi.h>
50 #include <sys/sunddi.h>
51 #include <sys/mac.h>
52 #include <sys/mac_wifi.h>
53 #include <sys/net80211.h>
54 
55 /*
56  * Implementation of ipw2200
57  */
58 #define	IPW2200_PCI_CFG_RNUM 	(0) /* pci config space */
59 #define	IPW2200_PCI_CSR_RNUM 	(1) /* device CSR space */
60 #define	IPW2200_PCI_INTR_NUM	(0) /* interrupt number */
61 
62 #define	IPW2200_TX_RING_SIZE 	(64)
63 #define	IPW2200_CMD_RING_SIZE	(16)
64 #define	IPW2200_RX_RING_SIZE 	(32)
65 
66 struct dma_region {
67 	ddi_dma_handle_t	dr_hnd;
68 	ddi_acc_handle_t	dr_acc;
69 	ddi_dma_cookie_t	dr_cookie;
70 	uint_t			dr_ccnt;
71 	uint32_t		dr_pbase;
72 	caddr_t			dr_base;
73 	size_t			dr_size;
74 	const char		*dr_name;
75 };
76 
77 struct ipw2200_firmware {
78 	uint8_t			*boot_base; /* boot code */
79 	size_t			boot_size;
80 	uint8_t			*uc_base; /* u-controller code */
81 	size_t			uc_size;
82 	uint8_t			*fw_base; /* firmware code */
83 	size_t			fw_size;
84 };
85 
86 /*
87  * per-instance soft-state structure
88  */
89 struct ipw2200_softc {
90 	struct ieee80211com	sc_ic;
91 	dev_info_t		*sc_dip;
92 	int	(*sc_newstate)(struct ieee80211com *,
93 	    enum ieee80211_state, int);
94 	void    (*sc_node_free)(struct ieee80211com *);
95 	int			sc_authmode;
96 
97 	/* CSR */
98 	ddi_acc_handle_t	sc_ioh;
99 	caddr_t			sc_regs;
100 	/* mutex to protect interrupt handler */
101 	kmutex_t		sc_ilock;
102 	/* interrupt iblock cookie */
103 	ddi_iblock_cookie_t 	sc_iblk;
104 	/* soft interrupt */
105 	ddi_softintr_t		sc_link_softint;
106 	/* link status */
107 	int32_t			sc_linkstate;
108 	/* flags */
109 	uint32_t		sc_flags;
110 #define	IPW2200_FLAG_FW_CACHED		(1 << 0)
111 #define	IPW2200_FLAG_FW_INITED		(1 << 1)
112 #define	IPW2200_FLAG_RUNNING		(1 << 2)
113 #define	IPW2200_FLAG_LINK_CHANGE	(1 << 3)
114 #define	IPW2200_FLAG_TX_SCHED		(1 << 4)
115 #define	IPW2200_FLAG_SCANNING		(1 << 5)
116 #define	IPW2200_FLAG_HW_ERR_RECOVER	(1 << 6)
117 #define	IPW2200_FLAG_HAS_RADIO_SWITCH	(1 << 16)
118 	/* firmware download */
119 	int			sc_fw_ok;
120 	kcondvar_t		sc_fw_cond;
121 
122 	/* command desc ring */
123 	kmutex_t		sc_cmd_lock;
124 	kcondvar_t		sc_cmd_cond;
125 	uint32_t		sc_cmd_cur;
126 	uint32_t		sc_cmd_free;
127 	struct ipw2200_cmd_desc	*sc_cmdsc;
128 
129 	/* command status */
130 	int			sc_done[IPW2200_CMD_RING_SIZE];
131 	kcondvar_t		sc_cmd_status_cond;
132 
133 	/* tx ring, bd->hdr&buf */
134 	kmutex_t		sc_tx_lock;
135 	uint32_t		sc_tx_cur;
136 	uint32_t		sc_tx_free;
137 	struct ipw2200_tx_desc	*sc_txdsc;
138 	uint8_t			*sc_txbufs[IPW2200_TX_RING_SIZE];
139 
140 	/* rx ring */
141 	uint32_t		sc_rx_cur;
142 	uint32_t		sc_rx_free;
143 	uint8_t			*sc_rxbufs[IPW2200_RX_RING_SIZE];
144 
145 	/* tx-desc & tx-buffer array */
146 	struct dma_region	sc_dma_txdsc;
147 	struct dma_region	sc_dma_txbufs[IPW2200_TX_RING_SIZE];
148 	struct dma_region	sc_dma_cmdsc;
149 	/* rx-buffer array */
150 	struct dma_region	sc_dma_rxbufs[IPW2200_RX_RING_SIZE];
151 
152 	/* hw configuration values */
153 	uint8_t			sc_macaddr[IEEE80211_ADDR_LEN];
154 	/* MAC address string */
155 	char			sc_macstr[32];
156 
157 	/* firmware */
158 	struct ipw2200_firmware	sc_fw;
159 
160 	/* mfthread related, mfthread is used to handle asynchronous task */
161 	kthread_t		*sc_mf_thread;
162 	kmutex_t		sc_mflock;
163 	int			sc_mfthread_switch;
164 	kcondvar_t		sc_mfthread_req;
165 	kcondvar_t		sc_mfthread_cv;
166 
167 };
168 
169 /*
170  * RING_BACKWARD - move 'x' backward 's' steps in a 'b'- sized ring
171  * RING_FORWARD	 - move 'x' forward 's' steps in a 'b'- sized ring
172  *
173  * note that there must be 0 <= 'x' < 'b' && 0 <= 's' < 'b'
174  */
175 #define	RING_FLEN(x, y, b)	((((x) > (y)) ? ((b)+(y)-(x)) : ((y)-(x))))
176 #define	RING_FORWARD(x, s, b)	(((x)+(s))%(b))
177 #define	RING_BACKWARD(x, s, b)	RING_FORWARD((x), (b)-(s), (b))
178 
179 extern int ipw2200_init(struct ipw2200_softc *sc);
180 extern void ipw2200_wifi_ioctl(struct ipw2200_softc *, queue_t *,
181     mblk_t *, uint32_t);
182 extern int ipw2200_dma_region_alloc(struct ipw2200_softc *sc,
183     struct dma_region *dr, size_t size, uint_t dir, uint_t flags);
184 extern void ipw2200_dma_region_free(struct dma_region *dr);
185 extern int ipw2200_disable(struct ipw2200_softc *sc);
186 extern int ipw2200_start_scan(struct ipw2200_softc *sc);
187 
188 /*
189  * get radio off/on status
190  */
191 extern int ipw2200_radio_status(struct ipw2200_softc *sc);
192 
193 /*
194  * Below structure and functions will be used for statistic, which will be
195  * displayed when the wificonfig running...
196  */
197 struct statistic {
198 	int		index;
199 	const char	*desc;
200 };
201 extern void ipw2200_get_statistics(struct ipw2200_softc *sc);
202 
203 /*
204  * Hardware related definations and interfaces.
205  */
206 #define	IPW2200_CSR_INTR		(0x0008)
207 #define	IPW2200_CSR_INTR_MASK		(0x000c)
208 #define	IPW2200_CSR_INDIRECT_ADDR	(0x0010)
209 #define	IPW2200_CSR_INDIRECT_DATA	(0x0014)
210 #define	IPW2200_CSR_AUTOINC_ADDR	(0x0018)
211 #define	IPW2200_CSR_AUTOINC_DATA	(0x001c)
212 #define	IPW2200_CSR_RST			(0x0020)
213 #define	IPW2200_CSR_CTL			(0x0024)
214 #define	IPW2200_CSR_IO			(0x0030)
215 #define	IPW2200_CSR_CMD_BASE		(0x0200)
216 #define	IPW2200_CSR_CMD_SIZE		(0x0204)
217 #define	IPW2200_CSR_TX1_BASE		(0x0208)
218 #define	IPW2200_CSR_TX1_SIZE		(0x020c)
219 #define	IPW2200_CSR_TX2_BASE		(0x0210)
220 #define	IPW2200_CSR_TX2_SIZE		(0x0214)
221 #define	IPW2200_CSR_TX3_BASE		(0x0218)
222 #define	IPW2200_CSR_TX3_SIZE		(0x021c)
223 #define	IPW2200_CSR_TX4_BASE		(0x0220)
224 #define	IPW2200_CSR_TX4_SIZE		(0x0224)
225 #define	IPW2200_CSR_CMD_READ_INDEX	(0x0280)
226 #define	IPW2200_CSR_TX1_READ_INDEX	(0x0284)
227 #define	IPW2200_CSR_TX2_READ_INDEX	(0x0288)
228 #define	IPW2200_CSR_TX3_READ_INDEX	(0x028c)
229 #define	IPW2200_CSR_TX4_READ_INDEX	(0x0290)
230 #define	IPW2200_CSR_RX_READ_INDEX	(0x02a0)
231 #define	IPW2200_CSR_RX_BASE		(0x0500)
232 #define	IPW2200_CSR_TABLE0_SIZE		(0x0700)
233 #define	IPW2200_CSR_TABLE0_BASE		(0x0704)
234 #define	IPW2200_CSR_NODE_BASE		(0x0c0c)
235 #define	IPW2200_CSR_CMD_WRITE_INDEX	(0x0f80)
236 #define	IPW2200_CSR_TX1_WRITE_INDEX	(0x0f84)
237 #define	IPW2200_CSR_TX2_WRITE_INDEX	(0x0f88)
238 #define	IPW2200_CSR_TX3_WRITE_INDEX	(0x0f8c)
239 #define	IPW2200_CSR_TX4_WRITE_INDEX	(0x0f90)
240 #define	IPW2200_CSR_RX_WRITE_INDEX	(0x0fa0)
241 #define	IPW2200_CSR_READ_INT		(0x0ff4)
242 
243 #define	IPW2200_CSR_CURRENTT_TX_RATE	IPW2200_CSR_TABLE0_BASE
244 
245 /*
246  * CSR flags: IPW2200_CSR_INTR
247  */
248 #define	IPW2200_INTR_RX_TRANSFER	(0x00000002)
249 #define	IPW2200_INTR_CMD_TRANSFER	(0x00000800)
250 #define	IPW2200_INTR_TX1_TRANSFER	(0x00001000)
251 #define	IPW2200_INTR_TX2_TRANSFER	(0x00002000)
252 #define	IPW2200_INTR_TX3_TRANSFER	(0x00004000)
253 #define	IPW2200_INTR_TX4_TRANSFER	(0x00008000)
254 #define	IPW2200_INTR_FW_INITED		(0x01000000)
255 #define	IPW2200_INTR_RADIO_OFF		(0x04000000)
256 #define	IPW2200_INTR_FATAL_ERROR	(0x40000000)
257 #define	IPW2200_INTR_PARITY_ERROR	(0x80000000)
258 
259 #define	IPW2200_INTR_MASK_ALL	(IPW2200_INTR_RX_TRANSFER	| \
260 	IPW2200_INTR_CMD_TRANSFER	| \
261 	IPW2200_INTR_TX1_TRANSFER	| \
262 	IPW2200_INTR_TX2_TRANSFER	| \
263 	IPW2200_INTR_TX3_TRANSFER	| \
264 	IPW2200_INTR_TX4_TRANSFER	| \
265 	IPW2200_INTR_FW_INITED		| \
266 	IPW2200_INTR_RADIO_OFF		| \
267 	IPW2200_INTR_FATAL_ERROR	| \
268 	IPW2200_INTR_PARITY_ERROR)
269 
270 #define	IPW2200_INTR_MASK_ERR	(IPW2200_INTR_FATAL_ERROR	| \
271 	IPW2200_INTR_PARITY_ERROR)
272 
273 /*
274  * CSR flags for register: IPW2200_CSR_RST, which is used to reset h/w
275  */
276 #define	IPW2200_RST_PRINCETON_RESET	(0x00000001)
277 #define	IPW2200_RST_STANDBY		(0x00000004)
278 #define	IPW2200_RST_LED_ACTIVITY	(0x00000010)
279 #define	IPW2200_RST_LED_ASSOCIATED	(0x00000020)
280 #define	IPW2200_RST_LED_OFDM		(0x00000040)
281 #define	IPW2200_RST_SW_RESET		(0x00000080)
282 #define	IPW2200_RST_MASTER_DISABLED	(0x00000100)
283 #define	IPW2200_RST_STOP_MASTER		(0x00000200)
284 #define	IPW2200_RST_GATE_ODMA		(0x02000000)
285 #define	IPW2200_RST_GATE_IDMA		(0x04000000)
286 #define	IPW2200_RST_GATE_ADMA		(0x20000000)
287 
288 /*
289  * CSR flags for register: IPW2200_CSR_CTL
290  */
291 #define	IPW2200_CTL_CLOCK_READY		(0x00000001)
292 #define	IPW2200_CTL_ALLOW_STANDBY	(0x00000002)
293 #define	IPW2200_CTL_INIT		(0x00000004)
294 
295 /*
296  * CSR flags for register: IPW2200_CSR_IO
297  */
298 #define	IPW2200_IO_RADIO_ENABLED	(0x00010000)
299 
300 /*
301  * CSR flags for register: IPW2200_CSR_READ_INT
302  */
303 #define	IPW2200_READ_INT_INIT_HOST	(0x20000000)
304 
305 /* table2 offsets */
306 #define	IPW2200_INFO_ADAPTER_MAC	(40)
307 
308 /* constants for command blocks */
309 #define	IPW2200_CB_DEFAULT_CTL		(0x8cea0000)
310 #define	IPW2200_CB_MAXDATALEN		(8191)
311 
312 /* supported rates */
313 #define	IPW2200_RATE_DS1		(10)
314 #define	IPW2200_RATE_DS2		(20)
315 #define	IPW2200_RATE_DS5		(55)
316 #define	IPW2200_RATE_DS11		(110)
317 #define	IPW2200_RATE_OFDM6		(13)
318 #define	IPW2200_RATE_OFDM9		(15)
319 #define	IPW2200_RATE_OFDM12		(5)
320 #define	IPW2200_RATE_OFDM18		(7)
321 #define	IPW2200_RATE_OFDM24		(9)
322 #define	IPW2200_RATE_OFDM36		(11)
323 #define	IPW2200_RATE_OFDM48		(1)
324 #define	IPW2200_RATE_OFDM54		(3)
325 
326 #pragma pack(1)
327 /* HW structures, packed */
328 
329 struct ipw2200_hdr {
330 	uint8_t		type;
331 #define	IPW2200_HDR_TYPE_DATA		(0)
332 #define	IPW2200_HDR_TYPE_COMMAND	(1)
333 #define	IPW2200_HDR_TYPE_NOTIF		(3)
334 #define	IPW2200_HDR_TYPE_FRAME		(9)
335 	uint8_t		seq;
336 	uint8_t		flags;
337 #define	IPW2200_HDR_FLAG_IRQ		(0x04)
338 	uint8_t		reserved;
339 };
340 
341 struct ipw2200_notif {
342 	uint32_t	reserved[2];
343 	uint8_t		type;
344 #define	IPW2200_NOTIF_TYPE_SUCCESS		(0)
345 #define	IPW2200_NOTIF_TYPE_UNSPECIFIED		(1)
346 #define	IPW2200_NOTIF_TYPE_ASSOCIATION		(10)
347 #define	IPW2200_NOTIF_TYPE_AUTHENTICATION	(11)
348 #define	IPW2200_NOTIF_TYPE_SCAN_CHANNEL		(12)
349 #define	IPW2200_NOTIF_TYPE_SCAN_COMPLETE	(13)
350 #define	IPW2200_NOTIF_TYPE_FRAG_LENGTH		(14)
351 #define	IPW2200_NOTIF_TYPE_LINK_QUALITY		(15)
352 #define	IPW2200_NOTIF_TYPE_BEACON		(17)
353 #define	IPW2200_NOTIF_TYPE_TGI_TX_KEY		(18)
354 #define	IPW2200_NOTIF_TYPE_CALIBRATION		(20)
355 #define	IPW2200_NOTIF_TYPE_NOISE		(25)
356 	uint8_t		flags;
357 	uint16_t	len;
358 };
359 
360 /*
361  * structure for notification IPW2200_NOTIF_TYPE_AUTHENTICATION
362  */
363 struct ipw2200_notif_authentication {
364 	uint8_t		state;
365 #define	IPW2200_AUTH_FAIL	(0)
366 #define	IPW2200_AUTH_SENT_1	(1)
367 #define	IPW2200_AUTH_RECV_2	(2)
368 #define	IPW2200_AUTH_SEQ1_PASS	(3)
369 #define	IPW2200_AUTH_SEQ1_FAIL	(4)
370 #define	IPW2200_AUTH_SUCCESS	(9)
371 };
372 
373 /*
374  * structure for notification IPW2200_NOTIF_TYPE_ASSOCIATION
375  */
376 struct ipw2200_notif_association {
377 	uint8_t		state;
378 #define	IPW2200_ASSOC_FAIL	(0)
379 #define	IPW2200_ASSOC_SUCCESS	(12)
380 	struct ieee80211_frame	frame;
381 	uint16_t	capinfo;
382 	uint16_t	status;
383 	uint16_t	associd;
384 };
385 
386 /*
387  * structure for notification BACAON
388  */
389 struct ipw2200_notif_beacon_state {
390 	uint32_t	state;
391 #define	IPW2200_BEACON_MISS	(1)
392 	uint32_t	number;
393 };
394 
395 /*
396  * structure for notification IPW2200_NOTIF_TYPE_SCAN_CHANNEL
397  */
398 struct ipw2200_notif_scan_channel {
399 	uint8_t		nchan;
400 	uint8_t		reserved[47];
401 };
402 
403 /*
404  * structure for notification IPW2200_NOTIF_TYPE_SCAN_COMPLETE
405  */
406 struct ipw2200_notif_scan_complete {
407 	uint8_t		type;
408 	uint8_t		nchan;
409 	uint8_t		status;
410 	uint8_t		reserved;
411 };
412 
413 /*
414  * received frame header
415  */
416 struct ipw2200_frame {
417 	uint32_t	reserved1[2];
418 	uint8_t		chan;
419 	uint8_t		status;
420 	uint8_t		rate;
421 	uint8_t		rssi; /* receiver signal strength indicator */
422 	uint8_t		agc; /* automatic gain control */
423 	uint8_t		rssi_dbm;
424 	uint16_t	signal;
425 	uint16_t	noise;
426 	uint8_t		antenna;
427 	uint8_t		control;
428 	uint8_t		reserved3[2];
429 	uint16_t	len;
430 };
431 
432 /*
433  * header for transmission
434  */
435 struct ipw2200_tx_desc {
436 	struct ipw2200_hdr	hdr;
437 	uint32_t	reserved1;
438 	uint8_t		station;
439 	uint8_t		reserved2[3];
440 	uint8_t		cmd;
441 #define	IPW2200_DATA_CMD_TX		(0x0b)
442 	uint8_t		seq;
443 	uint16_t	len;
444 	uint8_t		priority;
445 	uint8_t		flags;
446 #define	IPW2200_DATA_FLAG_SHPREAMBLE	(0x04)
447 #define	IPW2200_DATA_FLAG_NO_WEP	(0x20)
448 #define	IPW2200_DATA_FLAG_NEED_ACK	(0x80)
449 	uint8_t		xflags;
450 #define	IPW2200_DATA_XFLAG_QOS		(0x10)
451 	uint8_t		wep_txkey;
452 	uint8_t		wepkey[IEEE80211_KEYBUF_SIZE];
453 	uint8_t		rate;
454 	uint8_t		antenna;
455 	uint8_t		reserved3[10];
456 
457 	struct ieee80211_frame_addr4 wh;
458 	uint8_t		reserved4[2];
459 	uint32_t	iv;
460 	uint32_t	eiv;
461 
462 	uint32_t	nseg;
463 #define	IPW2200_MAX_NSEG		(6)
464 	uint32_t	seg_addr[IPW2200_MAX_NSEG];
465 	uint16_t	seg_len[IPW2200_MAX_NSEG];
466 };
467 
468 /*
469  * command
470  */
471 struct ipw2200_cmd_desc {
472 	struct ipw2200_hdr	hdr;
473 	uint8_t			type;
474 #define	IPW2200_CMD_ENABLE		(2)
475 #define	IPW2200_CMD_SET_CONFIG		(6)
476 #define	IPW2200_CMD_SET_ESSID		(8)
477 #define	IPW2200_CMD_SET_MAC_ADDRESS	(11)
478 #define	IPW2200_CMD_SET_RTS_THRESHOLD	(15)
479 #define	IPW2200_CMD_SET_FRAG_THRESHOLD	(16)
480 #define	IPW2200_CMD_SET_POWER_MODE	(17)
481 #define	IPW2200_CMD_SET_WEP_KEY		(18)
482 #define	IPW2200_CMD_SCAN		(20)
483 #define	IPW2200_CMD_ASSOCIATE		(21)
484 #define	IPW2200_CMD_SET_RATES		(22)
485 #define	IPW2200_CMD_ABORT_SCAN		(23)
486 #define	IPW2200_CMD_SET_WME_PARAMS	(25)
487 #define	IPW2200_CMD_SCAN_EXT		(26)
488 #define	IPW2200_CMD_SET_OPTIE		(31)
489 #define	IPW2200_CMD_DISABLE		(33)
490 #define	IPW2200_CMD_SET_IV		(34)
491 #define	IPW2200_CMD_SET_TX_POWER	(35)
492 #define	IPW2200_CMD_SET_SENSITIVITY	(42)
493 #define	IPW2200_CMD_SET_WMEIE		(84)
494 	uint8_t			len;
495 	uint16_t		reserved;
496 	uint8_t			data[120];
497 };
498 
499 /*
500  * node information (IBSS)
501  */
502 struct ipw2200_ibssnode {
503 	uint8_t		bssid[IEEE80211_ADDR_LEN];
504 	uint8_t		reserved[2];
505 };
506 
507 /*
508  * constants for 'mode' fields
509  */
510 #define	IPW2200_MODE_11A	(0)
511 #define	IPW2200_MODE_11B	(1)
512 #define	IPW2200_MODE_11G	(2)
513 
514 /*
515  * macro for command IPW2200_CMD_SET_SENSITIVITY
516  */
517 #define	IPW2200_RSSIDBM2RAW(rssi)((rssi) - 112)
518 
519 /*
520  * possible values for command IPW2200_CMD_SET_POWER_MODE
521  */
522 #define	IPW2200_POWER_MODE_CAM		(0)
523 #define	IPW2200_POWER_MODE_PSP		(3)
524 #define	IPW2200_POWER_MODE_MAX		(5)
525 
526 /*
527  * structure for command IPW2200_CMD_SET_RATES
528  */
529 struct ipw2200_rateset {
530 	uint8_t		mode;
531 	uint8_t		nrates;
532 	uint8_t		type;
533 #define	IPW2200_RATESET_TYPE_NEGOCIATED	(0)
534 #define	IPW2200_RATESET_TYPE_SUPPORTED	(1)
535 	uint8_t		reserved;
536 	uint8_t		rates[12];
537 };
538 
539 /*
540  * structure for command IPW2200_CMD_SET_TX_POWER
541  */
542 struct ipw2200_txpower {
543 	uint8_t		nchan;
544 	uint8_t		mode;
545 	struct {
546 		uint8_t	chan;
547 		uint8_t power;
548 #define	IPW2200_TXPOWER_MAX	(20)
549 #define	IPW2200_TXPOWER_RATIO	(IEEE80211_TXPOWER_MAX / IPW2200_TXPOWER_MAX)
550 	} chan[37];
551 };
552 
553 /*
554  * structure for command IPW2200_CMD_ASSOCIATE
555  */
556 struct ipw2200_associate {
557 	uint8_t		chan;
558 	uint8_t		auth;
559 #define	IPW2200_AUTH_OPEN	(0)
560 #define	IPW2200_AUTH_SHARED	(1)
561 #define	IPW2200_AUTH_NONE	(3)
562 	uint8_t		type;
563 #define	IPW2200_HC_ASSOC	(0)
564 #define	IPW2200_HC_REASSOC	(1)
565 #define	IPW2200_HC_DISASSOC	(2)
566 #define	IPW2200_HC_IBSS_START	(3)
567 #define	IPW2200_HC_IBSS_RECONF	(4)
568 #define	IPW2200_HC_DISASSOC_QUIET (5)
569 	uint8_t		reserved1;
570 	uint16_t	policy;
571 #define	IPW2200_POLICY_WME	(1)
572 #define	IPW2200_POLICY_WPA	(2)
573 	uint8_t		plen;
574 	uint8_t		mode;
575 	uint8_t		bssid[IEEE80211_ADDR_LEN];
576 	uint8_t		tstamp[8];
577 
578 	uint16_t	capinfo;
579 	uint16_t	lintval;
580 	uint16_t	intval;
581 	uint8_t		dst[IEEE80211_ADDR_LEN];
582 	uint32_t	reserved3;
583 	uint16_t	reserved4;
584 };
585 
586 #define	IPW2200_SCAN_CHANNELS	(54)
587 
588 /*
589  * structure for command IPW2200_CMD_SCAN
590  */
591 struct ipw2200_scan {
592 	uint8_t		type;
593 #define	IPW2200_SCAN_TYPE_PASSIVE_STOP	(0) /* passive, stop on first beacon */
594 #define	IPW2200_SCAN_TYPE_PASSIVE	(1) /* passive, full dwell on channel */
595 #define	IPW2200_SCAN_TYPE_DIRECTED	(2) /* active, directed probe seq */
596 #define	IPW2200_SCAN_TYPE_BROADCAST	(3) /* active, bcast probe seq */
597 #define	IPW2200_SCAN_TYPE_BDIRECTED	(4) /* active, directed+bcast probe */
598 #define	IPW2200_SCAN_TYPES		(5)
599 	uint16_t	dwelltime;
600 	uint8_t		channels[IPW2200_SCAN_CHANNELS];
601 #define	IPW2200_CHAN_5GHZ	(0 << 6)
602 #define	IPW2200_CHAN_2GHZ	(1 << 6)
603 	uint8_t		reserved[3];
604 };
605 
606 /*
607  * structure for command IPW2200_CMD_SCAN_EXT
608  */
609 struct ipw2200_scan_ext {
610 	uint32_t	full_scan_index;
611 	uint8_t		channels[IPW2200_SCAN_CHANNELS];
612 	uint8_t		scan_type[IPW2200_SCAN_CHANNELS/2];
613 	uint8_t		reserved;
614 	uint16_t	dwell_time[IPW2200_SCAN_TYPES];
615 };
616 
617 /*
618  * structure for command IPW2200_CMD_SET_CONFIGURATION
619  */
620 struct ipw2200_configuration {
621 	uint8_t		bluetooth_coexistence;
622 	uint8_t		reserved1;
623 	uint8_t		answer_pbreq;
624 	uint8_t		allow_invalid_frames;
625 	uint8_t		multicast_enabled;
626 	uint8_t		drop_unicast_unencrypted;
627 	uint8_t		disable_unicast_decryption;
628 	uint8_t		drop_multicast_unencrypted;
629 	uint8_t		disable_multicast_decryption;
630 	uint8_t		antenna;
631 #define	IPW2200_ANTENNA_AUTO	(0)	/* firmware selects best antenna */
632 #define	IPW2200_ANTENNA_A	(1)	/* use antenna A only */
633 #define	IPW2200_ANTENNA_B	(3)	/* use antenna B only */
634 #define	IPW2200_ANTENNA_SLOWDIV	(2)	/* slow diversity algorithm */
635 	uint8_t		include_crc;
636 	uint8_t		use_protection;
637 	uint8_t		protection_ctsonly;
638 	uint8_t		enable_multicast_filtering;
639 	uint8_t		bluetooth_threshold;
640 	uint8_t		reserved4;
641 	uint8_t		allow_beacon_and_probe_resp;
642 	uint8_t		allow_mgt;
643 	uint8_t		noise_reported;
644 	uint8_t		reserved5;
645 };
646 
647 /*
648  * structure for command IPW2200_CMD_SET_WEP_KEY
649  */
650 struct ipw2200_wep_key {
651 	uint8_t		cmd;
652 #define	IPW2200_WEP_KEY_CMD_SETKEY	(0x08)
653 	uint8_t		seq;
654 	uint8_t		idx;
655 	uint8_t		len;
656 	uint8_t		key[IEEE80211_KEYBUF_SIZE];
657 };
658 
659 /*
660  * the following two structures are for future WME support
661  */
662 struct ipw2200_wme_params {
663 	uint16_t	cwmin[WME_NUM_AC];
664 	uint16_t	cwmax[WME_NUM_AC];
665 	uint8_t		aifsn[WME_NUM_AC];
666 	uint8_t		acm[WME_NUM_AC];
667 	uint16_t	burst[WME_NUM_AC];
668 };
669 
670 struct ipw2200_sensitivity {
671 	uint16_t	rssi;
672 #define	IPW2200_RSSI_TO_DBM	(112)
673 	uint16_t	reserved;
674 };
675 
676 #pragma pack()
677 
678 /*
679  * ROM entries
680  */
681 #define	IPW2200_EEPROM_MAC	(0x21)
682 #define	IPW2200_EEPROM_NIC	(0x25)	/* nic type (lsb) */
683 #define	IPW2200_EEPROM_SKU	(0x25)	/* nic type (msb) */
684 
685 /*
686  * EVENT controls
687  */
688 #define	IPW2200_IMEM_EVENT_CTL	(0x00300004)
689 /*
690  * EEPROM controls
691  */
692 #define	IPW2200_IMEM_EEPROM_CTL	(0x00300040)
693 
694 #define	IPW2200_EEPROM_DELAY	(1) /* minimum hold time(microsecond) */
695 
696 /*
697  * possible flags for register IWI_MEM_EVENT
698  */
699 #define	IPW2200_LED_ASSOC	(1 << 5)
700 #define	IPW2200_LED_MASK	(0xd9fffffb)
701 
702 /*
703  * control and status registers access macros
704  */
705 extern uint8_t ipw2200_csr_get8(struct ipw2200_softc *sc, uint32_t off);
706 extern uint16_t ipw2200_csr_get16(struct ipw2200_softc *sc, uint32_t off);
707 extern uint32_t ipw2200_csr_get32(struct ipw2200_softc *sc, uint32_t off);
708 extern void ipw2200_csr_getbuf32(struct ipw2200_softc *sc, uint32_t off,
709     uint32_t *buf, size_t cnt);
710 extern void ipw2200_csr_put8(struct ipw2200_softc *sc, uint32_t off,
711     uint8_t val);
712 extern void ipw2200_csr_put16(struct ipw2200_softc *sc, uint32_t off,
713     uint16_t val);
714 extern void ipw2200_csr_put32(struct ipw2200_softc *sc, uint32_t off,
715     uint32_t val);
716 /*
717  * indirect memory space access macros
718  */
719 extern uint8_t ipw2200_imem_get8(struct ipw2200_softc *sc, uint32_t addr);
720 extern uint16_t ipw2200_imem_get16(struct ipw2200_softc *sc,
721     uint32_t addr);
722 extern uint32_t ipw2200_imem_get32(struct ipw2200_softc *sc,
723     uint32_t addr);
724 extern void ipw2200_imem_put8(struct ipw2200_softc *sc, uint32_t addr,
725     uint8_t val);
726 extern void ipw2200_imem_put16(struct ipw2200_softc *sc, uint32_t addr,
727     uint16_t val);
728 extern void ipw2200_imem_put32(struct ipw2200_softc *sc, uint32_t addr,
729     uint32_t val);
730 /*
731  * EEPROM access macro
732  */
733 extern void ipw2200_rom_control(struct ipw2200_softc *sc, uint32_t val);
734 extern uint16_t ipw2200_rom_get16(struct ipw2200_softc *sc, uint8_t addr);
735 
736 /*
737  * Firmware related definations and interfaces.
738  */
739 extern int ipw2200_cache_firmware(struct ipw2200_softc *sc);
740 extern int ipw2200_free_firmware(struct ipw2200_softc *sc);
741 extern int ipw2200_load_uc(struct ipw2200_softc *sc, uint8_t *buf, size_t size);
742 extern int ipw2200_load_fw(struct ipw2200_softc *sc, uint8_t *buf, size_t size);
743 
744 #ifdef __cplusplus
745 }
746 #endif
747 
748 #endif /* _SYS_IPW2200_IMPL_H */
749