xref: /titanic_41/usr/src/uts/common/io/iwi/ipw2200_impl.h (revision 1dd08564e4a3aafe66b00aee6f222b0885346fe8)
1 /*
2  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
3  * Use is subject to license terms.
4  */
5 
6 /*
7  * Copyright (c) 2004, 2005
8  *      Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice unmodified, this list of conditions, and the following
15  *    disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  */
32 
33 #ifndef _SYS_IPW2200_IMPL_H
34 #define	_SYS_IPW2200_IMPL_H
35 
36 #pragma ident	"%Z%%M%	%I%	%E% SMI"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
42 /*
43  * Intel Wireless PRO/2200 mini-pci adapter driver
44  * ipw2200_impl.h includes:
45  * 	. implementation of ipw2200
46  * 	. hardware operations and interface definations for ipw2200
47  * 	. firmware operations and interface definations for ipw2200
48  */
49 #include <sys/ddi.h>
50 #include <sys/sunddi.h>
51 #include <sys/mac.h>
52 #include <sys/mac_wifi.h>
53 #include <sys/net80211.h>
54 
55 /*
56  * Implementation of ipw2200
57  */
58 #define	IPW2200_PCI_CFG_RNUM 	(0) /* pci config space */
59 #define	IPW2200_PCI_CSR_RNUM 	(1) /* device CSR space */
60 #define	IPW2200_PCI_INTR_NUM	(0) /* interrupt number */
61 
62 #define	IPW2200_TX_RING_SIZE 	(64)
63 #define	IPW2200_CMD_RING_SIZE	(16)
64 #define	IPW2200_RX_RING_SIZE 	(32)
65 
66 struct dma_region {
67 	ddi_dma_handle_t	dr_hnd;
68 	ddi_acc_handle_t	dr_acc;
69 	ddi_dma_cookie_t	dr_cookie;
70 	uint_t			dr_ccnt;
71 	uint32_t		dr_pbase;
72 	caddr_t			dr_base;
73 	size_t			dr_size;
74 	const char		*dr_name;
75 };
76 
77 struct ipw2200_firmware {
78 	uint8_t			*boot_base; /* boot code */
79 	size_t			boot_size;
80 	uint8_t			*uc_base; /* u-controller code */
81 	size_t			uc_size;
82 	uint8_t			*fw_base; /* firmware code */
83 	size_t			fw_size;
84 };
85 
86 /*
87  * per-instance soft-state structure
88  */
89 struct ipw2200_softc {
90 	struct ieee80211com	sc_ic;
91 	dev_info_t		*sc_dip;
92 	int	(*sc_newstate)(struct ieee80211com *,
93 	    enum ieee80211_state, int);
94 	void    (*sc_node_free)(struct ieee80211com *);
95 	int			sc_authmode;
96 
97 	/* CSR */
98 	ddi_acc_handle_t	sc_ioh;
99 	caddr_t			sc_regs;
100 	/* mutex to protect interrupt handler */
101 	kmutex_t		sc_ilock;
102 	/* interrupt iblock cookie */
103 	ddi_iblock_cookie_t 	sc_iblk;
104 	/* soft interrupt */
105 	ddi_softintr_t		sc_link_softint;
106 	/* link status */
107 	int32_t			sc_linkstate;
108 	/* flags */
109 	uint32_t		sc_flags;
110 #define	IPW2200_FLAG_FW_CACHED		(1 << 0)
111 #define	IPW2200_FLAG_FW_INITED		(1 << 1)
112 #define	IPW2200_FLAG_RUNNING		(1 << 2)
113 #define	IPW2200_FLAG_LINK_CHANGE	(1 << 3)
114 #define	IPW2200_FLAG_TX_SCHED		(1 << 4)
115 #define	IPW2200_FLAG_SCANNING		(1 << 5)
116 #define	IPW2200_FLAG_HW_ERR_RECOVER	(1 << 6)
117 #define	IPW2200_FLAG_ASSOCIATED		(1 << 7)
118 #define	IPW2200_FLAG_HAS_RADIO_SWITCH	(1 << 16)
119 	/* firmware download */
120 	int			sc_fw_ok;
121 	kcondvar_t		sc_fw_cond;
122 
123 	/* command desc ring */
124 	kmutex_t		sc_cmd_lock;
125 	kcondvar_t		sc_cmd_cond;
126 	uint32_t		sc_cmd_cur;
127 	uint32_t		sc_cmd_free;
128 	struct ipw2200_cmd_desc	*sc_cmdsc;
129 
130 	/* command status */
131 	int			sc_done[IPW2200_CMD_RING_SIZE];
132 	kcondvar_t		sc_cmd_status_cond;
133 
134 	/* tx ring, bd->hdr&buf */
135 	kmutex_t		sc_tx_lock;
136 	uint32_t		sc_tx_cur;
137 	uint32_t		sc_tx_free;
138 	struct ipw2200_tx_desc	*sc_txdsc;
139 	uint8_t			*sc_txbufs[IPW2200_TX_RING_SIZE];
140 
141 	/* rx ring */
142 	uint32_t		sc_rx_cur;
143 	uint32_t		sc_rx_free;
144 	uint8_t			*sc_rxbufs[IPW2200_RX_RING_SIZE];
145 
146 	/* tx-desc & tx-buffer array */
147 	struct dma_region	sc_dma_txdsc;
148 	struct dma_region	sc_dma_txbufs[IPW2200_TX_RING_SIZE];
149 	struct dma_region	sc_dma_cmdsc;
150 	/* rx-buffer array */
151 	struct dma_region	sc_dma_rxbufs[IPW2200_RX_RING_SIZE];
152 
153 	/* hw configuration values */
154 	uint8_t			sc_macaddr[IEEE80211_ADDR_LEN];
155 	/* MAC address string */
156 	char			sc_macstr[32];
157 
158 	/* firmware */
159 	struct ipw2200_firmware	sc_fw;
160 
161 	/* reschedule lock */
162 	kmutex_t		sc_resched_lock;
163 
164 	/* mfthread related, mfthread is used to handle asynchronous task */
165 	kthread_t		*sc_mf_thread;
166 	kmutex_t		sc_mflock;
167 	int			sc_mfthread_switch;
168 	kcondvar_t		sc_mfthread_req;
169 	kcondvar_t		sc_mfthread_cv;
170 
171 };
172 
173 /*
174  * RING_BACKWARD - move 'x' backward 's' steps in a 'b'- sized ring
175  * RING_FORWARD	 - move 'x' forward 's' steps in a 'b'- sized ring
176  *
177  * note that there must be 0 <= 'x' < 'b' && 0 <= 's' < 'b'
178  */
179 #define	RING_FLEN(x, y, b)	((((x) > (y)) ? ((b)+(y)-(x)) : ((y)-(x))))
180 #define	RING_FORWARD(x, s, b)	(((x)+(s))%(b))
181 #define	RING_BACKWARD(x, s, b)	RING_FORWARD((x), (b)-(s), (b))
182 
183 extern int ipw2200_init(struct ipw2200_softc *sc);
184 extern void ipw2200_wifi_ioctl(struct ipw2200_softc *, queue_t *,
185     mblk_t *, uint32_t);
186 extern int ipw2200_dma_region_alloc(struct ipw2200_softc *sc,
187     struct dma_region *dr, size_t size, uint_t dir, uint_t flags);
188 extern void ipw2200_dma_region_free(struct dma_region *dr);
189 extern int ipw2200_disable(struct ipw2200_softc *sc);
190 extern int ipw2200_start_scan(struct ipw2200_softc *sc);
191 
192 /*
193  * get radio off/on status
194  */
195 extern int ipw2200_radio_status(struct ipw2200_softc *sc);
196 
197 /*
198  * Below structure and functions will be used for statistic, which will be
199  * displayed when the wificonfig running...
200  */
201 struct statistic {
202 	int		index;
203 	const char	*desc;
204 };
205 extern void ipw2200_get_statistics(struct ipw2200_softc *sc);
206 
207 /*
208  * Hardware related definations and interfaces.
209  */
210 #define	IPW2200_CSR_INTR		(0x0008)
211 #define	IPW2200_CSR_INTR_MASK		(0x000c)
212 #define	IPW2200_CSR_INDIRECT_ADDR	(0x0010)
213 #define	IPW2200_CSR_INDIRECT_DATA	(0x0014)
214 #define	IPW2200_CSR_AUTOINC_ADDR	(0x0018)
215 #define	IPW2200_CSR_AUTOINC_DATA	(0x001c)
216 #define	IPW2200_CSR_RST			(0x0020)
217 #define	IPW2200_CSR_CTL			(0x0024)
218 #define	IPW2200_CSR_IO			(0x0030)
219 #define	IPW2200_CSR_CMD_BASE		(0x0200)
220 #define	IPW2200_CSR_CMD_SIZE		(0x0204)
221 #define	IPW2200_CSR_TX1_BASE		(0x0208)
222 #define	IPW2200_CSR_TX1_SIZE		(0x020c)
223 #define	IPW2200_CSR_TX2_BASE		(0x0210)
224 #define	IPW2200_CSR_TX2_SIZE		(0x0214)
225 #define	IPW2200_CSR_TX3_BASE		(0x0218)
226 #define	IPW2200_CSR_TX3_SIZE		(0x021c)
227 #define	IPW2200_CSR_TX4_BASE		(0x0220)
228 #define	IPW2200_CSR_TX4_SIZE		(0x0224)
229 #define	IPW2200_CSR_CMD_READ_INDEX	(0x0280)
230 #define	IPW2200_CSR_TX1_READ_INDEX	(0x0284)
231 #define	IPW2200_CSR_TX2_READ_INDEX	(0x0288)
232 #define	IPW2200_CSR_TX3_READ_INDEX	(0x028c)
233 #define	IPW2200_CSR_TX4_READ_INDEX	(0x0290)
234 #define	IPW2200_CSR_RX_READ_INDEX	(0x02a0)
235 #define	IPW2200_CSR_RX_BASE		(0x0500)
236 #define	IPW2200_CSR_TABLE0_SIZE		(0x0700)
237 #define	IPW2200_CSR_TABLE0_BASE		(0x0704)
238 #define	IPW2200_CSR_NODE_BASE		(0x0c0c)
239 #define	IPW2200_CSR_CMD_WRITE_INDEX	(0x0f80)
240 #define	IPW2200_CSR_TX1_WRITE_INDEX	(0x0f84)
241 #define	IPW2200_CSR_TX2_WRITE_INDEX	(0x0f88)
242 #define	IPW2200_CSR_TX3_WRITE_INDEX	(0x0f8c)
243 #define	IPW2200_CSR_TX4_WRITE_INDEX	(0x0f90)
244 #define	IPW2200_CSR_RX_WRITE_INDEX	(0x0fa0)
245 #define	IPW2200_CSR_READ_INT		(0x0ff4)
246 
247 #define	IPW2200_CSR_CURRENTT_TX_RATE	IPW2200_CSR_TABLE0_BASE
248 
249 /*
250  * CSR flags: IPW2200_CSR_INTR
251  */
252 #define	IPW2200_INTR_RX_TRANSFER	(0x00000002)
253 #define	IPW2200_INTR_CMD_TRANSFER	(0x00000800)
254 #define	IPW2200_INTR_TX1_TRANSFER	(0x00001000)
255 #define	IPW2200_INTR_TX2_TRANSFER	(0x00002000)
256 #define	IPW2200_INTR_TX3_TRANSFER	(0x00004000)
257 #define	IPW2200_INTR_TX4_TRANSFER	(0x00008000)
258 #define	IPW2200_INTR_FW_INITED		(0x01000000)
259 #define	IPW2200_INTR_RADIO_OFF		(0x04000000)
260 #define	IPW2200_INTR_FATAL_ERROR	(0x40000000)
261 #define	IPW2200_INTR_PARITY_ERROR	(0x80000000)
262 
263 #define	IPW2200_INTR_MASK_ALL	(IPW2200_INTR_RX_TRANSFER	| \
264 	IPW2200_INTR_CMD_TRANSFER	| \
265 	IPW2200_INTR_TX1_TRANSFER	| \
266 	IPW2200_INTR_TX2_TRANSFER	| \
267 	IPW2200_INTR_TX3_TRANSFER	| \
268 	IPW2200_INTR_TX4_TRANSFER	| \
269 	IPW2200_INTR_FW_INITED		| \
270 	IPW2200_INTR_RADIO_OFF		| \
271 	IPW2200_INTR_FATAL_ERROR	| \
272 	IPW2200_INTR_PARITY_ERROR)
273 
274 #define	IPW2200_INTR_MASK_ERR	(IPW2200_INTR_FATAL_ERROR	| \
275 	IPW2200_INTR_PARITY_ERROR)
276 
277 /*
278  * CSR flags for register: IPW2200_CSR_RST, which is used to reset h/w
279  */
280 #define	IPW2200_RST_PRINCETON_RESET	(0x00000001)
281 #define	IPW2200_RST_STANDBY		(0x00000004)
282 #define	IPW2200_RST_LED_ACTIVITY	(0x00000010)
283 #define	IPW2200_RST_LED_ASSOCIATED	(0x00000020)
284 #define	IPW2200_RST_LED_OFDM		(0x00000040)
285 #define	IPW2200_RST_SW_RESET		(0x00000080)
286 #define	IPW2200_RST_MASTER_DISABLED	(0x00000100)
287 #define	IPW2200_RST_STOP_MASTER		(0x00000200)
288 #define	IPW2200_RST_GATE_ODMA		(0x02000000)
289 #define	IPW2200_RST_GATE_IDMA		(0x04000000)
290 #define	IPW2200_RST_GATE_ADMA		(0x20000000)
291 
292 /*
293  * CSR flags for register: IPW2200_CSR_CTL
294  */
295 #define	IPW2200_CTL_CLOCK_READY		(0x00000001)
296 #define	IPW2200_CTL_ALLOW_STANDBY	(0x00000002)
297 #define	IPW2200_CTL_INIT		(0x00000004)
298 
299 /*
300  * CSR flags for register: IPW2200_CSR_IO
301  */
302 #define	IPW2200_IO_RADIO_ENABLED	(0x00010000)
303 
304 /*
305  * CSR flags for register: IPW2200_CSR_READ_INT
306  */
307 #define	IPW2200_READ_INT_INIT_HOST	(0x20000000)
308 
309 /* table2 offsets */
310 #define	IPW2200_INFO_ADAPTER_MAC	(40)
311 
312 /* constants for command blocks */
313 #define	IPW2200_CB_DEFAULT_CTL		(0x8cea0000)
314 #define	IPW2200_CB_MAXDATALEN		(8191)
315 
316 /* supported rates */
317 #define	IPW2200_RATE_DS1		(10)
318 #define	IPW2200_RATE_DS2		(20)
319 #define	IPW2200_RATE_DS5		(55)
320 #define	IPW2200_RATE_DS11		(110)
321 #define	IPW2200_RATE_OFDM6		(13)
322 #define	IPW2200_RATE_OFDM9		(15)
323 #define	IPW2200_RATE_OFDM12		(5)
324 #define	IPW2200_RATE_OFDM18		(7)
325 #define	IPW2200_RATE_OFDM24		(9)
326 #define	IPW2200_RATE_OFDM36		(11)
327 #define	IPW2200_RATE_OFDM48		(1)
328 #define	IPW2200_RATE_OFDM54		(3)
329 
330 #pragma pack(1)
331 /* HW structures, packed */
332 
333 struct ipw2200_hdr {
334 	uint8_t		type;
335 #define	IPW2200_HDR_TYPE_DATA		(0)
336 #define	IPW2200_HDR_TYPE_COMMAND	(1)
337 #define	IPW2200_HDR_TYPE_NOTIF		(3)
338 #define	IPW2200_HDR_TYPE_FRAME		(9)
339 	uint8_t		seq;
340 	uint8_t		flags;
341 #define	IPW2200_HDR_FLAG_IRQ		(0x04)
342 	uint8_t		reserved;
343 };
344 
345 struct ipw2200_notif {
346 	uint32_t	reserved[2];
347 	uint8_t		type;
348 #define	IPW2200_NOTIF_TYPE_SUCCESS		(0)
349 #define	IPW2200_NOTIF_TYPE_UNSPECIFIED		(1)
350 #define	IPW2200_NOTIF_TYPE_ASSOCIATION		(10)
351 #define	IPW2200_NOTIF_TYPE_AUTHENTICATION	(11)
352 #define	IPW2200_NOTIF_TYPE_SCAN_CHANNEL		(12)
353 #define	IPW2200_NOTIF_TYPE_SCAN_COMPLETE	(13)
354 #define	IPW2200_NOTIF_TYPE_FRAG_LENGTH		(14)
355 #define	IPW2200_NOTIF_TYPE_LINK_QUALITY		(15)
356 #define	IPW2200_NOTIF_TYPE_BEACON		(17)
357 #define	IPW2200_NOTIF_TYPE_TGI_TX_KEY		(18)
358 #define	IPW2200_NOTIF_TYPE_CALIBRATION		(20)
359 #define	IPW2200_NOTIF_TYPE_NOISE		(25)
360 	uint8_t		flags;
361 	uint16_t	len;
362 };
363 
364 /*
365  * structure for notification IPW2200_NOTIF_TYPE_AUTHENTICATION
366  */
367 struct ipw2200_notif_authentication {
368 	uint8_t		state;
369 #define	IPW2200_AUTH_FAIL	(0)
370 #define	IPW2200_AUTH_SENT_1	(1)
371 #define	IPW2200_AUTH_RECV_2	(2)
372 #define	IPW2200_AUTH_SEQ1_PASS	(3)
373 #define	IPW2200_AUTH_SEQ1_FAIL	(4)
374 #define	IPW2200_AUTH_SUCCESS	(9)
375 };
376 
377 /*
378  * structure for notification IPW2200_NOTIF_TYPE_ASSOCIATION
379  */
380 struct ipw2200_notif_association {
381 	uint8_t		state;
382 #define	IPW2200_ASSOC_FAIL	(0)
383 #define	IPW2200_ASSOC_SUCCESS	(12)
384 	struct ieee80211_frame	frame;
385 	uint16_t	capinfo;
386 	uint16_t	status;
387 	uint16_t	associd;
388 };
389 
390 /*
391  * structure for notification BACAON
392  */
393 struct ipw2200_notif_beacon_state {
394 	uint32_t	state;
395 #define	IPW2200_BEACON_MISS	(1)
396 	uint32_t	number;
397 };
398 
399 /*
400  * structure for notification IPW2200_NOTIF_TYPE_SCAN_CHANNEL
401  */
402 struct ipw2200_notif_scan_channel {
403 	uint8_t		nchan;
404 	uint8_t		reserved[47];
405 };
406 
407 /*
408  * structure for notification IPW2200_NOTIF_TYPE_SCAN_COMPLETE
409  */
410 struct ipw2200_notif_scan_complete {
411 	uint8_t		type;
412 	uint8_t		nchan;
413 	uint8_t		status;
414 	uint8_t		reserved;
415 };
416 
417 /*
418  * received frame header
419  */
420 struct ipw2200_frame {
421 	uint32_t	reserved1[2];
422 	uint8_t		chan;
423 	uint8_t		status;
424 	uint8_t		rate;
425 	uint8_t		rssi; /* receiver signal strength indicator */
426 	uint8_t		agc; /* automatic gain control */
427 	uint8_t		rssi_dbm;
428 	uint16_t	signal;
429 	uint16_t	noise;
430 	uint8_t		antenna;
431 	uint8_t		control;
432 	uint8_t		reserved3[2];
433 	uint16_t	len;
434 };
435 
436 /*
437  * header for transmission
438  */
439 struct ipw2200_tx_desc {
440 	struct ipw2200_hdr	hdr;
441 	uint32_t	reserved1;
442 	uint8_t		station;
443 	uint8_t		reserved2[3];
444 	uint8_t		cmd;
445 #define	IPW2200_DATA_CMD_TX		(0x0b)
446 	uint8_t		seq;
447 	uint16_t	len;
448 	uint8_t		priority;
449 	uint8_t		flags;
450 #define	IPW2200_DATA_FLAG_SHPREAMBLE	(0x04)
451 #define	IPW2200_DATA_FLAG_NO_WEP	(0x20)
452 #define	IPW2200_DATA_FLAG_NEED_ACK	(0x80)
453 	uint8_t		xflags;
454 #define	IPW2200_DATA_XFLAG_QOS		(0x10)
455 	uint8_t		wep_txkey;
456 	uint8_t		wepkey[IEEE80211_KEYBUF_SIZE];
457 	uint8_t		rate;
458 	uint8_t		antenna;
459 	uint8_t		reserved3[10];
460 
461 	struct ieee80211_frame_addr4 wh;
462 	uint8_t		reserved4[2];
463 	uint32_t	iv;
464 	uint32_t	eiv;
465 
466 	uint32_t	nseg;
467 #define	IPW2200_MAX_NSEG		(6)
468 	uint32_t	seg_addr[IPW2200_MAX_NSEG];
469 	uint16_t	seg_len[IPW2200_MAX_NSEG];
470 };
471 
472 /*
473  * command
474  */
475 struct ipw2200_cmd_desc {
476 	struct ipw2200_hdr	hdr;
477 	uint8_t			type;
478 #define	IPW2200_CMD_ENABLE		(2)
479 #define	IPW2200_CMD_SET_CONFIG		(6)
480 #define	IPW2200_CMD_SET_ESSID		(8)
481 #define	IPW2200_CMD_SET_MAC_ADDRESS	(11)
482 #define	IPW2200_CMD_SET_RTS_THRESHOLD	(15)
483 #define	IPW2200_CMD_SET_FRAG_THRESHOLD	(16)
484 #define	IPW2200_CMD_SET_POWER_MODE	(17)
485 #define	IPW2200_CMD_SET_WEP_KEY		(18)
486 #define	IPW2200_CMD_SCAN		(20)
487 #define	IPW2200_CMD_ASSOCIATE		(21)
488 #define	IPW2200_CMD_SET_RATES		(22)
489 #define	IPW2200_CMD_ABORT_SCAN		(23)
490 #define	IPW2200_CMD_SET_WME_PARAMS	(25)
491 #define	IPW2200_CMD_SCAN_EXT		(26)
492 #define	IPW2200_CMD_SET_OPTIE		(31)
493 #define	IPW2200_CMD_DISABLE		(33)
494 #define	IPW2200_CMD_SET_IV		(34)
495 #define	IPW2200_CMD_SET_TX_POWER	(35)
496 #define	IPW2200_CMD_SET_SENSITIVITY	(42)
497 #define	IPW2200_CMD_SET_WMEIE		(84)
498 	uint8_t			len;
499 	uint16_t		reserved;
500 	uint8_t			data[120];
501 };
502 
503 /*
504  * node information (IBSS)
505  */
506 struct ipw2200_ibssnode {
507 	uint8_t		bssid[IEEE80211_ADDR_LEN];
508 	uint8_t		reserved[2];
509 };
510 
511 /*
512  * constants for 'mode' fields
513  */
514 #define	IPW2200_MODE_11A	(0)
515 #define	IPW2200_MODE_11B	(1)
516 #define	IPW2200_MODE_11G	(2)
517 
518 /*
519  * macro for command IPW2200_CMD_SET_SENSITIVITY
520  */
521 #define	IPW2200_RSSIDBM2RAW(rssi)((rssi) - 112)
522 
523 /*
524  * possible values for command IPW2200_CMD_SET_POWER_MODE
525  */
526 #define	IPW2200_POWER_MODE_CAM		(0)
527 #define	IPW2200_POWER_MODE_PSP		(3)
528 #define	IPW2200_POWER_MODE_MAX		(5)
529 
530 /*
531  * structure for command IPW2200_CMD_SET_RATES
532  */
533 struct ipw2200_rateset {
534 	uint8_t		mode;
535 	uint8_t		nrates;
536 	uint8_t		type;
537 #define	IPW2200_RATESET_TYPE_NEGOCIATED	(0)
538 #define	IPW2200_RATESET_TYPE_SUPPORTED	(1)
539 	uint8_t		reserved;
540 	uint8_t		rates[12];
541 };
542 
543 /*
544  * structure for command IPW2200_CMD_SET_TX_POWER
545  */
546 struct ipw2200_txpower {
547 	uint8_t		nchan;
548 	uint8_t		mode;
549 	struct {
550 		uint8_t	chan;
551 		uint8_t power;
552 #define	IPW2200_TXPOWER_MAX	(20)
553 #define	IPW2200_TXPOWER_RATIO	(IEEE80211_TXPOWER_MAX / IPW2200_TXPOWER_MAX)
554 	} chan[37];
555 };
556 
557 /*
558  * structure for command IPW2200_CMD_ASSOCIATE
559  */
560 struct ipw2200_associate {
561 	uint8_t		chan;
562 	uint8_t		auth;
563 #define	IPW2200_AUTH_OPEN	(0)
564 #define	IPW2200_AUTH_SHARED	(1)
565 #define	IPW2200_AUTH_NONE	(3)
566 	uint8_t		type;
567 #define	IPW2200_HC_ASSOC	(0)
568 #define	IPW2200_HC_REASSOC	(1)
569 #define	IPW2200_HC_DISASSOC	(2)
570 #define	IPW2200_HC_IBSS_START	(3)
571 #define	IPW2200_HC_IBSS_RECONF	(4)
572 #define	IPW2200_HC_DISASSOC_QUIET (5)
573 	uint8_t		reserved1;
574 	uint16_t	policy;
575 #define	IPW2200_POLICY_WME	(1)
576 #define	IPW2200_POLICY_WPA	(2)
577 	uint8_t		plen;
578 	uint8_t		mode;
579 	uint8_t		bssid[IEEE80211_ADDR_LEN];
580 	uint8_t		tstamp[8];
581 
582 	uint16_t	capinfo;
583 	uint16_t	lintval;
584 	uint16_t	intval;
585 	uint8_t		dst[IEEE80211_ADDR_LEN];
586 	uint32_t	reserved3;
587 	uint16_t	reserved4;
588 };
589 
590 #define	IPW2200_SCAN_CHANNELS	(54)
591 
592 /*
593  * structure for command IPW2200_CMD_SCAN
594  */
595 struct ipw2200_scan {
596 	uint8_t		type;
597 #define	IPW2200_SCAN_TYPE_PASSIVE_STOP	(0) /* passive, stop on first beacon */
598 #define	IPW2200_SCAN_TYPE_PASSIVE	(1) /* passive, full dwell on channel */
599 #define	IPW2200_SCAN_TYPE_DIRECTED	(2) /* active, directed probe seq */
600 #define	IPW2200_SCAN_TYPE_BROADCAST	(3) /* active, bcast probe seq */
601 #define	IPW2200_SCAN_TYPE_BDIRECTED	(4) /* active, directed+bcast probe */
602 #define	IPW2200_SCAN_TYPES		(5)
603 	uint16_t	dwelltime;
604 	uint8_t		channels[IPW2200_SCAN_CHANNELS];
605 #define	IPW2200_CHAN_5GHZ	(0 << 6)
606 #define	IPW2200_CHAN_2GHZ	(1 << 6)
607 	uint8_t		reserved[3];
608 };
609 
610 /*
611  * structure for command IPW2200_CMD_SCAN_EXT
612  */
613 struct ipw2200_scan_ext {
614 	uint32_t	full_scan_index;
615 	uint8_t		channels[IPW2200_SCAN_CHANNELS];
616 	uint8_t		scan_type[IPW2200_SCAN_CHANNELS/2];
617 	uint8_t		reserved;
618 	uint16_t	dwell_time[IPW2200_SCAN_TYPES];
619 };
620 
621 /*
622  * structure for command IPW2200_CMD_SET_CONFIGURATION
623  */
624 struct ipw2200_configuration {
625 	uint8_t		bluetooth_coexistence;
626 	uint8_t		reserved1;
627 	uint8_t		answer_pbreq;
628 	uint8_t		allow_invalid_frames;
629 	uint8_t		multicast_enabled;
630 	uint8_t		drop_unicast_unencrypted;
631 	uint8_t		disable_unicast_decryption;
632 	uint8_t		drop_multicast_unencrypted;
633 	uint8_t		disable_multicast_decryption;
634 	uint8_t		antenna;
635 #define	IPW2200_ANTENNA_AUTO	(0)	/* firmware selects best antenna */
636 #define	IPW2200_ANTENNA_A	(1)	/* use antenna A only */
637 #define	IPW2200_ANTENNA_B	(3)	/* use antenna B only */
638 #define	IPW2200_ANTENNA_SLOWDIV	(2)	/* slow diversity algorithm */
639 	uint8_t		include_crc;
640 	uint8_t		use_protection;
641 	uint8_t		protection_ctsonly;
642 	uint8_t		enable_multicast_filtering;
643 	uint8_t		bluetooth_threshold;
644 	uint8_t		reserved4;
645 	uint8_t		allow_beacon_and_probe_resp;
646 	uint8_t		allow_mgt;
647 	uint8_t		noise_reported;
648 	uint8_t		reserved5;
649 };
650 
651 /*
652  * structure for command IPW2200_CMD_SET_WEP_KEY
653  */
654 struct ipw2200_wep_key {
655 	uint8_t		cmd;
656 #define	IPW2200_WEP_KEY_CMD_SETKEY	(0x08)
657 	uint8_t		seq;
658 	uint8_t		idx;
659 	uint8_t		len;
660 	uint8_t		key[IEEE80211_KEYBUF_SIZE];
661 };
662 
663 /*
664  * the following two structures are for future WME support
665  */
666 struct ipw2200_wme_params {
667 	uint16_t	cwmin[WME_NUM_AC];
668 	uint16_t	cwmax[WME_NUM_AC];
669 	uint8_t		aifsn[WME_NUM_AC];
670 	uint8_t		acm[WME_NUM_AC];
671 	uint16_t	burst[WME_NUM_AC];
672 };
673 
674 struct ipw2200_sensitivity {
675 	uint16_t	rssi;
676 #define	IPW2200_RSSI_TO_DBM	(112)
677 	uint16_t	reserved;
678 };
679 
680 #pragma pack()
681 
682 /*
683  * ROM entries
684  */
685 #define	IPW2200_EEPROM_MAC	(0x21)
686 #define	IPW2200_EEPROM_NIC	(0x25)	/* nic type (lsb) */
687 #define	IPW2200_EEPROM_SKU	(0x25)	/* nic type (msb) */
688 
689 /*
690  * EVENT controls
691  */
692 #define	IPW2200_IMEM_EVENT_CTL	(0x00300004)
693 /*
694  * EEPROM controls
695  */
696 #define	IPW2200_IMEM_EEPROM_CTL	(0x00300040)
697 
698 #define	IPW2200_EEPROM_DELAY	(1) /* minimum hold time(microsecond) */
699 
700 /*
701  * possible flags for register IWI_MEM_EVENT
702  */
703 #define	IPW2200_LED_ASSOC	(1 << 5)
704 #define	IPW2200_LED_MASK	(0xd9fffffb)
705 
706 /*
707  * control and status registers access macros
708  */
709 extern uint8_t ipw2200_csr_get8(struct ipw2200_softc *sc, uint32_t off);
710 extern uint16_t ipw2200_csr_get16(struct ipw2200_softc *sc, uint32_t off);
711 extern uint32_t ipw2200_csr_get32(struct ipw2200_softc *sc, uint32_t off);
712 extern void ipw2200_csr_getbuf32(struct ipw2200_softc *sc, uint32_t off,
713     uint32_t *buf, size_t cnt);
714 extern void ipw2200_csr_put8(struct ipw2200_softc *sc, uint32_t off,
715     uint8_t val);
716 extern void ipw2200_csr_put16(struct ipw2200_softc *sc, uint32_t off,
717     uint16_t val);
718 extern void ipw2200_csr_put32(struct ipw2200_softc *sc, uint32_t off,
719     uint32_t val);
720 /*
721  * indirect memory space access macros
722  */
723 extern uint8_t ipw2200_imem_get8(struct ipw2200_softc *sc, uint32_t addr);
724 extern uint16_t ipw2200_imem_get16(struct ipw2200_softc *sc,
725     uint32_t addr);
726 extern uint32_t ipw2200_imem_get32(struct ipw2200_softc *sc,
727     uint32_t addr);
728 extern void ipw2200_imem_put8(struct ipw2200_softc *sc, uint32_t addr,
729     uint8_t val);
730 extern void ipw2200_imem_put16(struct ipw2200_softc *sc, uint32_t addr,
731     uint16_t val);
732 extern void ipw2200_imem_put32(struct ipw2200_softc *sc, uint32_t addr,
733     uint32_t val);
734 /*
735  * EEPROM access macro
736  */
737 extern void ipw2200_rom_control(struct ipw2200_softc *sc, uint32_t val);
738 extern uint16_t ipw2200_rom_get16(struct ipw2200_softc *sc, uint8_t addr);
739 
740 /*
741  * Firmware related definations and interfaces.
742  */
743 extern int ipw2200_cache_firmware(struct ipw2200_softc *sc);
744 extern int ipw2200_free_firmware(struct ipw2200_softc *sc);
745 extern int ipw2200_load_uc(struct ipw2200_softc *sc, uint8_t *buf, size_t size);
746 extern int ipw2200_load_fw(struct ipw2200_softc *sc, uint8_t *buf, size_t size);
747 
748 #ifdef __cplusplus
749 }
750 #endif
751 
752 #endif /* _SYS_IPW2200_IMPL_H */
753