xref: /titanic_41/usr/src/uts/common/io/hxge/hpi.h (revision e11c3f44f531fdff80941ce57c065d2ae861cefc)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _HPI_H
27 #define	_HPI_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifdef	__cplusplus
32 extern "C" {
33 #endif
34 
35 #include <sys/types.h>
36 #include <hxge_common_impl.h>
37 #include <hxge_common.h>
38 
39 typedef	uint32_t hpi_status_t;
40 
41 /* Common Block ID */
42 #define	VMAC_BLK_ID			0x1
43 #define	TXDMA_BLK_ID			0x2
44 #define	RXDMA_BLK_ID			0x3
45 #define	PFC_BLK_ID			0x4
46 #define	VIR_BLK_ID			0x5
47 #define	PEU_BLK_ID			0x6
48 
49 /* Common HW error code */
50 /* HW unable to exit from reset state. */
51 #define	RESET_FAILED			0x81
52 
53 /* Write operation failed on indirect write. */
54 #define	WRITE_FAILED			0x82
55 /* Read operation failed on indirect read.	 */
56 #define	READ_FAILED			0x83
57 
58 /* Common SW errors code */
59 
60 #define	PORT_INVALID			0x41	/* Invalid port number */
61 #define	CHANNEL_INVALID			0x42	/* Invalid dma channel number */
62 #define	OPCODE_INVALID			0x43	/* Invalid opcode */
63 #define	REGISTER_INVALID		0x44	/* Invalid register number */
64 #define	COUNTER_INVALID			0x45	/* Invalid counter number */
65 #define	CONFIG_INVALID			0x46	/* Invalid config input */
66 #define	LOGICAL_PAGE_INVALID		0x47	/* Invalid logical page # */
67 #define	VLAN_INVALID			0x48	/* Invalid Vlan ID */
68 #define	RDC_TAB_INVALID			0x49	/* Invalid RDC Group Number */
69 #define	LOCATION_INVALID		0x4a	/* Invalid Entry Location */
70 
71 #define	HPI_SUCCESS			0		/* Operation succeed */
72 #define	HPI_FAILURE			0x80000000	/* Operation failed */
73 
74 /*
75  * Block identifier starts at bit 8.
76  */
77 #define	HPI_BLOCK_ID_SHIFT		8
78 
79 /*
80  * Port, channel and misc. information starts at bit 12.
81  */
82 #define	HPI_PORT_CHAN_SHIFT		12
83 
84 /*
85  * Software Block specific error codes start at 0x50.
86  */
87 #define	HPI_BK_ERROR_START		0x50
88 
89 /*
90  * Hardware block specific error codes start at 0x90.
91  */
92 #define	HPI_BK_HW_ER_START		0x90
93 
94 /* Structures for register tracing */
95 
96 typedef struct _rt_buf {
97 	uint32_t	ctl_addr;
98 	uint32_t	val_l32;
99 	uint32_t	val_h32;
100 } rt_buf_t;
101 
102 /*
103  * Control Address field format
104  *
105  * Bit 0 - 23: Address
106  * Bit 24 - 25: Function Number
107  * Bit 26 - 29: Instance Number
108  * Bit 30: Read/Write Direction bit
109  * Bit 31: Invalid bit
110  */
111 
112 #define	MAX_RTRACE_ENTRIES	1024
113 #define	MAX_RTRACE_IOC_ENTRIES	64
114 #define	TRACE_ADDR_MASK		0x00FFFFFF
115 #define	TRACE_FUNC_MASK		0x03000000
116 #define	TRACE_INST_MASK		0x3C000000
117 #define	TRACE_CTL_WR		0x40000000
118 #define	TRACE_CTL_INVALID	0x80000000
119 #define	TRACE_FUNC_SHIFT	24
120 #define	TRACE_INST_SHIFT	26
121 #define	MSG_BUF_SIZE		1024
122 
123 
124 typedef struct _rtrace {
125 	uint16_t	next_idx;
126 	uint16_t	last_idx;
127 	boolean_t	wrapped;
128 	rt_buf_t	buf[MAX_RTRACE_ENTRIES];
129 } rtrace_t;
130 
131 /* Configuration options */
132 typedef enum config_op {
133 	DISABLE = 0,
134 	ENABLE,
135 	INIT
136 } config_op_t;
137 
138 /* I/O options */
139 typedef enum io_op {
140 	OP_SET = 0,
141 	OP_GET,
142 	OP_UPDATE,
143 	OP_CLEAR
144 } io_op_t;
145 
146 /* HPI Handle */
147 typedef	struct	_hpi_handle_function {
148 	uint16_t		instance;
149 	uint16_t		function;
150 } hpi_handle_function_t;
151 
152 /* HPI Handle */
153 typedef	struct	_hpi_handle {
154 	hpi_reg_handle_t	regh;
155 	hpi_reg_ptr_t		regp;
156 	boolean_t		is_vraddr; /* virtualization region address */
157 	hpi_handle_function_t	function;
158 	void			*hxgep;
159 } hpi_handle_t;
160 
161 extern	rtrace_t hpi_rtracebuf;
162 void hpi_rtrace_update(hpi_handle_t handle, boolean_t wr, rtrace_t *rt,
163     uint32_t addr, uint64_t val);
164 void hpi_rtrace_buf_init(rtrace_t *rt);
165 
166 void hpi_debug_msg(hpi_handle_function_t function, uint64_t level,
167     char *fmt, ...);
168 
169 #ifdef	HPI_DEBUG
170 #define	HPI_DEBUG_MSG(params) hpi_debug_msg params
171 #else
172 #define	HPI_DEBUG_MSG(params)
173 #endif
174 
175 #define	HPI_ERROR_MSG(params) hpi_debug_msg params
176 
177 #ifdef	__cplusplus
178 }
179 #endif
180 
181 #endif	/* _HPI_H */
182