1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms of the CDDLv1. 24 */ 25 26 /* 27 * ********************************************************************** 28 * * 29 * Module Name: e1000g_stat.c * 30 * * 31 * Abstract: Functions for processing statistics * 32 * * 33 * ********************************************************************** 34 */ 35 #include "e1000g_sw.h" 36 #include "e1000g_debug.h" 37 38 static int e1000g_update_stats(kstat_t *ksp, int rw); 39 40 /* 41 * e1000_tbi_adjust_stats 42 * 43 * Adjusts statistic counters when a frame is accepted 44 * under the TBI workaround. This function has been 45 * adapted for Solaris from shared code. 46 */ 47 void 48 e1000_tbi_adjust_stats(struct e1000g *Adapter, 49 uint32_t frame_len, uint8_t *mac_addr) 50 { 51 uint32_t carry_bit; 52 p_e1000g_stat_t e1000g_ksp; 53 54 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 55 56 /* First adjust the frame length */ 57 frame_len--; 58 59 /* 60 * We need to adjust the statistics counters, since the hardware 61 * counters overcount this packet as a CRC error and undercount 62 * the packet as a good packet 63 */ 64 /* This packet should not be counted as a CRC error */ 65 e1000g_ksp->Crcerrs.value.ul--; 66 /* This packet does count as a Good Packet Received */ 67 e1000g_ksp->Gprc.value.ul++; 68 69 /* 70 * Adjust the Good Octets received counters 71 */ 72 carry_bit = 0x80000000 & e1000g_ksp->Gorl.value.ul; 73 e1000g_ksp->Gorl.value.ul += frame_len; 74 /* 75 * If the high bit of Gorcl (the low 32 bits of the Good Octets 76 * Received Count) was one before the addition, 77 * AND it is zero after, then we lost the carry out, 78 * need to add one to Gorch (Good Octets Received Count High). 79 * This could be simplified if all environments supported 80 * 64-bit integers. 81 */ 82 if (carry_bit && ((e1000g_ksp->Gorl.value.ul & 0x80000000) == 0)) { 83 e1000g_ksp->Gorh.value.ul++; 84 } 85 /* 86 * Is this a broadcast or multicast? Check broadcast first, 87 * since the test for a multicast frame will test positive on 88 * a broadcast frame. 89 */ 90 if ((mac_addr[0] == (uint8_t)0xff) && 91 (mac_addr[1] == (uint8_t)0xff)) { 92 /* 93 * Broadcast packet 94 */ 95 e1000g_ksp->Bprc.value.ul++; 96 } else if (*mac_addr & 0x01) { 97 /* 98 * Multicast packet 99 */ 100 e1000g_ksp->Mprc.value.ul++; 101 } 102 103 if (frame_len == Adapter->max_frame_size) { 104 /* 105 * In this case, the hardware has overcounted the number of 106 * oversize frames. 107 */ 108 if (e1000g_ksp->Roc.value.ul > 0) 109 e1000g_ksp->Roc.value.ul--; 110 } 111 112 #ifdef E1000G_DEBUG 113 /* 114 * Adjust the bin counters when the extra byte put the frame in the 115 * wrong bin. Remember that the frame_len was adjusted above. 116 */ 117 if (frame_len == 64) { 118 e1000g_ksp->Prc64.value.ul++; 119 e1000g_ksp->Prc127.value.ul--; 120 } else if (frame_len == 127) { 121 e1000g_ksp->Prc127.value.ul++; 122 e1000g_ksp->Prc255.value.ul--; 123 } else if (frame_len == 255) { 124 e1000g_ksp->Prc255.value.ul++; 125 e1000g_ksp->Prc511.value.ul--; 126 } else if (frame_len == 511) { 127 e1000g_ksp->Prc511.value.ul++; 128 e1000g_ksp->Prc1023.value.ul--; 129 } else if (frame_len == 1023) { 130 e1000g_ksp->Prc1023.value.ul++; 131 e1000g_ksp->Prc1522.value.ul--; 132 } else if (frame_len == 1522) { 133 e1000g_ksp->Prc1522.value.ul++; 134 } 135 #endif 136 } 137 138 139 /* 140 * e1000g_update_stats - update driver private kstat counters 141 * 142 * This routine will dump and reset the e1000's internal 143 * statistics counters. The current stats dump values will 144 * be sent to the kernel status area. 145 */ 146 static int 147 e1000g_update_stats(kstat_t *ksp, int rw) 148 { 149 struct e1000g *Adapter; 150 struct e1000_hw *hw; 151 p_e1000g_stat_t e1000g_ksp; 152 e1000g_tx_ring_t *tx_ring; 153 e1000g_rx_ring_t *rx_ring; 154 uint64_t val; 155 uint32_t low_val, high_val; 156 157 if (rw == KSTAT_WRITE) 158 return (EACCES); 159 160 Adapter = (struct e1000g *)ksp->ks_private; 161 ASSERT(Adapter != NULL); 162 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 163 ASSERT(e1000g_ksp != NULL); 164 hw = &Adapter->shared; 165 166 tx_ring = Adapter->tx_ring; 167 rx_ring = Adapter->rx_ring; 168 169 rw_enter(&Adapter->chip_lock, RW_WRITER); 170 171 e1000g_ksp->link_speed.value.ul = Adapter->link_speed; 172 e1000g_ksp->reset_count.value.ul = Adapter->reset_count; 173 174 e1000g_ksp->rx_error.value.ul = rx_ring->stat_error; 175 e1000g_ksp->rx_esballoc_fail.value.ul = rx_ring->stat_esballoc_fail; 176 e1000g_ksp->rx_allocb_fail.value.ul = rx_ring->stat_allocb_fail; 177 178 e1000g_ksp->tx_no_swpkt.value.ul = tx_ring->stat_no_swpkt; 179 e1000g_ksp->tx_no_desc.value.ul = tx_ring->stat_no_desc; 180 e1000g_ksp->tx_send_fail.value.ul = tx_ring->stat_send_fail; 181 e1000g_ksp->tx_reschedule.value.ul = tx_ring->stat_reschedule; 182 e1000g_ksp->tx_over_size.value.ul = tx_ring->stat_over_size; 183 184 #ifdef E1000G_DEBUG 185 e1000g_ksp->rx_none.value.ul = rx_ring->stat_none; 186 e1000g_ksp->rx_multi_desc.value.ul = rx_ring->stat_multi_desc; 187 e1000g_ksp->rx_no_freepkt.value.ul = rx_ring->stat_no_freepkt; 188 e1000g_ksp->rx_avail_freepkt.value.ul = rx_ring->avail_freepkt; 189 190 e1000g_ksp->tx_under_size.value.ul = tx_ring->stat_under_size; 191 e1000g_ksp->tx_exceed_frags.value.ul = tx_ring->stat_exceed_frags; 192 e1000g_ksp->tx_empty_frags.value.ul = tx_ring->stat_empty_frags; 193 e1000g_ksp->tx_recycle.value.ul = tx_ring->stat_recycle; 194 e1000g_ksp->tx_recycle_intr.value.ul = tx_ring->stat_recycle_intr; 195 e1000g_ksp->tx_recycle_retry.value.ul = tx_ring->stat_recycle_retry; 196 e1000g_ksp->tx_recycle_none.value.ul = tx_ring->stat_recycle_none; 197 e1000g_ksp->tx_copy.value.ul = tx_ring->stat_copy; 198 e1000g_ksp->tx_bind.value.ul = tx_ring->stat_bind; 199 e1000g_ksp->tx_multi_copy.value.ul = tx_ring->stat_multi_copy; 200 e1000g_ksp->tx_multi_cookie.value.ul = tx_ring->stat_multi_cookie; 201 e1000g_ksp->tx_lack_desc.value.ul = tx_ring->stat_lack_desc; 202 #endif 203 204 /* 205 * Standard Stats 206 */ 207 e1000g_ksp->Mpc.value.ul += E1000_READ_REG(hw, E1000_MPC); 208 e1000g_ksp->Rlec.value.ul += E1000_READ_REG(hw, E1000_RLEC); 209 e1000g_ksp->Xonrxc.value.ul += E1000_READ_REG(hw, E1000_XONRXC); 210 e1000g_ksp->Xontxc.value.ul += E1000_READ_REG(hw, E1000_XONTXC); 211 e1000g_ksp->Xoffrxc.value.ul += E1000_READ_REG(hw, E1000_XOFFRXC); 212 e1000g_ksp->Xofftxc.value.ul += E1000_READ_REG(hw, E1000_XOFFTXC); 213 e1000g_ksp->Fcruc.value.ul += E1000_READ_REG(hw, E1000_FCRUC); 214 215 if ((hw->mac.type != e1000_ich8lan) && 216 (hw->mac.type != e1000_ich9lan)) { 217 e1000g_ksp->Symerrs.value.ul += 218 E1000_READ_REG(hw, E1000_SYMERRS); 219 #ifdef E1000G_DEBUG 220 e1000g_ksp->Prc64.value.ul += 221 E1000_READ_REG(hw, E1000_PRC64); 222 e1000g_ksp->Prc127.value.ul += 223 E1000_READ_REG(hw, E1000_PRC127); 224 e1000g_ksp->Prc255.value.ul += 225 E1000_READ_REG(hw, E1000_PRC255); 226 e1000g_ksp->Prc511.value.ul += 227 E1000_READ_REG(hw, E1000_PRC511); 228 e1000g_ksp->Prc1023.value.ul += 229 E1000_READ_REG(hw, E1000_PRC1023); 230 e1000g_ksp->Prc1522.value.ul += 231 E1000_READ_REG(hw, E1000_PRC1522); 232 233 e1000g_ksp->Ptc64.value.ul += 234 E1000_READ_REG(hw, E1000_PTC64); 235 e1000g_ksp->Ptc127.value.ul += 236 E1000_READ_REG(hw, E1000_PTC127); 237 e1000g_ksp->Ptc255.value.ul += 238 E1000_READ_REG(hw, E1000_PTC255); 239 e1000g_ksp->Ptc511.value.ul += 240 E1000_READ_REG(hw, E1000_PTC511); 241 e1000g_ksp->Ptc1023.value.ul += 242 E1000_READ_REG(hw, E1000_PTC1023); 243 e1000g_ksp->Ptc1522.value.ul += 244 E1000_READ_REG(hw, E1000_PTC1522); 245 #endif 246 } 247 248 e1000g_ksp->Gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC); 249 e1000g_ksp->Gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC); 250 e1000g_ksp->Ruc.value.ul += E1000_READ_REG(hw, E1000_RUC); 251 e1000g_ksp->Rfc.value.ul += E1000_READ_REG(hw, E1000_RFC); 252 e1000g_ksp->Roc.value.ul += E1000_READ_REG(hw, E1000_ROC); 253 e1000g_ksp->Rjc.value.ul += E1000_READ_REG(hw, E1000_RJC); 254 e1000g_ksp->Tpr.value.ul += E1000_READ_REG(hw, E1000_TPR); 255 e1000g_ksp->Tncrs.value.ul += E1000_READ_REG(hw, E1000_TNCRS); 256 e1000g_ksp->Tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC); 257 e1000g_ksp->Tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC); 258 259 /* 260 * Adaptive Calculations 261 */ 262 hw->mac.tx_packet_delta = E1000_READ_REG(hw, E1000_TPT); 263 e1000g_ksp->Tpt.value.ul += hw->mac.tx_packet_delta; 264 265 /* 266 * The 64-bit register will reset whenever the upper 267 * 32 bits are read. So we need to read the lower 268 * 32 bits first, then read the upper 32 bits. 269 */ 270 low_val = E1000_READ_REG(hw, E1000_GORCL); 271 high_val = E1000_READ_REG(hw, E1000_GORCH); 272 val = (uint64_t)e1000g_ksp->Gorh.value.ul << 32 | 273 (uint64_t)e1000g_ksp->Gorl.value.ul; 274 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 275 e1000g_ksp->Gorl.value.ul = (uint32_t)val; 276 e1000g_ksp->Gorh.value.ul = (uint32_t)(val >> 32); 277 278 low_val = E1000_READ_REG(hw, E1000_GOTCL); 279 high_val = E1000_READ_REG(hw, E1000_GOTCH); 280 val = (uint64_t)e1000g_ksp->Goth.value.ul << 32 | 281 (uint64_t)e1000g_ksp->Gotl.value.ul; 282 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 283 e1000g_ksp->Gotl.value.ul = (uint32_t)val; 284 e1000g_ksp->Goth.value.ul = (uint32_t)(val >> 32); 285 286 low_val = E1000_READ_REG(hw, E1000_TORL); 287 high_val = E1000_READ_REG(hw, E1000_TORH); 288 val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 289 (uint64_t)e1000g_ksp->Torl.value.ul; 290 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 291 e1000g_ksp->Torl.value.ul = (uint32_t)val; 292 e1000g_ksp->Torh.value.ul = (uint32_t)(val >> 32); 293 294 low_val = E1000_READ_REG(hw, E1000_TOTL); 295 high_val = E1000_READ_REG(hw, E1000_TOTH); 296 val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 297 (uint64_t)e1000g_ksp->Totl.value.ul; 298 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 299 e1000g_ksp->Totl.value.ul = (uint32_t)val; 300 e1000g_ksp->Toth.value.ul = (uint32_t)(val >> 32); 301 302 rw_exit(&Adapter->chip_lock); 303 304 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 305 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 306 307 return (0); 308 } 309 310 int 311 e1000g_m_stat(void *arg, uint_t stat, uint64_t *val) 312 { 313 struct e1000g *Adapter = (struct e1000g *)arg; 314 struct e1000_hw *hw = &Adapter->shared; 315 p_e1000g_stat_t e1000g_ksp; 316 uint32_t low_val, high_val; 317 318 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 319 320 rw_enter(&Adapter->chip_lock, RW_READER); 321 322 switch (stat) { 323 case MAC_STAT_IFSPEED: 324 *val = Adapter->link_speed * 1000000ull; 325 break; 326 327 case MAC_STAT_MULTIRCV: 328 e1000g_ksp->Mprc.value.ul += 329 E1000_READ_REG(hw, E1000_MPRC); 330 *val = e1000g_ksp->Mprc.value.ul; 331 break; 332 333 case MAC_STAT_BRDCSTRCV: 334 e1000g_ksp->Bprc.value.ul += 335 E1000_READ_REG(hw, E1000_BPRC); 336 *val = e1000g_ksp->Bprc.value.ul; 337 break; 338 339 case MAC_STAT_MULTIXMT: 340 e1000g_ksp->Mptc.value.ul += 341 E1000_READ_REG(hw, E1000_MPTC); 342 *val = e1000g_ksp->Mptc.value.ul; 343 break; 344 345 case MAC_STAT_BRDCSTXMT: 346 e1000g_ksp->Bptc.value.ul += 347 E1000_READ_REG(hw, E1000_BPTC); 348 *val = e1000g_ksp->Bptc.value.ul; 349 break; 350 351 case MAC_STAT_NORCVBUF: 352 e1000g_ksp->Rnbc.value.ul += 353 E1000_READ_REG(hw, E1000_RNBC); 354 *val = e1000g_ksp->Rnbc.value.ul; 355 break; 356 357 case MAC_STAT_IERRORS: 358 e1000g_ksp->Rxerrc.value.ul += 359 E1000_READ_REG(hw, E1000_RXERRC); 360 e1000g_ksp->Algnerrc.value.ul += 361 E1000_READ_REG(hw, E1000_ALGNERRC); 362 e1000g_ksp->Rlec.value.ul += 363 E1000_READ_REG(hw, E1000_RLEC); 364 e1000g_ksp->Crcerrs.value.ul += 365 E1000_READ_REG(hw, E1000_CRCERRS); 366 e1000g_ksp->Cexterr.value.ul += 367 E1000_READ_REG(hw, E1000_CEXTERR); 368 *val = e1000g_ksp->Rxerrc.value.ul + 369 e1000g_ksp->Algnerrc.value.ul + 370 e1000g_ksp->Rlec.value.ul + 371 e1000g_ksp->Crcerrs.value.ul + 372 e1000g_ksp->Cexterr.value.ul; 373 break; 374 375 case MAC_STAT_NOXMTBUF: 376 *val = Adapter->tx_ring->stat_no_desc; 377 break; 378 379 case MAC_STAT_OERRORS: 380 e1000g_ksp->Ecol.value.ul += 381 E1000_READ_REG(hw, E1000_ECOL); 382 *val = e1000g_ksp->Ecol.value.ul; 383 break; 384 385 case MAC_STAT_COLLISIONS: 386 e1000g_ksp->Colc.value.ul += 387 E1000_READ_REG(hw, E1000_COLC); 388 *val = e1000g_ksp->Colc.value.ul; 389 break; 390 391 case MAC_STAT_RBYTES: 392 /* 393 * The 64-bit register will reset whenever the upper 394 * 32 bits are read. So we need to read the lower 395 * 32 bits first, then read the upper 32 bits. 396 */ 397 low_val = E1000_READ_REG(hw, E1000_TORL); 398 high_val = E1000_READ_REG(hw, E1000_TORH); 399 *val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 400 (uint64_t)e1000g_ksp->Torl.value.ul; 401 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 402 403 e1000g_ksp->Torl.value.ul = (uint32_t)*val; 404 e1000g_ksp->Torh.value.ul = (uint32_t)(*val >> 32); 405 break; 406 407 case MAC_STAT_IPACKETS: 408 e1000g_ksp->Tpr.value.ul += 409 E1000_READ_REG(hw, E1000_TPR); 410 *val = e1000g_ksp->Tpr.value.ul; 411 break; 412 413 case MAC_STAT_OBYTES: 414 /* 415 * The 64-bit register will reset whenever the upper 416 * 32 bits are read. So we need to read the lower 417 * 32 bits first, then read the upper 32 bits. 418 */ 419 low_val = E1000_READ_REG(hw, E1000_TOTL); 420 high_val = E1000_READ_REG(hw, E1000_TOTH); 421 *val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 422 (uint64_t)e1000g_ksp->Totl.value.ul; 423 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 424 425 e1000g_ksp->Totl.value.ul = (uint32_t)*val; 426 e1000g_ksp->Toth.value.ul = (uint32_t)(*val >> 32); 427 break; 428 429 case MAC_STAT_OPACKETS: 430 e1000g_ksp->Tpt.value.ul += 431 E1000_READ_REG(hw, E1000_TPT); 432 *val = e1000g_ksp->Tpt.value.ul; 433 break; 434 435 case ETHER_STAT_ALIGN_ERRORS: 436 e1000g_ksp->Algnerrc.value.ul += 437 E1000_READ_REG(hw, E1000_ALGNERRC); 438 *val = e1000g_ksp->Algnerrc.value.ul; 439 break; 440 441 case ETHER_STAT_FCS_ERRORS: 442 e1000g_ksp->Crcerrs.value.ul += 443 E1000_READ_REG(hw, E1000_CRCERRS); 444 *val = e1000g_ksp->Crcerrs.value.ul; 445 break; 446 447 case ETHER_STAT_SQE_ERRORS: 448 e1000g_ksp->Sec.value.ul += 449 E1000_READ_REG(hw, E1000_SEC); 450 *val = e1000g_ksp->Sec.value.ul; 451 break; 452 453 case ETHER_STAT_CARRIER_ERRORS: 454 e1000g_ksp->Cexterr.value.ul += 455 E1000_READ_REG(hw, E1000_CEXTERR); 456 *val = e1000g_ksp->Cexterr.value.ul; 457 break; 458 459 case ETHER_STAT_EX_COLLISIONS: 460 e1000g_ksp->Ecol.value.ul += 461 E1000_READ_REG(hw, E1000_ECOL); 462 *val = e1000g_ksp->Ecol.value.ul; 463 break; 464 465 case ETHER_STAT_TX_LATE_COLLISIONS: 466 e1000g_ksp->Latecol.value.ul += 467 E1000_READ_REG(hw, E1000_LATECOL); 468 *val = e1000g_ksp->Latecol.value.ul; 469 break; 470 471 case ETHER_STAT_DEFER_XMTS: 472 e1000g_ksp->Dc.value.ul += 473 E1000_READ_REG(hw, E1000_DC); 474 *val = e1000g_ksp->Dc.value.ul; 475 break; 476 477 case ETHER_STAT_FIRST_COLLISIONS: 478 e1000g_ksp->Scc.value.ul += 479 E1000_READ_REG(hw, E1000_SCC); 480 *val = e1000g_ksp->Scc.value.ul; 481 break; 482 483 case ETHER_STAT_MULTI_COLLISIONS: 484 e1000g_ksp->Mcc.value.ul += 485 E1000_READ_REG(hw, E1000_MCC); 486 *val = e1000g_ksp->Mcc.value.ul; 487 break; 488 489 case ETHER_STAT_MACRCV_ERRORS: 490 e1000g_ksp->Rxerrc.value.ul += 491 E1000_READ_REG(hw, E1000_RXERRC); 492 *val = e1000g_ksp->Rxerrc.value.ul; 493 break; 494 495 case ETHER_STAT_MACXMT_ERRORS: 496 e1000g_ksp->Ecol.value.ul += 497 E1000_READ_REG(hw, E1000_ECOL); 498 *val = e1000g_ksp->Ecol.value.ul; 499 break; 500 501 case ETHER_STAT_TOOLONG_ERRORS: 502 e1000g_ksp->Roc.value.ul += 503 E1000_READ_REG(hw, E1000_ROC); 504 *val = e1000g_ksp->Roc.value.ul; 505 break; 506 507 case ETHER_STAT_XCVR_ADDR: 508 /* The Internal PHY's MDI address for each MAC is 1 */ 509 *val = 1; 510 break; 511 512 case ETHER_STAT_XCVR_ID: 513 *val = hw->phy.id | hw->phy.revision; 514 break; 515 516 case ETHER_STAT_XCVR_INUSE: 517 switch (Adapter->link_speed) { 518 case SPEED_1000: 519 *val = 520 (hw->phy.media_type == e1000_media_type_copper) ? 521 XCVR_1000T : XCVR_1000X; 522 break; 523 case SPEED_100: 524 *val = 525 (hw->phy.media_type == e1000_media_type_copper) ? 526 (Adapter->phy_status & MII_SR_100T4_CAPS) ? 527 XCVR_100T4 : XCVR_100T2 : XCVR_100X; 528 break; 529 case SPEED_10: 530 *val = XCVR_10; 531 break; 532 default: 533 *val = XCVR_NONE; 534 break; 535 } 536 break; 537 538 case ETHER_STAT_CAP_1000FDX: 539 *val = Adapter->param_1000fdx_cap; 540 break; 541 542 case ETHER_STAT_CAP_1000HDX: 543 *val = Adapter->param_1000hdx_cap; 544 break; 545 546 case ETHER_STAT_CAP_100FDX: 547 *val = Adapter->param_100fdx_cap; 548 break; 549 550 case ETHER_STAT_CAP_100HDX: 551 *val = Adapter->param_100hdx_cap; 552 break; 553 554 case ETHER_STAT_CAP_10FDX: 555 *val = Adapter->param_10fdx_cap; 556 break; 557 558 case ETHER_STAT_CAP_10HDX: 559 *val = Adapter->param_10hdx_cap; 560 break; 561 562 case ETHER_STAT_CAP_ASMPAUSE: 563 *val = Adapter->param_asym_pause_cap; 564 break; 565 566 case ETHER_STAT_CAP_PAUSE: 567 *val = Adapter->param_pause_cap; 568 break; 569 570 case ETHER_STAT_CAP_AUTONEG: 571 *val = Adapter->param_autoneg_cap; 572 break; 573 574 case ETHER_STAT_ADV_CAP_1000FDX: 575 *val = Adapter->param_adv_1000fdx; 576 break; 577 578 case ETHER_STAT_ADV_CAP_1000HDX: 579 *val = Adapter->param_adv_1000hdx; 580 break; 581 582 case ETHER_STAT_ADV_CAP_100FDX: 583 *val = Adapter->param_adv_100fdx; 584 break; 585 586 case ETHER_STAT_ADV_CAP_100HDX: 587 *val = Adapter->param_adv_100hdx; 588 break; 589 590 case ETHER_STAT_ADV_CAP_10FDX: 591 *val = Adapter->param_adv_10fdx; 592 break; 593 594 case ETHER_STAT_ADV_CAP_10HDX: 595 *val = Adapter->param_adv_10hdx; 596 break; 597 598 case ETHER_STAT_ADV_CAP_ASMPAUSE: 599 *val = Adapter->param_adv_asym_pause; 600 break; 601 602 case ETHER_STAT_ADV_CAP_PAUSE: 603 *val = Adapter->param_adv_pause; 604 break; 605 606 case ETHER_STAT_ADV_CAP_AUTONEG: 607 *val = hw->mac.autoneg; 608 break; 609 610 case ETHER_STAT_LP_CAP_1000FDX: 611 *val = Adapter->param_lp_1000fdx; 612 break; 613 614 case ETHER_STAT_LP_CAP_1000HDX: 615 *val = Adapter->param_lp_1000hdx; 616 break; 617 618 case ETHER_STAT_LP_CAP_100FDX: 619 *val = Adapter->param_lp_100fdx; 620 break; 621 622 case ETHER_STAT_LP_CAP_100HDX: 623 *val = Adapter->param_lp_100hdx; 624 break; 625 626 case ETHER_STAT_LP_CAP_10FDX: 627 *val = Adapter->param_lp_10fdx; 628 break; 629 630 case ETHER_STAT_LP_CAP_10HDX: 631 *val = Adapter->param_lp_10hdx; 632 break; 633 634 case ETHER_STAT_LP_CAP_ASMPAUSE: 635 *val = Adapter->param_lp_asym_pause; 636 break; 637 638 case ETHER_STAT_LP_CAP_PAUSE: 639 *val = Adapter->param_lp_pause; 640 break; 641 642 case ETHER_STAT_LP_CAP_AUTONEG: 643 *val = Adapter->param_lp_autoneg; 644 break; 645 646 case ETHER_STAT_LINK_ASMPAUSE: 647 *val = Adapter->param_asym_pause_cap; 648 break; 649 650 case ETHER_STAT_LINK_PAUSE: 651 *val = Adapter->param_pause_cap; 652 break; 653 654 case ETHER_STAT_LINK_AUTONEG: 655 *val = hw->mac.autoneg; 656 break; 657 658 case ETHER_STAT_LINK_DUPLEX: 659 *val = (Adapter->link_duplex == FULL_DUPLEX) ? 660 LINK_DUPLEX_FULL : LINK_DUPLEX_HALF; 661 break; 662 663 case ETHER_STAT_CAP_100T4: 664 *val = Adapter->param_100t4_cap; 665 break; 666 667 case ETHER_STAT_ADV_CAP_100T4: 668 *val = Adapter->param_adv_100t4; 669 break; 670 671 case ETHER_STAT_LP_CAP_100T4: 672 *val = Adapter->param_lp_100t4; 673 break; 674 675 default: 676 rw_exit(&Adapter->chip_lock); 677 return (ENOTSUP); 678 } 679 680 rw_exit(&Adapter->chip_lock); 681 682 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 683 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 684 685 return (0); 686 } 687 688 /* 689 * e1000g_init_stats - initialize kstat data structures 690 * 691 * This routine will create and initialize the driver private 692 * statistics counters. 693 */ 694 int 695 e1000g_init_stats(struct e1000g *Adapter) 696 { 697 kstat_t *ksp; 698 p_e1000g_stat_t e1000g_ksp; 699 700 /* 701 * Create and init kstat 702 */ 703 ksp = kstat_create(WSNAME, ddi_get_instance(Adapter->dip), 704 "statistics", "net", KSTAT_TYPE_NAMED, 705 sizeof (e1000g_stat_t) / sizeof (kstat_named_t), 0); 706 707 if (ksp == NULL) { 708 e1000g_log(Adapter, CE_WARN, 709 "Could not create kernel statistics\n"); 710 return (DDI_FAILURE); 711 } 712 713 Adapter->e1000g_ksp = ksp; /* Fill in the Adapters ksp */ 714 715 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 716 717 /* 718 * Initialize all the statistics 719 */ 720 kstat_named_init(&e1000g_ksp->link_speed, "link_speed", 721 KSTAT_DATA_ULONG); 722 kstat_named_init(&e1000g_ksp->reset_count, "Reset Count", 723 KSTAT_DATA_ULONG); 724 725 kstat_named_init(&e1000g_ksp->rx_error, "Rx Error", 726 KSTAT_DATA_ULONG); 727 kstat_named_init(&e1000g_ksp->rx_esballoc_fail, "Rx Desballoc Failure", 728 KSTAT_DATA_ULONG); 729 kstat_named_init(&e1000g_ksp->rx_allocb_fail, "Rx Allocb Failure", 730 KSTAT_DATA_ULONG); 731 732 kstat_named_init(&e1000g_ksp->tx_no_desc, "Tx No Desc", 733 KSTAT_DATA_ULONG); 734 kstat_named_init(&e1000g_ksp->tx_no_swpkt, "Tx No Buffer", 735 KSTAT_DATA_ULONG); 736 kstat_named_init(&e1000g_ksp->tx_send_fail, "Tx Send Failure", 737 KSTAT_DATA_ULONG); 738 kstat_named_init(&e1000g_ksp->tx_over_size, "Tx Pkt Over Size", 739 KSTAT_DATA_ULONG); 740 kstat_named_init(&e1000g_ksp->tx_reschedule, "Tx Reschedule", 741 KSTAT_DATA_ULONG); 742 743 kstat_named_init(&e1000g_ksp->Mpc, "Recv_Missed_Packets", 744 KSTAT_DATA_ULONG); 745 kstat_named_init(&e1000g_ksp->Symerrs, "Recv_Symbol_Errors", 746 KSTAT_DATA_ULONG); 747 kstat_named_init(&e1000g_ksp->Rlec, "Recv_Length_Errors", 748 KSTAT_DATA_ULONG); 749 kstat_named_init(&e1000g_ksp->Xonrxc, "XONs_Recvd", 750 KSTAT_DATA_ULONG); 751 kstat_named_init(&e1000g_ksp->Xontxc, "XONs_Xmitd", 752 KSTAT_DATA_ULONG); 753 kstat_named_init(&e1000g_ksp->Xoffrxc, "XOFFs_Recvd", 754 KSTAT_DATA_ULONG); 755 kstat_named_init(&e1000g_ksp->Xofftxc, "XOFFs_Xmitd", 756 KSTAT_DATA_ULONG); 757 kstat_named_init(&e1000g_ksp->Fcruc, "Recv_Unsupport_FC_Pkts", 758 KSTAT_DATA_ULONG); 759 #ifdef E1000G_DEBUG 760 kstat_named_init(&e1000g_ksp->Prc64, "Pkts_Recvd_( 64b)", 761 KSTAT_DATA_ULONG); 762 kstat_named_init(&e1000g_ksp->Prc127, "Pkts_Recvd_( 65- 127b)", 763 KSTAT_DATA_ULONG); 764 kstat_named_init(&e1000g_ksp->Prc255, "Pkts_Recvd_( 127- 255b)", 765 KSTAT_DATA_ULONG); 766 kstat_named_init(&e1000g_ksp->Prc511, "Pkts_Recvd_( 256- 511b)", 767 KSTAT_DATA_ULONG); 768 kstat_named_init(&e1000g_ksp->Prc1023, "Pkts_Recvd_( 511-1023b)", 769 KSTAT_DATA_ULONG); 770 kstat_named_init(&e1000g_ksp->Prc1522, "Pkts_Recvd_(1024-1522b)", 771 KSTAT_DATA_ULONG); 772 #endif 773 kstat_named_init(&e1000g_ksp->Gprc, "Good_Pkts_Recvd", 774 KSTAT_DATA_ULONG); 775 kstat_named_init(&e1000g_ksp->Gptc, "Good_Pkts_Xmitd", 776 KSTAT_DATA_ULONG); 777 kstat_named_init(&e1000g_ksp->Gorl, "Good_Octets_Recvd_Lo", 778 KSTAT_DATA_ULONG); 779 kstat_named_init(&e1000g_ksp->Gorh, "Good_Octets_Recvd_Hi", 780 KSTAT_DATA_ULONG); 781 kstat_named_init(&e1000g_ksp->Gotl, "Good_Octets_Xmitd_Lo", 782 KSTAT_DATA_ULONG); 783 kstat_named_init(&e1000g_ksp->Goth, "Good_Octets_Xmitd_Hi", 784 KSTAT_DATA_ULONG); 785 kstat_named_init(&e1000g_ksp->Ruc, "Recv_Undersize", 786 KSTAT_DATA_ULONG); 787 kstat_named_init(&e1000g_ksp->Rfc, "Recv_Frag", 788 KSTAT_DATA_ULONG); 789 kstat_named_init(&e1000g_ksp->Roc, "Recv_Oversize", 790 KSTAT_DATA_ULONG); 791 kstat_named_init(&e1000g_ksp->Rjc, "Recv_Jabber", 792 KSTAT_DATA_ULONG); 793 kstat_named_init(&e1000g_ksp->Torl, "Total_Octets_Recvd_Lo", 794 KSTAT_DATA_ULONG); 795 kstat_named_init(&e1000g_ksp->Torh, "Total_Octets_Recvd_Hi", 796 KSTAT_DATA_ULONG); 797 kstat_named_init(&e1000g_ksp->Totl, "Total_Octets_Xmitd_Lo", 798 KSTAT_DATA_ULONG); 799 kstat_named_init(&e1000g_ksp->Toth, "Total_Octets_Xmitd_Hi", 800 KSTAT_DATA_ULONG); 801 kstat_named_init(&e1000g_ksp->Tpr, "Total_Packets_Recvd", 802 KSTAT_DATA_ULONG); 803 kstat_named_init(&e1000g_ksp->Tpt, "Total_Packets_Xmitd", 804 KSTAT_DATA_ULONG); 805 #ifdef E1000G_DEBUG 806 kstat_named_init(&e1000g_ksp->Ptc64, "Pkts_Xmitd_( 64b)", 807 KSTAT_DATA_ULONG); 808 kstat_named_init(&e1000g_ksp->Ptc127, "Pkts_Xmitd_( 65- 127b)", 809 KSTAT_DATA_ULONG); 810 kstat_named_init(&e1000g_ksp->Ptc255, "Pkts_Xmitd_( 128- 255b)", 811 KSTAT_DATA_ULONG); 812 kstat_named_init(&e1000g_ksp->Ptc511, "Pkts_Xmitd_( 255- 511b)", 813 KSTAT_DATA_ULONG); 814 kstat_named_init(&e1000g_ksp->Ptc1023, "Pkts_Xmitd_( 512-1023b)", 815 KSTAT_DATA_ULONG); 816 kstat_named_init(&e1000g_ksp->Ptc1522, "Pkts_Xmitd_(1024-1522b)", 817 KSTAT_DATA_ULONG); 818 #endif 819 kstat_named_init(&e1000g_ksp->Tncrs, "Xmit_with_No_CRS", 820 KSTAT_DATA_ULONG); 821 kstat_named_init(&e1000g_ksp->Tsctc, "Xmit_TCP_Seg_Contexts", 822 KSTAT_DATA_ULONG); 823 kstat_named_init(&e1000g_ksp->Tsctfc, "Xmit_TCP_Seg_Contexts_Fail", 824 KSTAT_DATA_ULONG); 825 826 #ifdef E1000G_DEBUG 827 kstat_named_init(&e1000g_ksp->rx_none, "Rx No Data", 828 KSTAT_DATA_ULONG); 829 kstat_named_init(&e1000g_ksp->rx_multi_desc, "Rx Span Multi Desc", 830 KSTAT_DATA_ULONG); 831 kstat_named_init(&e1000g_ksp->rx_no_freepkt, "Rx Freelist Empty", 832 KSTAT_DATA_ULONG); 833 kstat_named_init(&e1000g_ksp->rx_avail_freepkt, "Rx Freelist Avail", 834 KSTAT_DATA_ULONG); 835 836 kstat_named_init(&e1000g_ksp->tx_under_size, "Tx Pkt Under Size", 837 KSTAT_DATA_ULONG); 838 kstat_named_init(&e1000g_ksp->tx_exceed_frags, "Tx Exceed Max Frags", 839 KSTAT_DATA_ULONG); 840 kstat_named_init(&e1000g_ksp->tx_empty_frags, "Tx Empty Frags", 841 KSTAT_DATA_ULONG); 842 kstat_named_init(&e1000g_ksp->tx_recycle, "Tx Recycle", 843 KSTAT_DATA_ULONG); 844 kstat_named_init(&e1000g_ksp->tx_recycle_intr, "Tx Recycle Intr", 845 KSTAT_DATA_ULONG); 846 kstat_named_init(&e1000g_ksp->tx_recycle_retry, "Tx Recycle Retry", 847 KSTAT_DATA_ULONG); 848 kstat_named_init(&e1000g_ksp->tx_recycle_none, "Tx Recycled None", 849 KSTAT_DATA_ULONG); 850 kstat_named_init(&e1000g_ksp->tx_copy, "Tx Send Copy", 851 KSTAT_DATA_ULONG); 852 kstat_named_init(&e1000g_ksp->tx_bind, "Tx Send Bind", 853 KSTAT_DATA_ULONG); 854 kstat_named_init(&e1000g_ksp->tx_multi_copy, "Tx Copy Multi Frags", 855 KSTAT_DATA_ULONG); 856 kstat_named_init(&e1000g_ksp->tx_multi_cookie, "Tx Bind Multi Cookies", 857 KSTAT_DATA_ULONG); 858 kstat_named_init(&e1000g_ksp->tx_lack_desc, "Tx Desc Insufficient", 859 KSTAT_DATA_ULONG); 860 #endif 861 862 /* 863 * Function to provide kernel stat update on demand 864 */ 865 ksp->ks_update = e1000g_update_stats; 866 867 /* 868 * Pointer into provider's raw statistics 869 */ 870 ksp->ks_private = (void *)Adapter; 871 872 /* 873 * Add kstat to systems kstat chain 874 */ 875 kstat_install(ksp); 876 877 return (DDI_SUCCESS); 878 } 879