1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* 27 * ********************************************************************** 28 * * 29 * Module Name: e1000g_stat.c * 30 * * 31 * Abstract: Functions for processing statistics * 32 * * 33 * ********************************************************************** 34 */ 35 #include "e1000g_sw.h" 36 #include "e1000g_debug.h" 37 38 static int e1000g_update_stats(kstat_t *ksp, int rw); 39 40 /* 41 * e1000_tbi_adjust_stats 42 * 43 * Adjusts statistic counters when a frame is accepted 44 * under the TBI workaround. This function has been 45 * adapted for Solaris from shared code. 46 */ 47 void 48 e1000_tbi_adjust_stats(struct e1000g *Adapter, 49 uint32_t frame_len, uint8_t *mac_addr) 50 { 51 uint32_t carry_bit; 52 p_e1000g_stat_t e1000g_ksp; 53 54 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 55 56 /* First adjust the frame length */ 57 frame_len--; 58 59 /* 60 * We need to adjust the statistics counters, since the hardware 61 * counters overcount this packet as a CRC error and undercount 62 * the packet as a good packet 63 */ 64 /* This packet should not be counted as a CRC error */ 65 e1000g_ksp->Crcerrs.value.ul--; 66 /* This packet does count as a Good Packet Received */ 67 e1000g_ksp->Gprc.value.ul++; 68 69 /* 70 * Adjust the Good Octets received counters 71 */ 72 carry_bit = 0x80000000 & e1000g_ksp->Gorl.value.ul; 73 e1000g_ksp->Gorl.value.ul += frame_len; 74 /* 75 * If the high bit of Gorcl (the low 32 bits of the Good Octets 76 * Received Count) was one before the addition, 77 * AND it is zero after, then we lost the carry out, 78 * need to add one to Gorch (Good Octets Received Count High). 79 * This could be simplified if all environments supported 80 * 64-bit integers. 81 */ 82 if (carry_bit && ((e1000g_ksp->Gorl.value.ul & 0x80000000) == 0)) { 83 e1000g_ksp->Gorh.value.ul++; 84 } 85 /* 86 * Is this a broadcast or multicast? Check broadcast first, 87 * since the test for a multicast frame will test positive on 88 * a broadcast frame. 89 */ 90 if ((mac_addr[0] == (uint8_t)0xff) && 91 (mac_addr[1] == (uint8_t)0xff)) { 92 /* 93 * Broadcast packet 94 */ 95 e1000g_ksp->Bprc.value.ul++; 96 } else if (*mac_addr & 0x01) { 97 /* 98 * Multicast packet 99 */ 100 e1000g_ksp->Mprc.value.ul++; 101 } 102 103 if (frame_len == Adapter->max_frame_size) { 104 /* 105 * In this case, the hardware has overcounted the number of 106 * oversize frames. 107 */ 108 if (e1000g_ksp->Roc.value.ul > 0) 109 e1000g_ksp->Roc.value.ul--; 110 } 111 112 #ifdef E1000G_DEBUG 113 /* 114 * Adjust the bin counters when the extra byte put the frame in the 115 * wrong bin. Remember that the frame_len was adjusted above. 116 */ 117 if (frame_len == 64) { 118 e1000g_ksp->Prc64.value.ul++; 119 e1000g_ksp->Prc127.value.ul--; 120 } else if (frame_len == 127) { 121 e1000g_ksp->Prc127.value.ul++; 122 e1000g_ksp->Prc255.value.ul--; 123 } else if (frame_len == 255) { 124 e1000g_ksp->Prc255.value.ul++; 125 e1000g_ksp->Prc511.value.ul--; 126 } else if (frame_len == 511) { 127 e1000g_ksp->Prc511.value.ul++; 128 e1000g_ksp->Prc1023.value.ul--; 129 } else if (frame_len == 1023) { 130 e1000g_ksp->Prc1023.value.ul++; 131 e1000g_ksp->Prc1522.value.ul--; 132 } else if (frame_len == 1522) { 133 e1000g_ksp->Prc1522.value.ul++; 134 } 135 #endif 136 } 137 138 139 /* 140 * e1000g_update_stats - update driver private kstat counters 141 * 142 * This routine will dump and reset the e1000's internal 143 * statistics counters. The current stats dump values will 144 * be sent to the kernel status area. 145 */ 146 static int 147 e1000g_update_stats(kstat_t *ksp, int rw) 148 { 149 struct e1000g *Adapter; 150 struct e1000_hw *hw; 151 p_e1000g_stat_t e1000g_ksp; 152 e1000g_tx_ring_t *tx_ring; 153 e1000g_rx_ring_t *rx_ring; 154 e1000g_rx_data_t *rx_data; 155 uint64_t val; 156 uint32_t low_val, high_val; 157 158 if (rw == KSTAT_WRITE) 159 return (EACCES); 160 161 Adapter = (struct e1000g *)ksp->ks_private; 162 ASSERT(Adapter != NULL); 163 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 164 ASSERT(e1000g_ksp != NULL); 165 hw = &Adapter->shared; 166 167 tx_ring = Adapter->tx_ring; 168 rx_ring = Adapter->rx_ring; 169 rx_data = rx_ring->rx_data; 170 171 rw_enter(&Adapter->chip_lock, RW_WRITER); 172 173 e1000g_ksp->link_speed.value.ul = Adapter->link_speed; 174 e1000g_ksp->reset_count.value.ul = Adapter->reset_count; 175 176 e1000g_ksp->rx_error.value.ul = rx_ring->stat_error; 177 e1000g_ksp->rx_allocb_fail.value.ul = rx_ring->stat_allocb_fail; 178 e1000g_ksp->rx_size_error.value.ul = rx_ring->stat_size_error; 179 180 e1000g_ksp->tx_no_swpkt.value.ul = tx_ring->stat_no_swpkt; 181 e1000g_ksp->tx_no_desc.value.ul = tx_ring->stat_no_desc; 182 e1000g_ksp->tx_send_fail.value.ul = tx_ring->stat_send_fail; 183 e1000g_ksp->tx_reschedule.value.ul = tx_ring->stat_reschedule; 184 e1000g_ksp->tx_over_size.value.ul = tx_ring->stat_over_size; 185 186 #ifdef E1000G_DEBUG 187 e1000g_ksp->rx_none.value.ul = rx_ring->stat_none; 188 e1000g_ksp->rx_multi_desc.value.ul = rx_ring->stat_multi_desc; 189 e1000g_ksp->rx_no_freepkt.value.ul = rx_ring->stat_no_freepkt; 190 if (rx_data != NULL) 191 e1000g_ksp->rx_avail_freepkt.value.ul = rx_data->avail_freepkt; 192 193 e1000g_ksp->tx_under_size.value.ul = tx_ring->stat_under_size; 194 e1000g_ksp->tx_exceed_frags.value.ul = tx_ring->stat_exceed_frags; 195 e1000g_ksp->tx_empty_frags.value.ul = tx_ring->stat_empty_frags; 196 e1000g_ksp->tx_recycle.value.ul = tx_ring->stat_recycle; 197 e1000g_ksp->tx_recycle_intr.value.ul = tx_ring->stat_recycle_intr; 198 e1000g_ksp->tx_recycle_retry.value.ul = tx_ring->stat_recycle_retry; 199 e1000g_ksp->tx_recycle_none.value.ul = tx_ring->stat_recycle_none; 200 e1000g_ksp->tx_copy.value.ul = tx_ring->stat_copy; 201 e1000g_ksp->tx_bind.value.ul = tx_ring->stat_bind; 202 e1000g_ksp->tx_multi_copy.value.ul = tx_ring->stat_multi_copy; 203 e1000g_ksp->tx_multi_cookie.value.ul = tx_ring->stat_multi_cookie; 204 e1000g_ksp->tx_lack_desc.value.ul = tx_ring->stat_lack_desc; 205 #endif 206 207 /* 208 * Standard Stats 209 */ 210 e1000g_ksp->Mpc.value.ul += E1000_READ_REG(hw, E1000_MPC); 211 e1000g_ksp->Rlec.value.ul += E1000_READ_REG(hw, E1000_RLEC); 212 e1000g_ksp->Xonrxc.value.ul += E1000_READ_REG(hw, E1000_XONRXC); 213 e1000g_ksp->Xontxc.value.ul += E1000_READ_REG(hw, E1000_XONTXC); 214 e1000g_ksp->Xoffrxc.value.ul += E1000_READ_REG(hw, E1000_XOFFRXC); 215 e1000g_ksp->Xofftxc.value.ul += E1000_READ_REG(hw, E1000_XOFFTXC); 216 e1000g_ksp->Fcruc.value.ul += E1000_READ_REG(hw, E1000_FCRUC); 217 218 if ((hw->mac.type != e1000_ich8lan) && 219 (hw->mac.type != e1000_ich9lan) && 220 (hw->mac.type != e1000_ich10lan)) { 221 e1000g_ksp->Symerrs.value.ul += 222 E1000_READ_REG(hw, E1000_SYMERRS); 223 #ifdef E1000G_DEBUG 224 e1000g_ksp->Prc64.value.ul += 225 E1000_READ_REG(hw, E1000_PRC64); 226 e1000g_ksp->Prc127.value.ul += 227 E1000_READ_REG(hw, E1000_PRC127); 228 e1000g_ksp->Prc255.value.ul += 229 E1000_READ_REG(hw, E1000_PRC255); 230 e1000g_ksp->Prc511.value.ul += 231 E1000_READ_REG(hw, E1000_PRC511); 232 e1000g_ksp->Prc1023.value.ul += 233 E1000_READ_REG(hw, E1000_PRC1023); 234 e1000g_ksp->Prc1522.value.ul += 235 E1000_READ_REG(hw, E1000_PRC1522); 236 237 e1000g_ksp->Ptc64.value.ul += 238 E1000_READ_REG(hw, E1000_PTC64); 239 e1000g_ksp->Ptc127.value.ul += 240 E1000_READ_REG(hw, E1000_PTC127); 241 e1000g_ksp->Ptc255.value.ul += 242 E1000_READ_REG(hw, E1000_PTC255); 243 e1000g_ksp->Ptc511.value.ul += 244 E1000_READ_REG(hw, E1000_PTC511); 245 e1000g_ksp->Ptc1023.value.ul += 246 E1000_READ_REG(hw, E1000_PTC1023); 247 e1000g_ksp->Ptc1522.value.ul += 248 E1000_READ_REG(hw, E1000_PTC1522); 249 #endif 250 } 251 252 e1000g_ksp->Gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC); 253 e1000g_ksp->Gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC); 254 e1000g_ksp->Ruc.value.ul += E1000_READ_REG(hw, E1000_RUC); 255 e1000g_ksp->Rfc.value.ul += E1000_READ_REG(hw, E1000_RFC); 256 e1000g_ksp->Roc.value.ul += E1000_READ_REG(hw, E1000_ROC); 257 e1000g_ksp->Rjc.value.ul += E1000_READ_REG(hw, E1000_RJC); 258 e1000g_ksp->Tpr.value.ul += E1000_READ_REG(hw, E1000_TPR); 259 e1000g_ksp->Tncrs.value.ul += E1000_READ_REG(hw, E1000_TNCRS); 260 e1000g_ksp->Tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC); 261 e1000g_ksp->Tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC); 262 263 /* 264 * Adaptive Calculations 265 */ 266 hw->mac.tx_packet_delta = E1000_READ_REG(hw, E1000_TPT); 267 e1000g_ksp->Tpt.value.ul += hw->mac.tx_packet_delta; 268 269 /* 270 * The 64-bit register will reset whenever the upper 271 * 32 bits are read. So we need to read the lower 272 * 32 bits first, then read the upper 32 bits. 273 */ 274 low_val = E1000_READ_REG(hw, E1000_GORCL); 275 high_val = E1000_READ_REG(hw, E1000_GORCH); 276 val = (uint64_t)e1000g_ksp->Gorh.value.ul << 32 | 277 (uint64_t)e1000g_ksp->Gorl.value.ul; 278 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 279 e1000g_ksp->Gorl.value.ul = (uint32_t)val; 280 e1000g_ksp->Gorh.value.ul = (uint32_t)(val >> 32); 281 282 low_val = E1000_READ_REG(hw, E1000_GOTCL); 283 high_val = E1000_READ_REG(hw, E1000_GOTCH); 284 val = (uint64_t)e1000g_ksp->Goth.value.ul << 32 | 285 (uint64_t)e1000g_ksp->Gotl.value.ul; 286 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 287 e1000g_ksp->Gotl.value.ul = (uint32_t)val; 288 e1000g_ksp->Goth.value.ul = (uint32_t)(val >> 32); 289 290 low_val = E1000_READ_REG(hw, E1000_TORL); 291 high_val = E1000_READ_REG(hw, E1000_TORH); 292 val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 293 (uint64_t)e1000g_ksp->Torl.value.ul; 294 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 295 e1000g_ksp->Torl.value.ul = (uint32_t)val; 296 e1000g_ksp->Torh.value.ul = (uint32_t)(val >> 32); 297 298 low_val = E1000_READ_REG(hw, E1000_TOTL); 299 high_val = E1000_READ_REG(hw, E1000_TOTH); 300 val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 301 (uint64_t)e1000g_ksp->Totl.value.ul; 302 val += (uint64_t)high_val << 32 | (uint64_t)low_val; 303 e1000g_ksp->Totl.value.ul = (uint32_t)val; 304 e1000g_ksp->Toth.value.ul = (uint32_t)(val >> 32); 305 306 rw_exit(&Adapter->chip_lock); 307 308 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 309 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 310 311 return (0); 312 } 313 314 int 315 e1000g_m_stat(void *arg, uint_t stat, uint64_t *val) 316 { 317 struct e1000g *Adapter = (struct e1000g *)arg; 318 struct e1000_hw *hw = &Adapter->shared; 319 p_e1000g_stat_t e1000g_ksp; 320 uint32_t low_val, high_val; 321 322 e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data; 323 324 rw_enter(&Adapter->chip_lock, RW_READER); 325 326 if (Adapter->e1000g_state & E1000G_SUSPENDED) { 327 rw_exit(&Adapter->chip_lock); 328 return (ECANCELED); 329 } 330 331 switch (stat) { 332 case MAC_STAT_IFSPEED: 333 *val = Adapter->link_speed * 1000000ull; 334 break; 335 336 case MAC_STAT_MULTIRCV: 337 e1000g_ksp->Mprc.value.ul += 338 E1000_READ_REG(hw, E1000_MPRC); 339 *val = e1000g_ksp->Mprc.value.ul; 340 break; 341 342 case MAC_STAT_BRDCSTRCV: 343 e1000g_ksp->Bprc.value.ul += 344 E1000_READ_REG(hw, E1000_BPRC); 345 *val = e1000g_ksp->Bprc.value.ul; 346 break; 347 348 case MAC_STAT_MULTIXMT: 349 e1000g_ksp->Mptc.value.ul += 350 E1000_READ_REG(hw, E1000_MPTC); 351 *val = e1000g_ksp->Mptc.value.ul; 352 break; 353 354 case MAC_STAT_BRDCSTXMT: 355 e1000g_ksp->Bptc.value.ul += 356 E1000_READ_REG(hw, E1000_BPTC); 357 *val = e1000g_ksp->Bptc.value.ul; 358 break; 359 360 case MAC_STAT_NORCVBUF: 361 e1000g_ksp->Rnbc.value.ul += 362 E1000_READ_REG(hw, E1000_RNBC); 363 *val = e1000g_ksp->Rnbc.value.ul; 364 break; 365 366 case MAC_STAT_IERRORS: 367 e1000g_ksp->Rxerrc.value.ul += 368 E1000_READ_REG(hw, E1000_RXERRC); 369 e1000g_ksp->Algnerrc.value.ul += 370 E1000_READ_REG(hw, E1000_ALGNERRC); 371 e1000g_ksp->Rlec.value.ul += 372 E1000_READ_REG(hw, E1000_RLEC); 373 e1000g_ksp->Crcerrs.value.ul += 374 E1000_READ_REG(hw, E1000_CRCERRS); 375 e1000g_ksp->Cexterr.value.ul += 376 E1000_READ_REG(hw, E1000_CEXTERR); 377 *val = e1000g_ksp->Rxerrc.value.ul + 378 e1000g_ksp->Algnerrc.value.ul + 379 e1000g_ksp->Rlec.value.ul + 380 e1000g_ksp->Crcerrs.value.ul + 381 e1000g_ksp->Cexterr.value.ul; 382 break; 383 384 case MAC_STAT_NOXMTBUF: 385 *val = Adapter->tx_ring->stat_no_desc; 386 break; 387 388 case MAC_STAT_OERRORS: 389 e1000g_ksp->Ecol.value.ul += 390 E1000_READ_REG(hw, E1000_ECOL); 391 *val = e1000g_ksp->Ecol.value.ul; 392 break; 393 394 case MAC_STAT_COLLISIONS: 395 e1000g_ksp->Colc.value.ul += 396 E1000_READ_REG(hw, E1000_COLC); 397 *val = e1000g_ksp->Colc.value.ul; 398 break; 399 400 case MAC_STAT_RBYTES: 401 /* 402 * The 64-bit register will reset whenever the upper 403 * 32 bits are read. So we need to read the lower 404 * 32 bits first, then read the upper 32 bits. 405 */ 406 low_val = E1000_READ_REG(hw, E1000_TORL); 407 high_val = E1000_READ_REG(hw, E1000_TORH); 408 *val = (uint64_t)e1000g_ksp->Torh.value.ul << 32 | 409 (uint64_t)e1000g_ksp->Torl.value.ul; 410 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 411 412 e1000g_ksp->Torl.value.ul = (uint32_t)*val; 413 e1000g_ksp->Torh.value.ul = (uint32_t)(*val >> 32); 414 break; 415 416 case MAC_STAT_IPACKETS: 417 e1000g_ksp->Tpr.value.ul += 418 E1000_READ_REG(hw, E1000_TPR); 419 *val = e1000g_ksp->Tpr.value.ul; 420 break; 421 422 case MAC_STAT_OBYTES: 423 /* 424 * The 64-bit register will reset whenever the upper 425 * 32 bits are read. So we need to read the lower 426 * 32 bits first, then read the upper 32 bits. 427 */ 428 low_val = E1000_READ_REG(hw, E1000_TOTL); 429 high_val = E1000_READ_REG(hw, E1000_TOTH); 430 *val = (uint64_t)e1000g_ksp->Toth.value.ul << 32 | 431 (uint64_t)e1000g_ksp->Totl.value.ul; 432 *val += (uint64_t)high_val << 32 | (uint64_t)low_val; 433 434 e1000g_ksp->Totl.value.ul = (uint32_t)*val; 435 e1000g_ksp->Toth.value.ul = (uint32_t)(*val >> 32); 436 break; 437 438 case MAC_STAT_OPACKETS: 439 e1000g_ksp->Tpt.value.ul += 440 E1000_READ_REG(hw, E1000_TPT); 441 *val = e1000g_ksp->Tpt.value.ul; 442 break; 443 444 case ETHER_STAT_ALIGN_ERRORS: 445 e1000g_ksp->Algnerrc.value.ul += 446 E1000_READ_REG(hw, E1000_ALGNERRC); 447 *val = e1000g_ksp->Algnerrc.value.ul; 448 break; 449 450 case ETHER_STAT_FCS_ERRORS: 451 e1000g_ksp->Crcerrs.value.ul += 452 E1000_READ_REG(hw, E1000_CRCERRS); 453 *val = e1000g_ksp->Crcerrs.value.ul; 454 break; 455 456 case ETHER_STAT_SQE_ERRORS: 457 e1000g_ksp->Sec.value.ul += 458 E1000_READ_REG(hw, E1000_SEC); 459 *val = e1000g_ksp->Sec.value.ul; 460 break; 461 462 case ETHER_STAT_CARRIER_ERRORS: 463 e1000g_ksp->Cexterr.value.ul += 464 E1000_READ_REG(hw, E1000_CEXTERR); 465 *val = e1000g_ksp->Cexterr.value.ul; 466 break; 467 468 case ETHER_STAT_EX_COLLISIONS: 469 e1000g_ksp->Ecol.value.ul += 470 E1000_READ_REG(hw, E1000_ECOL); 471 *val = e1000g_ksp->Ecol.value.ul; 472 break; 473 474 case ETHER_STAT_TX_LATE_COLLISIONS: 475 e1000g_ksp->Latecol.value.ul += 476 E1000_READ_REG(hw, E1000_LATECOL); 477 *val = e1000g_ksp->Latecol.value.ul; 478 break; 479 480 case ETHER_STAT_DEFER_XMTS: 481 e1000g_ksp->Dc.value.ul += 482 E1000_READ_REG(hw, E1000_DC); 483 *val = e1000g_ksp->Dc.value.ul; 484 break; 485 486 case ETHER_STAT_FIRST_COLLISIONS: 487 e1000g_ksp->Scc.value.ul += 488 E1000_READ_REG(hw, E1000_SCC); 489 *val = e1000g_ksp->Scc.value.ul; 490 break; 491 492 case ETHER_STAT_MULTI_COLLISIONS: 493 e1000g_ksp->Mcc.value.ul += 494 E1000_READ_REG(hw, E1000_MCC); 495 *val = e1000g_ksp->Mcc.value.ul; 496 break; 497 498 case ETHER_STAT_MACRCV_ERRORS: 499 e1000g_ksp->Rxerrc.value.ul += 500 E1000_READ_REG(hw, E1000_RXERRC); 501 *val = e1000g_ksp->Rxerrc.value.ul; 502 break; 503 504 case ETHER_STAT_MACXMT_ERRORS: 505 e1000g_ksp->Ecol.value.ul += 506 E1000_READ_REG(hw, E1000_ECOL); 507 *val = e1000g_ksp->Ecol.value.ul; 508 break; 509 510 case ETHER_STAT_TOOLONG_ERRORS: 511 e1000g_ksp->Roc.value.ul += 512 E1000_READ_REG(hw, E1000_ROC); 513 *val = e1000g_ksp->Roc.value.ul; 514 break; 515 516 case ETHER_STAT_XCVR_ADDR: 517 /* The Internal PHY's MDI address for each MAC is 1 */ 518 *val = 1; 519 break; 520 521 case ETHER_STAT_XCVR_ID: 522 *val = hw->phy.id | hw->phy.revision; 523 break; 524 525 case ETHER_STAT_XCVR_INUSE: 526 switch (Adapter->link_speed) { 527 case SPEED_1000: 528 *val = 529 (hw->phy.media_type == e1000_media_type_copper) ? 530 XCVR_1000T : XCVR_1000X; 531 break; 532 case SPEED_100: 533 *val = 534 (hw->phy.media_type == e1000_media_type_copper) ? 535 (Adapter->phy_status & MII_SR_100T4_CAPS) ? 536 XCVR_100T4 : XCVR_100T2 : XCVR_100X; 537 break; 538 case SPEED_10: 539 *val = XCVR_10; 540 break; 541 default: 542 *val = XCVR_NONE; 543 break; 544 } 545 break; 546 547 case ETHER_STAT_CAP_1000FDX: 548 *val = Adapter->param_1000fdx_cap; 549 break; 550 551 case ETHER_STAT_CAP_1000HDX: 552 *val = Adapter->param_1000hdx_cap; 553 break; 554 555 case ETHER_STAT_CAP_100FDX: 556 *val = Adapter->param_100fdx_cap; 557 break; 558 559 case ETHER_STAT_CAP_100HDX: 560 *val = Adapter->param_100hdx_cap; 561 break; 562 563 case ETHER_STAT_CAP_10FDX: 564 *val = Adapter->param_10fdx_cap; 565 break; 566 567 case ETHER_STAT_CAP_10HDX: 568 *val = Adapter->param_10hdx_cap; 569 break; 570 571 case ETHER_STAT_CAP_ASMPAUSE: 572 *val = Adapter->param_asym_pause_cap; 573 break; 574 575 case ETHER_STAT_CAP_PAUSE: 576 *val = Adapter->param_pause_cap; 577 break; 578 579 case ETHER_STAT_CAP_AUTONEG: 580 *val = Adapter->param_autoneg_cap; 581 break; 582 583 case ETHER_STAT_ADV_CAP_1000FDX: 584 *val = Adapter->param_adv_1000fdx; 585 break; 586 587 case ETHER_STAT_ADV_CAP_1000HDX: 588 *val = Adapter->param_adv_1000hdx; 589 break; 590 591 case ETHER_STAT_ADV_CAP_100FDX: 592 *val = Adapter->param_adv_100fdx; 593 break; 594 595 case ETHER_STAT_ADV_CAP_100HDX: 596 *val = Adapter->param_adv_100hdx; 597 break; 598 599 case ETHER_STAT_ADV_CAP_10FDX: 600 *val = Adapter->param_adv_10fdx; 601 break; 602 603 case ETHER_STAT_ADV_CAP_10HDX: 604 *val = Adapter->param_adv_10hdx; 605 break; 606 607 case ETHER_STAT_ADV_CAP_ASMPAUSE: 608 *val = Adapter->param_adv_asym_pause; 609 break; 610 611 case ETHER_STAT_ADV_CAP_PAUSE: 612 *val = Adapter->param_adv_pause; 613 break; 614 615 case ETHER_STAT_ADV_CAP_AUTONEG: 616 *val = hw->mac.autoneg; 617 break; 618 619 case ETHER_STAT_LP_CAP_1000FDX: 620 *val = Adapter->param_lp_1000fdx; 621 break; 622 623 case ETHER_STAT_LP_CAP_1000HDX: 624 *val = Adapter->param_lp_1000hdx; 625 break; 626 627 case ETHER_STAT_LP_CAP_100FDX: 628 *val = Adapter->param_lp_100fdx; 629 break; 630 631 case ETHER_STAT_LP_CAP_100HDX: 632 *val = Adapter->param_lp_100hdx; 633 break; 634 635 case ETHER_STAT_LP_CAP_10FDX: 636 *val = Adapter->param_lp_10fdx; 637 break; 638 639 case ETHER_STAT_LP_CAP_10HDX: 640 *val = Adapter->param_lp_10hdx; 641 break; 642 643 case ETHER_STAT_LP_CAP_ASMPAUSE: 644 *val = Adapter->param_lp_asym_pause; 645 break; 646 647 case ETHER_STAT_LP_CAP_PAUSE: 648 *val = Adapter->param_lp_pause; 649 break; 650 651 case ETHER_STAT_LP_CAP_AUTONEG: 652 *val = Adapter->param_lp_autoneg; 653 break; 654 655 case ETHER_STAT_LINK_ASMPAUSE: 656 *val = Adapter->param_asym_pause_cap; 657 break; 658 659 case ETHER_STAT_LINK_PAUSE: 660 *val = Adapter->param_pause_cap; 661 break; 662 663 case ETHER_STAT_LINK_AUTONEG: 664 *val = hw->mac.autoneg; 665 break; 666 667 case ETHER_STAT_LINK_DUPLEX: 668 *val = (Adapter->link_duplex == FULL_DUPLEX) ? 669 LINK_DUPLEX_FULL : LINK_DUPLEX_HALF; 670 break; 671 672 case ETHER_STAT_CAP_100T4: 673 *val = Adapter->param_100t4_cap; 674 break; 675 676 case ETHER_STAT_ADV_CAP_100T4: 677 *val = Adapter->param_adv_100t4; 678 break; 679 680 case ETHER_STAT_LP_CAP_100T4: 681 *val = Adapter->param_lp_100t4; 682 break; 683 684 default: 685 rw_exit(&Adapter->chip_lock); 686 return (ENOTSUP); 687 } 688 689 rw_exit(&Adapter->chip_lock); 690 691 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) 692 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED); 693 694 return (0); 695 } 696 697 /* 698 * e1000g_init_stats - initialize kstat data structures 699 * 700 * This routine will create and initialize the driver private 701 * statistics counters. 702 */ 703 int 704 e1000g_init_stats(struct e1000g *Adapter) 705 { 706 kstat_t *ksp; 707 p_e1000g_stat_t e1000g_ksp; 708 709 /* 710 * Create and init kstat 711 */ 712 ksp = kstat_create(WSNAME, ddi_get_instance(Adapter->dip), 713 "statistics", "net", KSTAT_TYPE_NAMED, 714 sizeof (e1000g_stat_t) / sizeof (kstat_named_t), 0); 715 716 if (ksp == NULL) { 717 e1000g_log(Adapter, CE_WARN, 718 "Could not create kernel statistics\n"); 719 return (DDI_FAILURE); 720 } 721 722 Adapter->e1000g_ksp = ksp; /* Fill in the Adapters ksp */ 723 724 e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data; 725 726 /* 727 * Initialize all the statistics 728 */ 729 kstat_named_init(&e1000g_ksp->link_speed, "link_speed", 730 KSTAT_DATA_ULONG); 731 kstat_named_init(&e1000g_ksp->reset_count, "Reset Count", 732 KSTAT_DATA_ULONG); 733 734 kstat_named_init(&e1000g_ksp->rx_error, "Rx Error", 735 KSTAT_DATA_ULONG); 736 kstat_named_init(&e1000g_ksp->rx_allocb_fail, "Rx Allocb Failure", 737 KSTAT_DATA_ULONG); 738 kstat_named_init(&e1000g_ksp->rx_size_error, "Rx Size Error", 739 KSTAT_DATA_ULONG); 740 741 kstat_named_init(&e1000g_ksp->tx_no_desc, "Tx No Desc", 742 KSTAT_DATA_ULONG); 743 kstat_named_init(&e1000g_ksp->tx_no_swpkt, "Tx No Buffer", 744 KSTAT_DATA_ULONG); 745 kstat_named_init(&e1000g_ksp->tx_send_fail, "Tx Send Failure", 746 KSTAT_DATA_ULONG); 747 kstat_named_init(&e1000g_ksp->tx_over_size, "Tx Pkt Over Size", 748 KSTAT_DATA_ULONG); 749 kstat_named_init(&e1000g_ksp->tx_reschedule, "Tx Reschedule", 750 KSTAT_DATA_ULONG); 751 752 kstat_named_init(&e1000g_ksp->Mpc, "Recv_Missed_Packets", 753 KSTAT_DATA_ULONG); 754 kstat_named_init(&e1000g_ksp->Symerrs, "Recv_Symbol_Errors", 755 KSTAT_DATA_ULONG); 756 kstat_named_init(&e1000g_ksp->Rlec, "Recv_Length_Errors", 757 KSTAT_DATA_ULONG); 758 kstat_named_init(&e1000g_ksp->Xonrxc, "XONs_Recvd", 759 KSTAT_DATA_ULONG); 760 kstat_named_init(&e1000g_ksp->Xontxc, "XONs_Xmitd", 761 KSTAT_DATA_ULONG); 762 kstat_named_init(&e1000g_ksp->Xoffrxc, "XOFFs_Recvd", 763 KSTAT_DATA_ULONG); 764 kstat_named_init(&e1000g_ksp->Xofftxc, "XOFFs_Xmitd", 765 KSTAT_DATA_ULONG); 766 kstat_named_init(&e1000g_ksp->Fcruc, "Recv_Unsupport_FC_Pkts", 767 KSTAT_DATA_ULONG); 768 #ifdef E1000G_DEBUG 769 kstat_named_init(&e1000g_ksp->Prc64, "Pkts_Recvd_( 64b)", 770 KSTAT_DATA_ULONG); 771 kstat_named_init(&e1000g_ksp->Prc127, "Pkts_Recvd_( 65- 127b)", 772 KSTAT_DATA_ULONG); 773 kstat_named_init(&e1000g_ksp->Prc255, "Pkts_Recvd_( 127- 255b)", 774 KSTAT_DATA_ULONG); 775 kstat_named_init(&e1000g_ksp->Prc511, "Pkts_Recvd_( 256- 511b)", 776 KSTAT_DATA_ULONG); 777 kstat_named_init(&e1000g_ksp->Prc1023, "Pkts_Recvd_( 511-1023b)", 778 KSTAT_DATA_ULONG); 779 kstat_named_init(&e1000g_ksp->Prc1522, "Pkts_Recvd_(1024-1522b)", 780 KSTAT_DATA_ULONG); 781 #endif 782 kstat_named_init(&e1000g_ksp->Gprc, "Good_Pkts_Recvd", 783 KSTAT_DATA_ULONG); 784 kstat_named_init(&e1000g_ksp->Gptc, "Good_Pkts_Xmitd", 785 KSTAT_DATA_ULONG); 786 kstat_named_init(&e1000g_ksp->Gorl, "Good_Octets_Recvd_Lo", 787 KSTAT_DATA_ULONG); 788 kstat_named_init(&e1000g_ksp->Gorh, "Good_Octets_Recvd_Hi", 789 KSTAT_DATA_ULONG); 790 kstat_named_init(&e1000g_ksp->Gotl, "Good_Octets_Xmitd_Lo", 791 KSTAT_DATA_ULONG); 792 kstat_named_init(&e1000g_ksp->Goth, "Good_Octets_Xmitd_Hi", 793 KSTAT_DATA_ULONG); 794 kstat_named_init(&e1000g_ksp->Ruc, "Recv_Undersize", 795 KSTAT_DATA_ULONG); 796 kstat_named_init(&e1000g_ksp->Rfc, "Recv_Frag", 797 KSTAT_DATA_ULONG); 798 kstat_named_init(&e1000g_ksp->Roc, "Recv_Oversize", 799 KSTAT_DATA_ULONG); 800 kstat_named_init(&e1000g_ksp->Rjc, "Recv_Jabber", 801 KSTAT_DATA_ULONG); 802 kstat_named_init(&e1000g_ksp->Torl, "Total_Octets_Recvd_Lo", 803 KSTAT_DATA_ULONG); 804 kstat_named_init(&e1000g_ksp->Torh, "Total_Octets_Recvd_Hi", 805 KSTAT_DATA_ULONG); 806 kstat_named_init(&e1000g_ksp->Totl, "Total_Octets_Xmitd_Lo", 807 KSTAT_DATA_ULONG); 808 kstat_named_init(&e1000g_ksp->Toth, "Total_Octets_Xmitd_Hi", 809 KSTAT_DATA_ULONG); 810 kstat_named_init(&e1000g_ksp->Tpr, "Total_Packets_Recvd", 811 KSTAT_DATA_ULONG); 812 kstat_named_init(&e1000g_ksp->Tpt, "Total_Packets_Xmitd", 813 KSTAT_DATA_ULONG); 814 #ifdef E1000G_DEBUG 815 kstat_named_init(&e1000g_ksp->Ptc64, "Pkts_Xmitd_( 64b)", 816 KSTAT_DATA_ULONG); 817 kstat_named_init(&e1000g_ksp->Ptc127, "Pkts_Xmitd_( 65- 127b)", 818 KSTAT_DATA_ULONG); 819 kstat_named_init(&e1000g_ksp->Ptc255, "Pkts_Xmitd_( 128- 255b)", 820 KSTAT_DATA_ULONG); 821 kstat_named_init(&e1000g_ksp->Ptc511, "Pkts_Xmitd_( 255- 511b)", 822 KSTAT_DATA_ULONG); 823 kstat_named_init(&e1000g_ksp->Ptc1023, "Pkts_Xmitd_( 512-1023b)", 824 KSTAT_DATA_ULONG); 825 kstat_named_init(&e1000g_ksp->Ptc1522, "Pkts_Xmitd_(1024-1522b)", 826 KSTAT_DATA_ULONG); 827 #endif 828 kstat_named_init(&e1000g_ksp->Tncrs, "Xmit_with_No_CRS", 829 KSTAT_DATA_ULONG); 830 kstat_named_init(&e1000g_ksp->Tsctc, "Xmit_TCP_Seg_Contexts", 831 KSTAT_DATA_ULONG); 832 kstat_named_init(&e1000g_ksp->Tsctfc, "Xmit_TCP_Seg_Contexts_Fail", 833 KSTAT_DATA_ULONG); 834 835 #ifdef E1000G_DEBUG 836 kstat_named_init(&e1000g_ksp->rx_none, "Rx No Data", 837 KSTAT_DATA_ULONG); 838 kstat_named_init(&e1000g_ksp->rx_multi_desc, "Rx Span Multi Desc", 839 KSTAT_DATA_ULONG); 840 kstat_named_init(&e1000g_ksp->rx_no_freepkt, "Rx Freelist Empty", 841 KSTAT_DATA_ULONG); 842 kstat_named_init(&e1000g_ksp->rx_avail_freepkt, "Rx Freelist Avail", 843 KSTAT_DATA_ULONG); 844 845 kstat_named_init(&e1000g_ksp->tx_under_size, "Tx Pkt Under Size", 846 KSTAT_DATA_ULONG); 847 kstat_named_init(&e1000g_ksp->tx_exceed_frags, "Tx Exceed Max Frags", 848 KSTAT_DATA_ULONG); 849 kstat_named_init(&e1000g_ksp->tx_empty_frags, "Tx Empty Frags", 850 KSTAT_DATA_ULONG); 851 kstat_named_init(&e1000g_ksp->tx_recycle, "Tx Recycle", 852 KSTAT_DATA_ULONG); 853 kstat_named_init(&e1000g_ksp->tx_recycle_intr, "Tx Recycle Intr", 854 KSTAT_DATA_ULONG); 855 kstat_named_init(&e1000g_ksp->tx_recycle_retry, "Tx Recycle Retry", 856 KSTAT_DATA_ULONG); 857 kstat_named_init(&e1000g_ksp->tx_recycle_none, "Tx Recycled None", 858 KSTAT_DATA_ULONG); 859 kstat_named_init(&e1000g_ksp->tx_copy, "Tx Send Copy", 860 KSTAT_DATA_ULONG); 861 kstat_named_init(&e1000g_ksp->tx_bind, "Tx Send Bind", 862 KSTAT_DATA_ULONG); 863 kstat_named_init(&e1000g_ksp->tx_multi_copy, "Tx Copy Multi Frags", 864 KSTAT_DATA_ULONG); 865 kstat_named_init(&e1000g_ksp->tx_multi_cookie, "Tx Bind Multi Cookies", 866 KSTAT_DATA_ULONG); 867 kstat_named_init(&e1000g_ksp->tx_lack_desc, "Tx Desc Insufficient", 868 KSTAT_DATA_ULONG); 869 #endif 870 871 /* 872 * Function to provide kernel stat update on demand 873 */ 874 ksp->ks_update = e1000g_update_stats; 875 876 /* 877 * Pointer into provider's raw statistics 878 */ 879 ksp->ks_private = (void *)Adapter; 880 881 /* 882 * Add kstat to systems kstat chain 883 */ 884 kstat_install(ksp); 885 886 return (DDI_SUCCESS); 887 } 888