1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2007 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms of the CDDLv1. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 /* 29 * ********************************************************************** 30 * * 31 * Module Name: * 32 * e1000g_rx.c * 33 * * 34 * Abstract: * 35 * This file contains some routines that take care of Receive * 36 * interrupt and also for the received packets it sends up to * 37 * upper layer. * 38 * It tries to do a zero copy if free buffers are available in * 39 * the pool. * 40 * * 41 * ********************************************************************** 42 */ 43 44 #include "e1000g_sw.h" 45 #include "e1000g_debug.h" 46 47 static p_rx_sw_packet_t e1000g_get_buf(e1000g_rx_ring_t *rx_ring); 48 #pragma inline(e1000g_get_buf) 49 static void e1000g_priv_devi_list_clean(); 50 51 /* 52 * e1000g_rxfree_func - the call-back function to reclaim rx buffer 53 * 54 * This function is called when an mp is freed by the user thru 55 * freeb call (Only for mp constructed through desballoc call) 56 * It returns back the freed buffer to the freelist 57 */ 58 void 59 e1000g_rxfree_func(p_rx_sw_packet_t packet) 60 { 61 struct e1000g *Adapter; 62 e1000g_rx_ring_t *rx_ring; 63 64 rx_ring = (e1000g_rx_ring_t *)packet->rx_ring; 65 Adapter = rx_ring->adapter; 66 67 /* 68 * Here the rx recycling processes different rx packets in different 69 * threads, so we protect it with RW_READER to ensure it won't block 70 * other rx recycling threads. 71 */ 72 rw_enter(&e1000g_rx_detach_lock, RW_READER); 73 74 if (packet->flag == E1000G_RX_SW_FREE) { 75 rw_exit(&e1000g_rx_detach_lock); 76 return; 77 } 78 79 if (packet->flag == E1000G_RX_SW_STOP) { 80 packet->flag = E1000G_RX_SW_FREE; 81 rw_exit(&e1000g_rx_detach_lock); 82 83 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 84 rx_ring->pending_count--; 85 e1000g_mblks_pending--; 86 87 if (rx_ring->pending_count == 0) { 88 while (rx_ring->pending_list != NULL) { 89 packet = rx_ring->pending_list; 90 rx_ring->pending_list = 91 rx_ring->pending_list->next; 92 93 ASSERT(packet->mp == NULL); 94 e1000g_free_rx_sw_packet(packet); 95 } 96 } 97 98 /* 99 * If e1000g_force_detach is enabled, we need to clean up 100 * the idle priv_dip entries in the private dip list while 101 * e1000g_mblks_pending is zero. 102 */ 103 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 104 e1000g_priv_devi_list_clean(); 105 rw_exit(&e1000g_rx_detach_lock); 106 return; 107 } 108 109 if (packet->flag == E1000G_RX_SW_DETACH) { 110 packet->flag = E1000G_RX_SW_FREE; 111 rw_exit(&e1000g_rx_detach_lock); 112 113 ASSERT(packet->mp == NULL); 114 e1000g_free_rx_sw_packet(packet); 115 116 /* 117 * Here the e1000g_mblks_pending may be modified by different 118 * rx recycling threads simultaneously, so we need to protect 119 * it with RW_WRITER. 120 */ 121 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 122 e1000g_mblks_pending--; 123 124 /* 125 * If e1000g_force_detach is enabled, we need to clean up 126 * the idle priv_dip entries in the private dip list while 127 * e1000g_mblks_pending is zero. 128 */ 129 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 130 e1000g_priv_devi_list_clean(); 131 rw_exit(&e1000g_rx_detach_lock); 132 return; 133 } 134 135 packet->flag = E1000G_RX_SW_FREE; 136 137 if (packet->mp == NULL) { 138 /* 139 * Allocate a mblk that binds to the data buffer 140 */ 141 packet->mp = desballoc((unsigned char *) 142 packet->rx_buf->address - E1000G_IPALIGNROOM, 143 packet->rx_buf->size + E1000G_IPALIGNROOM, 144 BPRI_MED, &packet->free_rtn); 145 146 if (packet->mp != NULL) { 147 packet->mp->b_rptr += E1000G_IPALIGNROOM; 148 packet->mp->b_wptr += E1000G_IPALIGNROOM; 149 } else { 150 E1000G_STAT(rx_ring->stat_esballoc_fail); 151 } 152 } 153 154 mutex_enter(&rx_ring->freelist_lock); 155 QUEUE_PUSH_TAIL(&rx_ring->free_list, &packet->Link); 156 rx_ring->avail_freepkt++; 157 mutex_exit(&rx_ring->freelist_lock); 158 159 rw_exit(&e1000g_rx_detach_lock); 160 } 161 162 /* 163 * e1000g_priv_devi_list_clean - clean up e1000g_private_devi_list 164 * 165 * We will walk the e1000g_private_devi_list to free the entry marked 166 * with the E1000G_PRIV_DEVI_DETACH flag. 167 */ 168 static void 169 e1000g_priv_devi_list_clean() 170 { 171 private_devi_list_t *devi_node, *devi_del; 172 173 if (e1000g_private_devi_list == NULL) 174 return; 175 176 devi_node = e1000g_private_devi_list; 177 while ((devi_node != NULL) && 178 (devi_node->flag == E1000G_PRIV_DEVI_DETACH)) { 179 e1000g_private_devi_list = devi_node->next; 180 kmem_free(devi_node->priv_dip, 181 sizeof (struct dev_info)); 182 kmem_free(devi_node, 183 sizeof (private_devi_list_t)); 184 devi_node = e1000g_private_devi_list; 185 } 186 if (e1000g_private_devi_list == NULL) 187 return; 188 while (devi_node->next != NULL) { 189 if (devi_node->next->flag == E1000G_PRIV_DEVI_DETACH) { 190 devi_del = devi_node->next; 191 devi_node->next = devi_del->next; 192 kmem_free(devi_del->priv_dip, 193 sizeof (struct dev_info)); 194 kmem_free(devi_del, 195 sizeof (private_devi_list_t)); 196 } else { 197 devi_node = devi_node->next; 198 } 199 } 200 } 201 202 /* 203 * e1000g_rx_setup - setup rx data structures 204 * 205 * This routine initializes all of the receive related 206 * structures. This includes the receive descriptors, the 207 * actual receive buffers, and the rx_sw_packet software 208 * structures. 209 */ 210 void 211 e1000g_rx_setup(struct e1000g *Adapter) 212 { 213 struct e1000_hw *hw; 214 p_rx_sw_packet_t packet; 215 struct e1000_rx_desc *descriptor; 216 uint32_t buf_low; 217 uint32_t buf_high; 218 uint32_t reg_val; 219 int i; 220 int size; 221 e1000g_rx_ring_t *rx_ring; 222 223 hw = &Adapter->shared; 224 rx_ring = Adapter->rx_ring; 225 226 /* 227 * zero out all of the receive buffer descriptor memory 228 * assures any previous data or status is erased 229 */ 230 bzero(rx_ring->rbd_area, 231 sizeof (struct e1000_rx_desc) * Adapter->rx_desc_num); 232 233 if (!Adapter->rx_buffer_setup) { 234 /* Init the list of "Receive Buffer" */ 235 QUEUE_INIT_LIST(&rx_ring->recv_list); 236 237 /* Init the list of "Free Receive Buffer" */ 238 QUEUE_INIT_LIST(&rx_ring->free_list); 239 240 /* 241 * Setup Receive list and the Free list. Note that 242 * the both were allocated in one packet area. 243 */ 244 packet = rx_ring->packet_area; 245 descriptor = rx_ring->rbd_first; 246 247 for (i = 0; i < Adapter->rx_desc_num; 248 i++, packet = packet->next, descriptor++) { 249 ASSERT(packet != NULL); 250 ASSERT(descriptor != NULL); 251 descriptor->buffer_addr = 252 packet->rx_buf->dma_address; 253 254 /* Add this rx_sw_packet to the receive list */ 255 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 256 &packet->Link); 257 } 258 259 for (i = 0; i < Adapter->rx_freelist_num; 260 i++, packet = packet->next) { 261 ASSERT(packet != NULL); 262 /* Add this rx_sw_packet to the free list */ 263 QUEUE_PUSH_TAIL(&rx_ring->free_list, 264 &packet->Link); 265 } 266 rx_ring->avail_freepkt = Adapter->rx_freelist_num; 267 268 Adapter->rx_buffer_setup = B_TRUE; 269 } else { 270 /* Setup the initial pointer to the first rx descriptor */ 271 packet = (p_rx_sw_packet_t) 272 QUEUE_GET_HEAD(&rx_ring->recv_list); 273 descriptor = rx_ring->rbd_first; 274 275 for (i = 0; i < Adapter->rx_desc_num; i++) { 276 ASSERT(packet != NULL); 277 ASSERT(descriptor != NULL); 278 descriptor->buffer_addr = 279 packet->rx_buf->dma_address; 280 281 /* Get next rx_sw_packet */ 282 packet = (p_rx_sw_packet_t) 283 QUEUE_GET_NEXT(&rx_ring->recv_list, &packet->Link); 284 descriptor++; 285 } 286 } 287 288 /* 289 * Setup our descriptor pointers 290 */ 291 rx_ring->rbd_next = rx_ring->rbd_first; 292 293 size = Adapter->rx_desc_num * sizeof (struct e1000_rx_desc); 294 E1000_WRITE_REG(hw, E1000_RDLEN, size); 295 size = E1000_READ_REG(hw, E1000_RDLEN); 296 297 /* To get lower order bits */ 298 buf_low = (uint32_t)rx_ring->rbd_dma_addr; 299 /* To get the higher order bits */ 300 buf_high = (uint32_t)(rx_ring->rbd_dma_addr >> 32); 301 302 E1000_WRITE_REG(hw, E1000_RDBAH, buf_high); 303 E1000_WRITE_REG(hw, E1000_RDBAL, buf_low); 304 305 /* 306 * Setup our HW Rx Head & Tail descriptor pointers 307 */ 308 E1000_WRITE_REG(hw, E1000_RDT, 309 (uint32_t)(rx_ring->rbd_last - rx_ring->rbd_first)); 310 E1000_WRITE_REG(hw, E1000_RDH, 0); 311 312 /* 313 * Setup the Receive Control Register (RCTL), and ENABLE the 314 * receiver. The initial configuration is to: Enable the receiver, 315 * accept broadcasts, discard bad packets (and long packets), 316 * disable VLAN filter checking, set the receive descriptor 317 * minimum threshold size to 1/2, and the receive buffer size to 318 * 2k. 319 */ 320 reg_val = E1000_RCTL_EN | /* Enable Receive Unit */ 321 E1000_RCTL_BAM | /* Accept Broadcast Packets */ 322 E1000_RCTL_LPE | /* Large Packet Enable bit */ 323 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT) | 324 E1000_RCTL_RDMTS_HALF | 325 E1000_RCTL_LBM_NO; /* Loopback Mode = none */ 326 327 if (Adapter->strip_crc) 328 reg_val |= E1000_RCTL_SECRC; /* Strip Ethernet CRC */ 329 330 switch (hw->mac.max_frame_size) { 331 case ETHERMAX: 332 reg_val |= E1000_RCTL_SZ_2048; 333 break; 334 case FRAME_SIZE_UPTO_4K: 335 reg_val |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX; 336 break; 337 case FRAME_SIZE_UPTO_8K: 338 reg_val |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX; 339 break; 340 case FRAME_SIZE_UPTO_9K: 341 case FRAME_SIZE_UPTO_16K: 342 reg_val |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX; 343 break; 344 default: 345 reg_val |= E1000_RCTL_SZ_2048; 346 break; 347 } 348 349 if (e1000_tbi_sbp_enabled_82543(hw)) 350 reg_val |= E1000_RCTL_SBP; 351 352 /* 353 * Enable early receives on supported devices, only takes effect when 354 * packet size is equal or larger than the specified value (in 8 byte 355 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 356 */ 357 if ((hw->mac.type == e1000_82573) || (hw->mac.type == e1000_ich9lan)) 358 E1000_WRITE_REG(hw, E1000_ERT, E1000_ERT_2048); 359 360 E1000_WRITE_REG(hw, E1000_RCTL, reg_val); 361 362 reg_val = 363 E1000_RXCSUM_TUOFL | /* TCP/UDP checksum offload Enable */ 364 E1000_RXCSUM_IPOFL; /* IP checksum offload Enable */ 365 366 E1000_WRITE_REG(hw, E1000_RXCSUM, reg_val); 367 } 368 369 /* 370 * e1000g_get_buf - get an rx sw packet from the free_list 371 */ 372 static p_rx_sw_packet_t 373 e1000g_get_buf(e1000g_rx_ring_t *rx_ring) 374 { 375 struct e1000g *Adapter; 376 p_rx_sw_packet_t packet; 377 378 Adapter = rx_ring->adapter; 379 380 mutex_enter(&rx_ring->freelist_lock); 381 packet = (p_rx_sw_packet_t) 382 QUEUE_POP_HEAD(&rx_ring->free_list); 383 if (packet != NULL) 384 rx_ring->avail_freepkt--; 385 mutex_exit(&rx_ring->freelist_lock); 386 387 return (packet); 388 } 389 390 /* 391 * e1000g_receive - main receive routine 392 * 393 * This routine will process packets received in an interrupt 394 */ 395 mblk_t * 396 e1000g_receive(struct e1000g *Adapter) 397 { 398 struct e1000_hw *hw; 399 mblk_t *nmp; 400 mblk_t *ret_mp; 401 mblk_t *ret_nmp; 402 struct e1000_rx_desc *current_desc; 403 struct e1000_rx_desc *last_desc; 404 p_rx_sw_packet_t packet; 405 p_rx_sw_packet_t newpkt; 406 USHORT length; 407 uint32_t pkt_count; 408 uint32_t desc_count; 409 boolean_t accept_frame; 410 boolean_t end_of_packet; 411 boolean_t need_copy; 412 e1000g_rx_ring_t *rx_ring; 413 dma_buffer_t *rx_buf; 414 uint16_t cksumflags; 415 416 ret_mp = NULL; 417 ret_nmp = NULL; 418 pkt_count = 0; 419 desc_count = 0; 420 cksumflags = 0; 421 422 hw = &Adapter->shared; 423 rx_ring = Adapter->rx_ring; 424 425 /* Sync the Rx descriptor DMA buffers */ 426 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 427 0, 0, DDI_DMA_SYNC_FORKERNEL); 428 429 current_desc = rx_ring->rbd_next; 430 if (!(current_desc->status & E1000_RXD_STAT_DD)) { 431 /* 432 * don't send anything up. just clear the RFD 433 */ 434 E1000G_DEBUG_STAT(rx_ring->stat_none); 435 return (ret_mp); 436 } 437 438 /* 439 * Loop through the receive descriptors starting at the last known 440 * descriptor owned by the hardware that begins a packet. 441 */ 442 while ((current_desc->status & E1000_RXD_STAT_DD) && 443 (pkt_count < Adapter->rx_limit_onintr)) { 444 445 desc_count++; 446 /* 447 * Now this can happen in Jumbo frame situation. 448 */ 449 if (current_desc->status & E1000_RXD_STAT_EOP) { 450 /* packet has EOP set */ 451 end_of_packet = B_TRUE; 452 } else { 453 /* 454 * If this received buffer does not have the 455 * End-Of-Packet bit set, the received packet 456 * will consume multiple buffers. We won't send this 457 * packet upstack till we get all the related buffers. 458 */ 459 end_of_packet = B_FALSE; 460 } 461 462 /* 463 * Get a pointer to the actual receive buffer 464 * The mp->b_rptr is mapped to The CurrentDescriptor 465 * Buffer Address. 466 */ 467 packet = 468 (p_rx_sw_packet_t)QUEUE_GET_HEAD(&rx_ring->recv_list); 469 ASSERT(packet != NULL); 470 471 rx_buf = packet->rx_buf; 472 473 length = current_desc->length; 474 475 #ifdef __sparc 476 if (packet->dma_type == USE_DVMA) 477 dvma_sync(rx_buf->dma_handle, 0, 478 DDI_DMA_SYNC_FORKERNEL); 479 else 480 (void) ddi_dma_sync(rx_buf->dma_handle, 481 E1000G_IPALIGNROOM, length, 482 DDI_DMA_SYNC_FORKERNEL); 483 #else 484 (void) ddi_dma_sync(rx_buf->dma_handle, 485 E1000G_IPALIGNROOM, length, 486 DDI_DMA_SYNC_FORKERNEL); 487 #endif 488 489 accept_frame = (current_desc->errors == 0) || 490 ((current_desc->errors & 491 (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) != 0); 492 493 if (hw->mac.type == e1000_82543) { 494 unsigned char last_byte; 495 496 last_byte = 497 *((unsigned char *)rx_buf->address + length - 1); 498 499 if (TBI_ACCEPT(hw, 500 current_desc->status, current_desc->errors, 501 current_desc->length, last_byte)) { 502 503 e1000_tbi_adjust_stats(Adapter, 504 length, hw->mac.addr); 505 506 length--; 507 accept_frame = B_TRUE; 508 } else if (e1000_tbi_sbp_enabled_82543(hw) && 509 (current_desc->errors == E1000_RXD_ERR_CE)) { 510 accept_frame = B_TRUE; 511 } 512 } 513 514 /* 515 * Indicate the packet to the NOS if it was good. 516 * Normally, hardware will discard bad packets for us. 517 * Check for the packet to be a valid Ethernet packet 518 */ 519 if (!accept_frame) { 520 /* 521 * error in incoming packet, either the packet is not a 522 * ethernet size packet, or the packet has an error. In 523 * either case, the packet will simply be discarded. 524 */ 525 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 526 "Process Receive Interrupts: Error in Packet\n"); 527 528 E1000G_STAT(rx_ring->stat_error); 529 /* 530 * Returning here as we are done here. There is 531 * no point in waiting for while loop to elapse 532 * and the things which were done. More efficient 533 * and less error prone... 534 */ 535 goto rx_drop; 536 } 537 538 /* 539 * If the Ethernet CRC is not stripped by the hardware, 540 * we need to strip it before sending it up to the stack. 541 */ 542 if (end_of_packet && !Adapter->strip_crc) { 543 if (length > CRC_LENGTH) { 544 length -= CRC_LENGTH; 545 } else { 546 /* 547 * If the fragment is smaller than the CRC, 548 * drop this fragment, do the processing of 549 * the end of the packet. 550 */ 551 ASSERT(rx_ring->rx_mblk_tail != NULL); 552 rx_ring->rx_mblk_tail->b_wptr -= 553 CRC_LENGTH - length; 554 rx_ring->rx_mblk_len -= 555 CRC_LENGTH - length; 556 557 QUEUE_POP_HEAD(&rx_ring->recv_list); 558 559 goto rx_end_of_packet; 560 } 561 } 562 563 need_copy = B_TRUE; 564 565 if (length <= Adapter->rx_bcopy_thresh) 566 goto rx_copy; 567 568 /* 569 * Get the pre-constructed mblk that was associated 570 * to the receive data buffer. 571 */ 572 if (packet->mp == NULL) { 573 packet->mp = desballoc((unsigned char *) 574 rx_buf->address - E1000G_IPALIGNROOM, 575 length + E1000G_IPALIGNROOM, 576 BPRI_MED, &packet->free_rtn); 577 578 if (packet->mp != NULL) { 579 packet->mp->b_rptr += E1000G_IPALIGNROOM; 580 packet->mp->b_wptr += E1000G_IPALIGNROOM; 581 } else { 582 E1000G_STAT(rx_ring->stat_esballoc_fail); 583 } 584 } 585 586 if (packet->mp != NULL) { 587 /* 588 * We have two sets of buffer pool. One associated with 589 * the Rxdescriptors and other a freelist buffer pool. 590 * Each time we get a good packet, Try to get a buffer 591 * from the freelist pool using e1000g_get_buf. If we 592 * get free buffer, then replace the descriptor buffer 593 * address with the free buffer we just got, and pass 594 * the pre-constructed mblk upstack. (note no copying) 595 * 596 * If we failed to get a free buffer, then try to 597 * allocate a new buffer(mp) and copy the recv buffer 598 * content to our newly allocated buffer(mp). Don't 599 * disturb the desriptor buffer address. (note copying) 600 */ 601 newpkt = e1000g_get_buf(rx_ring); 602 603 if (newpkt != NULL) { 604 /* 605 * Get the mblk associated to the data, 606 * and strip it off the sw packet. 607 */ 608 nmp = packet->mp; 609 packet->mp = NULL; 610 packet->flag = E1000G_RX_SW_SENDUP; 611 612 /* 613 * Now replace old buffer with the new 614 * one we got from free list 615 * Both the RxSwPacket as well as the 616 * Receive Buffer Descriptor will now 617 * point to this new packet. 618 */ 619 packet = newpkt; 620 621 current_desc->buffer_addr = 622 newpkt->rx_buf->dma_address; 623 624 need_copy = B_FALSE; 625 } else { 626 E1000G_DEBUG_STAT(rx_ring->stat_no_freepkt); 627 } 628 } 629 630 rx_copy: 631 if (need_copy) { 632 /* 633 * No buffers available on free list, 634 * bcopy the data from the buffer and 635 * keep the original buffer. Dont want to 636 * do this.. Yack but no other way 637 */ 638 if ((nmp = allocb(length + E1000G_IPALIGNROOM, 639 BPRI_MED)) == NULL) { 640 /* 641 * The system has no buffers available 642 * to send up the incoming packet, hence 643 * the packet will have to be processed 644 * when there're more buffers available. 645 */ 646 E1000G_STAT(rx_ring->stat_allocb_fail); 647 goto rx_drop; 648 } 649 nmp->b_rptr += E1000G_IPALIGNROOM; 650 nmp->b_wptr += E1000G_IPALIGNROOM; 651 /* 652 * The free list did not have any buffers 653 * available, so, the received packet will 654 * have to be copied into a mp and the original 655 * buffer will have to be retained for future 656 * packet reception. 657 */ 658 bcopy(rx_buf->address, nmp->b_wptr, length); 659 } 660 661 /* 662 * The rx_sw_packet MUST be popped off the 663 * RxSwPacketList before either a putnext or freemsg 664 * is done on the mp that has now been created by the 665 * desballoc. If not, it is possible that the free 666 * routine will get called from the interrupt context 667 * and try to put this packet on the free list 668 */ 669 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 670 671 ASSERT(nmp != NULL); 672 nmp->b_wptr += length; 673 674 if (rx_ring->rx_mblk == NULL) { 675 /* 676 * TCP/UDP checksum offload and 677 * IP checksum offload 678 */ 679 if (!(current_desc->status & E1000_RXD_STAT_IXSM)) { 680 /* 681 * Check TCP/UDP checksum 682 */ 683 if ((current_desc->status & 684 E1000_RXD_STAT_TCPCS) && 685 !(current_desc->errors & 686 E1000_RXD_ERR_TCPE)) 687 cksumflags |= HCK_FULLCKSUM | 688 HCK_FULLCKSUM_OK; 689 /* 690 * Check IP Checksum 691 */ 692 if ((current_desc->status & 693 E1000_RXD_STAT_IPCS) && 694 !(current_desc->errors & 695 E1000_RXD_ERR_IPE)) 696 cksumflags |= HCK_IPV4_HDRCKSUM; 697 } 698 } 699 700 /* 701 * We need to maintain our packet chain in the global 702 * Adapter structure, for the Rx processing can end 703 * with a fragment that has no EOP set. 704 */ 705 if (rx_ring->rx_mblk == NULL) { 706 /* Get the head of the message chain */ 707 rx_ring->rx_mblk = nmp; 708 rx_ring->rx_mblk_tail = nmp; 709 rx_ring->rx_mblk_len = length; 710 } else { /* Not the first packet */ 711 /* Continue adding buffers */ 712 rx_ring->rx_mblk_tail->b_cont = nmp; 713 rx_ring->rx_mblk_tail = nmp; 714 rx_ring->rx_mblk_len += length; 715 } 716 ASSERT(rx_ring->rx_mblk != NULL); 717 ASSERT(rx_ring->rx_mblk_tail != NULL); 718 ASSERT(rx_ring->rx_mblk_tail->b_cont == NULL); 719 720 /* 721 * Now this MP is ready to travel upwards but some more 722 * fragments are coming. 723 * We will send packet upwards as soon as we get EOP 724 * set on the packet. 725 */ 726 if (!end_of_packet) { 727 /* 728 * continue to get the next descriptor, 729 * Tail would be advanced at the end 730 */ 731 goto rx_next_desc; 732 } 733 734 rx_end_of_packet: 735 /* 736 * Found packet with EOP 737 * Process the last fragment. 738 */ 739 if (cksumflags != 0) { 740 (void) hcksum_assoc(rx_ring->rx_mblk, 741 NULL, NULL, 0, 0, 0, 0, cksumflags, 0); 742 cksumflags = 0; 743 } 744 745 /* 746 * Count packets that span multi-descriptors 747 */ 748 E1000G_DEBUG_STAT_COND(rx_ring->stat_multi_desc, 749 (rx_ring->rx_mblk->b_cont != NULL)); 750 751 /* 752 * Append to list to send upstream 753 */ 754 if (ret_mp == NULL) { 755 ret_mp = ret_nmp = rx_ring->rx_mblk; 756 } else { 757 ret_nmp->b_next = rx_ring->rx_mblk; 758 ret_nmp = rx_ring->rx_mblk; 759 } 760 ret_nmp->b_next = NULL; 761 762 rx_ring->rx_mblk = NULL; 763 rx_ring->rx_mblk_tail = NULL; 764 rx_ring->rx_mblk_len = 0; 765 766 pkt_count++; 767 768 rx_next_desc: 769 /* 770 * Zero out the receive descriptors status 771 */ 772 current_desc->status = 0; 773 774 if (current_desc == rx_ring->rbd_last) 775 rx_ring->rbd_next = rx_ring->rbd_first; 776 else 777 rx_ring->rbd_next++; 778 779 last_desc = current_desc; 780 current_desc = rx_ring->rbd_next; 781 782 /* 783 * Put the buffer that we just indicated back 784 * at the end of our list 785 */ 786 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 787 &packet->Link); 788 } /* while loop */ 789 790 if (pkt_count >= Adapter->rx_limit_onintr) 791 E1000G_STAT(rx_ring->stat_exceed_pkt); 792 793 /* Sync the Rx descriptor DMA buffers */ 794 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 795 0, 0, DDI_DMA_SYNC_FORDEV); 796 797 /* 798 * Advance the E1000's Receive Queue #0 "Tail Pointer". 799 */ 800 E1000_WRITE_REG(hw, E1000_RDT, 801 (uint32_t)(last_desc - rx_ring->rbd_first)); 802 803 return (ret_mp); 804 805 rx_drop: 806 /* 807 * Zero out the receive descriptors status 808 */ 809 current_desc->status = 0; 810 811 /* Sync the Rx descriptor DMA buffers */ 812 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 813 0, 0, DDI_DMA_SYNC_FORDEV); 814 815 if (current_desc == rx_ring->rbd_last) 816 rx_ring->rbd_next = rx_ring->rbd_first; 817 else 818 rx_ring->rbd_next++; 819 820 last_desc = current_desc; 821 822 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 823 824 QUEUE_PUSH_TAIL(&rx_ring->recv_list, &packet->Link); 825 /* 826 * Reclaim all old buffers already allocated during 827 * Jumbo receives.....for incomplete reception 828 */ 829 if (rx_ring->rx_mblk != NULL) { 830 freemsg(rx_ring->rx_mblk); 831 rx_ring->rx_mblk = NULL; 832 rx_ring->rx_mblk_tail = NULL; 833 rx_ring->rx_mblk_len = 0; 834 } 835 /* 836 * Advance the E1000's Receive Queue #0 "Tail Pointer". 837 */ 838 E1000_WRITE_REG(hw, E1000_RDT, 839 (uint32_t)(last_desc - rx_ring->rbd_first)); 840 841 return (ret_mp); 842 } 843