1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms of the CDDLv1. 24 */ 25 26 /* 27 * ********************************************************************** 28 * * 29 * Module Name: * 30 * e1000g_rx.c * 31 * * 32 * Abstract: * 33 * This file contains some routines that take care of Receive * 34 * interrupt and also for the received packets it sends up to * 35 * upper layer. * 36 * It tries to do a zero copy if free buffers are available in * 37 * the pool. * 38 * * 39 * ********************************************************************** 40 */ 41 42 #include "e1000g_sw.h" 43 #include "e1000g_debug.h" 44 45 static p_rx_sw_packet_t e1000g_get_buf(e1000g_rx_ring_t *rx_ring); 46 #pragma inline(e1000g_get_buf) 47 static void e1000g_priv_devi_list_clean(); 48 49 /* 50 * e1000g_rxfree_func - the call-back function to reclaim rx buffer 51 * 52 * This function is called when an mp is freed by the user thru 53 * freeb call (Only for mp constructed through desballoc call) 54 * It returns back the freed buffer to the freelist 55 */ 56 void 57 e1000g_rxfree_func(p_rx_sw_packet_t packet) 58 { 59 e1000g_rx_ring_t *rx_ring; 60 61 rx_ring = (e1000g_rx_ring_t *)(uintptr_t)packet->rx_ring; 62 63 /* 64 * Here the rx recycling processes different rx packets in different 65 * threads, so we protect it with RW_READER to ensure it won't block 66 * other rx recycling threads. 67 */ 68 rw_enter(&e1000g_rx_detach_lock, RW_READER); 69 70 if (packet->flag == E1000G_RX_SW_FREE) { 71 rw_exit(&e1000g_rx_detach_lock); 72 return; 73 } 74 75 if (packet->flag == E1000G_RX_SW_STOP) { 76 packet->flag = E1000G_RX_SW_FREE; 77 rw_exit(&e1000g_rx_detach_lock); 78 79 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 80 rx_ring->pending_count--; 81 e1000g_mblks_pending--; 82 83 if (rx_ring->pending_count == 0) { 84 while (rx_ring->pending_list != NULL) { 85 packet = rx_ring->pending_list; 86 rx_ring->pending_list = 87 rx_ring->pending_list->next; 88 89 ASSERT(packet->mp == NULL); 90 e1000g_free_rx_sw_packet(packet); 91 } 92 } 93 94 /* 95 * If e1000g_force_detach is enabled, we need to clean up 96 * the idle priv_dip entries in the private dip list while 97 * e1000g_mblks_pending is zero. 98 */ 99 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 100 e1000g_priv_devi_list_clean(); 101 rw_exit(&e1000g_rx_detach_lock); 102 return; 103 } 104 105 if (packet->flag == E1000G_RX_SW_DETACH) { 106 packet->flag = E1000G_RX_SW_FREE; 107 rw_exit(&e1000g_rx_detach_lock); 108 109 ASSERT(packet->mp == NULL); 110 e1000g_free_rx_sw_packet(packet); 111 112 /* 113 * Here the e1000g_mblks_pending may be modified by different 114 * rx recycling threads simultaneously, so we need to protect 115 * it with RW_WRITER. 116 */ 117 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 118 e1000g_mblks_pending--; 119 120 /* 121 * If e1000g_force_detach is enabled, we need to clean up 122 * the idle priv_dip entries in the private dip list while 123 * e1000g_mblks_pending is zero. 124 */ 125 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 126 e1000g_priv_devi_list_clean(); 127 rw_exit(&e1000g_rx_detach_lock); 128 return; 129 } 130 131 packet->flag = E1000G_RX_SW_FREE; 132 133 if (packet->mp == NULL) { 134 /* 135 * Allocate a mblk that binds to the data buffer 136 */ 137 packet->mp = desballoc((unsigned char *) 138 packet->rx_buf->address - E1000G_IPALIGNROOM, 139 packet->rx_buf->size + E1000G_IPALIGNROOM, 140 BPRI_MED, &packet->free_rtn); 141 142 if (packet->mp != NULL) { 143 packet->mp->b_rptr += E1000G_IPALIGNROOM; 144 packet->mp->b_wptr += E1000G_IPALIGNROOM; 145 } else { 146 E1000G_STAT(rx_ring->stat_esballoc_fail); 147 } 148 } 149 150 mutex_enter(&rx_ring->freelist_lock); 151 QUEUE_PUSH_TAIL(&rx_ring->free_list, &packet->Link); 152 rx_ring->avail_freepkt++; 153 mutex_exit(&rx_ring->freelist_lock); 154 155 rw_exit(&e1000g_rx_detach_lock); 156 } 157 158 /* 159 * e1000g_priv_devi_list_clean - clean up e1000g_private_devi_list 160 * 161 * We will walk the e1000g_private_devi_list to free the entry marked 162 * with the E1000G_PRIV_DEVI_DETACH flag. 163 */ 164 static void 165 e1000g_priv_devi_list_clean() 166 { 167 private_devi_list_t *devi_node, *devi_del; 168 169 if (e1000g_private_devi_list == NULL) 170 return; 171 172 devi_node = e1000g_private_devi_list; 173 while ((devi_node != NULL) && 174 (devi_node->flag == E1000G_PRIV_DEVI_DETACH)) { 175 e1000g_private_devi_list = devi_node->next; 176 kmem_free(devi_node->priv_dip, 177 sizeof (struct dev_info)); 178 kmem_free(devi_node, 179 sizeof (private_devi_list_t)); 180 devi_node = e1000g_private_devi_list; 181 } 182 if (e1000g_private_devi_list == NULL) 183 return; 184 while (devi_node->next != NULL) { 185 if (devi_node->next->flag == E1000G_PRIV_DEVI_DETACH) { 186 devi_del = devi_node->next; 187 devi_node->next = devi_del->next; 188 kmem_free(devi_del->priv_dip, 189 sizeof (struct dev_info)); 190 kmem_free(devi_del, 191 sizeof (private_devi_list_t)); 192 } else { 193 devi_node = devi_node->next; 194 } 195 } 196 } 197 198 /* 199 * e1000g_rx_setup - setup rx data structures 200 * 201 * This routine initializes all of the receive related 202 * structures. This includes the receive descriptors, the 203 * actual receive buffers, and the rx_sw_packet software 204 * structures. 205 */ 206 void 207 e1000g_rx_setup(struct e1000g *Adapter) 208 { 209 struct e1000_hw *hw; 210 p_rx_sw_packet_t packet; 211 struct e1000_rx_desc *descriptor; 212 uint32_t buf_low; 213 uint32_t buf_high; 214 uint32_t reg_val; 215 uint32_t rctl; 216 uint32_t rxdctl; 217 uint32_t ert; 218 int i; 219 int size; 220 e1000g_rx_ring_t *rx_ring; 221 222 hw = &Adapter->shared; 223 rx_ring = Adapter->rx_ring; 224 225 /* 226 * zero out all of the receive buffer descriptor memory 227 * assures any previous data or status is erased 228 */ 229 bzero(rx_ring->rbd_area, 230 sizeof (struct e1000_rx_desc) * Adapter->rx_desc_num); 231 232 if (!Adapter->rx_buffer_setup) { 233 /* Init the list of "Receive Buffer" */ 234 QUEUE_INIT_LIST(&rx_ring->recv_list); 235 236 /* Init the list of "Free Receive Buffer" */ 237 QUEUE_INIT_LIST(&rx_ring->free_list); 238 239 /* 240 * Setup Receive list and the Free list. Note that 241 * the both were allocated in one packet area. 242 */ 243 packet = rx_ring->packet_area; 244 descriptor = rx_ring->rbd_first; 245 246 for (i = 0; i < Adapter->rx_desc_num; 247 i++, packet = packet->next, descriptor++) { 248 ASSERT(packet != NULL); 249 ASSERT(descriptor != NULL); 250 descriptor->buffer_addr = 251 packet->rx_buf->dma_address; 252 253 /* Add this rx_sw_packet to the receive list */ 254 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 255 &packet->Link); 256 } 257 258 for (i = 0; i < Adapter->rx_freelist_num; 259 i++, packet = packet->next) { 260 ASSERT(packet != NULL); 261 /* Add this rx_sw_packet to the free list */ 262 QUEUE_PUSH_TAIL(&rx_ring->free_list, 263 &packet->Link); 264 } 265 rx_ring->avail_freepkt = Adapter->rx_freelist_num; 266 267 Adapter->rx_buffer_setup = B_TRUE; 268 } else { 269 /* Setup the initial pointer to the first rx descriptor */ 270 packet = (p_rx_sw_packet_t) 271 QUEUE_GET_HEAD(&rx_ring->recv_list); 272 descriptor = rx_ring->rbd_first; 273 274 for (i = 0; i < Adapter->rx_desc_num; i++) { 275 ASSERT(packet != NULL); 276 ASSERT(descriptor != NULL); 277 descriptor->buffer_addr = 278 packet->rx_buf->dma_address; 279 280 /* Get next rx_sw_packet */ 281 packet = (p_rx_sw_packet_t) 282 QUEUE_GET_NEXT(&rx_ring->recv_list, &packet->Link); 283 descriptor++; 284 } 285 } 286 287 E1000_WRITE_REG(&Adapter->shared, E1000_RDTR, Adapter->rx_intr_delay); 288 E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL, 289 "E1000_RDTR: 0x%x\n", Adapter->rx_intr_delay); 290 if (hw->mac.type >= e1000_82540) { 291 E1000_WRITE_REG(&Adapter->shared, E1000_RADV, 292 Adapter->rx_intr_abs_delay); 293 E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL, 294 "E1000_RADV: 0x%x\n", Adapter->rx_intr_abs_delay); 295 } 296 297 /* 298 * Setup our descriptor pointers 299 */ 300 rx_ring->rbd_next = rx_ring->rbd_first; 301 302 size = Adapter->rx_desc_num * sizeof (struct e1000_rx_desc); 303 E1000_WRITE_REG(hw, E1000_RDLEN(0), size); 304 size = E1000_READ_REG(hw, E1000_RDLEN(0)); 305 306 /* To get lower order bits */ 307 buf_low = (uint32_t)rx_ring->rbd_dma_addr; 308 /* To get the higher order bits */ 309 buf_high = (uint32_t)(rx_ring->rbd_dma_addr >> 32); 310 311 E1000_WRITE_REG(hw, E1000_RDBAH(0), buf_high); 312 E1000_WRITE_REG(hw, E1000_RDBAL(0), buf_low); 313 314 /* 315 * Setup our HW Rx Head & Tail descriptor pointers 316 */ 317 E1000_WRITE_REG(hw, E1000_RDT(0), 318 (uint32_t)(rx_ring->rbd_last - rx_ring->rbd_first)); 319 E1000_WRITE_REG(hw, E1000_RDH(0), 0); 320 321 /* 322 * Setup the Receive Control Register (RCTL), and ENABLE the 323 * receiver. The initial configuration is to: Enable the receiver, 324 * accept broadcasts, discard bad packets (and long packets), 325 * disable VLAN filter checking, set the receive descriptor 326 * minimum threshold size to 1/2, and the receive buffer size to 327 * 2k. 328 */ 329 rctl = E1000_RCTL_EN | /* Enable Receive Unit */ 330 E1000_RCTL_BAM | /* Accept Broadcast Packets */ 331 E1000_RCTL_LPE | /* Large Packet Enable bit */ 332 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT) | 333 E1000_RCTL_RDMTS_HALF | 334 E1000_RCTL_LBM_NO; /* Loopback Mode = none */ 335 336 if (Adapter->strip_crc) 337 rctl |= E1000_RCTL_SECRC; /* Strip Ethernet CRC */ 338 339 if ((Adapter->max_frame_size > FRAME_SIZE_UPTO_2K) && 340 (Adapter->max_frame_size <= FRAME_SIZE_UPTO_4K)) 341 rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX; 342 else if ((Adapter->max_frame_size > FRAME_SIZE_UPTO_4K) && 343 (Adapter->max_frame_size <= FRAME_SIZE_UPTO_8K)) 344 rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX; 345 else if ((Adapter->max_frame_size > FRAME_SIZE_UPTO_8K) && 346 (Adapter->max_frame_size <= FRAME_SIZE_UPTO_16K)) 347 rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX; 348 else 349 rctl |= E1000_RCTL_SZ_2048; 350 351 if (e1000_tbi_sbp_enabled_82543(hw)) 352 rctl |= E1000_RCTL_SBP; 353 354 /* 355 * Enable early receives on supported devices, only takes effect when 356 * packet size is equal or larger than the specified value (in 8 byte 357 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 358 */ 359 if ((hw->mac.type == e1000_82573) || 360 (hw->mac.type == e1000_82574) || 361 (hw->mac.type == e1000_ich9lan) || 362 (hw->mac.type == e1000_ich10lan)) { 363 364 ert = E1000_ERT_2048; 365 366 /* 367 * Special modification when ERT and 368 * jumbo frames are enabled 369 */ 370 if (Adapter->default_mtu > ETHERMTU) { 371 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0)); 372 E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 0x3); 373 ert |= (1 << 13); 374 } 375 376 E1000_WRITE_REG(hw, E1000_ERT, ert); 377 } 378 379 reg_val = 380 E1000_RXCSUM_TUOFL | /* TCP/UDP checksum offload Enable */ 381 E1000_RXCSUM_IPOFL; /* IP checksum offload Enable */ 382 383 E1000_WRITE_REG(hw, E1000_RXCSUM, reg_val); 384 385 /* 386 * Workaround: Set bit 16 (IPv6_ExDIS) to disable the 387 * processing of received IPV6 extension headers 388 */ 389 if ((hw->mac.type == e1000_82571) || (hw->mac.type == e1000_82572)) { 390 reg_val = E1000_READ_REG(hw, E1000_RFCTL); 391 reg_val |= (E1000_RFCTL_IPV6_EX_DIS | 392 E1000_RFCTL_NEW_IPV6_EXT_DIS); 393 E1000_WRITE_REG(hw, E1000_RFCTL, reg_val); 394 } 395 396 /* Write to enable the receive unit */ 397 E1000_WRITE_REG(hw, E1000_RCTL, rctl); 398 } 399 400 /* 401 * e1000g_get_buf - get an rx sw packet from the free_list 402 */ 403 static p_rx_sw_packet_t 404 e1000g_get_buf(e1000g_rx_ring_t *rx_ring) 405 { 406 p_rx_sw_packet_t packet; 407 408 mutex_enter(&rx_ring->freelist_lock); 409 packet = (p_rx_sw_packet_t) 410 QUEUE_POP_HEAD(&rx_ring->free_list); 411 if (packet != NULL) 412 rx_ring->avail_freepkt--; 413 mutex_exit(&rx_ring->freelist_lock); 414 415 return (packet); 416 } 417 418 /* 419 * e1000g_receive - main receive routine 420 * 421 * This routine will process packets received in an interrupt 422 */ 423 mblk_t * 424 e1000g_receive(struct e1000g *Adapter) 425 { 426 struct e1000_hw *hw; 427 mblk_t *nmp; 428 mblk_t *ret_mp; 429 mblk_t *ret_nmp; 430 struct e1000_rx_desc *current_desc; 431 struct e1000_rx_desc *last_desc; 432 p_rx_sw_packet_t packet; 433 p_rx_sw_packet_t newpkt; 434 uint16_t length; 435 uint32_t pkt_count; 436 uint32_t desc_count; 437 boolean_t accept_frame; 438 boolean_t end_of_packet; 439 boolean_t need_copy; 440 e1000g_rx_ring_t *rx_ring; 441 dma_buffer_t *rx_buf; 442 uint16_t cksumflags; 443 444 ret_mp = NULL; 445 ret_nmp = NULL; 446 pkt_count = 0; 447 desc_count = 0; 448 cksumflags = 0; 449 450 hw = &Adapter->shared; 451 rx_ring = Adapter->rx_ring; 452 453 /* Sync the Rx descriptor DMA buffers */ 454 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 455 0, 0, DDI_DMA_SYNC_FORKERNEL); 456 457 if (e1000g_check_dma_handle(rx_ring->rbd_dma_handle) != DDI_FM_OK) { 458 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 459 Adapter->chip_state = E1000G_ERROR; 460 } 461 462 current_desc = rx_ring->rbd_next; 463 if (!(current_desc->status & E1000_RXD_STAT_DD)) { 464 /* 465 * don't send anything up. just clear the RFD 466 */ 467 E1000G_DEBUG_STAT(rx_ring->stat_none); 468 return (ret_mp); 469 } 470 471 /* 472 * Loop through the receive descriptors starting at the last known 473 * descriptor owned by the hardware that begins a packet. 474 */ 475 while ((current_desc->status & E1000_RXD_STAT_DD) && 476 (pkt_count < Adapter->rx_limit_onintr)) { 477 478 desc_count++; 479 /* 480 * Now this can happen in Jumbo frame situation. 481 */ 482 if (current_desc->status & E1000_RXD_STAT_EOP) { 483 /* packet has EOP set */ 484 end_of_packet = B_TRUE; 485 } else { 486 /* 487 * If this received buffer does not have the 488 * End-Of-Packet bit set, the received packet 489 * will consume multiple buffers. We won't send this 490 * packet upstack till we get all the related buffers. 491 */ 492 end_of_packet = B_FALSE; 493 } 494 495 /* 496 * Get a pointer to the actual receive buffer 497 * The mp->b_rptr is mapped to The CurrentDescriptor 498 * Buffer Address. 499 */ 500 packet = 501 (p_rx_sw_packet_t)QUEUE_GET_HEAD(&rx_ring->recv_list); 502 ASSERT(packet != NULL); 503 504 rx_buf = packet->rx_buf; 505 506 length = current_desc->length; 507 508 #ifdef __sparc 509 if (packet->dma_type == USE_DVMA) 510 dvma_sync(rx_buf->dma_handle, 0, 511 DDI_DMA_SYNC_FORKERNEL); 512 else 513 (void) ddi_dma_sync(rx_buf->dma_handle, 514 E1000G_IPALIGNROOM, length, 515 DDI_DMA_SYNC_FORKERNEL); 516 #else 517 (void) ddi_dma_sync(rx_buf->dma_handle, 518 E1000G_IPALIGNROOM, length, 519 DDI_DMA_SYNC_FORKERNEL); 520 #endif 521 522 if (e1000g_check_dma_handle( 523 rx_buf->dma_handle) != DDI_FM_OK) { 524 ddi_fm_service_impact(Adapter->dip, 525 DDI_SERVICE_DEGRADED); 526 Adapter->chip_state = E1000G_ERROR; 527 } 528 529 accept_frame = (current_desc->errors == 0) || 530 ((current_desc->errors & 531 (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) != 0); 532 533 if (hw->mac.type == e1000_82543) { 534 unsigned char last_byte; 535 536 last_byte = 537 *((unsigned char *)rx_buf->address + length - 1); 538 539 if (TBI_ACCEPT(hw, 540 current_desc->status, current_desc->errors, 541 current_desc->length, last_byte, 542 Adapter->min_frame_size, Adapter->max_frame_size)) { 543 544 e1000_tbi_adjust_stats(Adapter, 545 length, hw->mac.addr); 546 547 length--; 548 accept_frame = B_TRUE; 549 } else if (e1000_tbi_sbp_enabled_82543(hw) && 550 (current_desc->errors == E1000_RXD_ERR_CE)) { 551 accept_frame = B_TRUE; 552 } 553 } 554 555 /* 556 * Indicate the packet to the NOS if it was good. 557 * Normally, hardware will discard bad packets for us. 558 * Check for the packet to be a valid Ethernet packet 559 */ 560 if (!accept_frame) { 561 /* 562 * error in incoming packet, either the packet is not a 563 * ethernet size packet, or the packet has an error. In 564 * either case, the packet will simply be discarded. 565 */ 566 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 567 "Process Receive Interrupts: Error in Packet\n"); 568 569 E1000G_STAT(rx_ring->stat_error); 570 /* 571 * Returning here as we are done here. There is 572 * no point in waiting for while loop to elapse 573 * and the things which were done. More efficient 574 * and less error prone... 575 */ 576 goto rx_drop; 577 } 578 579 /* 580 * If the Ethernet CRC is not stripped by the hardware, 581 * we need to strip it before sending it up to the stack. 582 */ 583 if (end_of_packet && !Adapter->strip_crc) { 584 if (length > ETHERFCSL) { 585 length -= ETHERFCSL; 586 } else { 587 /* 588 * If the fragment is smaller than the CRC, 589 * drop this fragment, do the processing of 590 * the end of the packet. 591 */ 592 ASSERT(rx_ring->rx_mblk_tail != NULL); 593 rx_ring->rx_mblk_tail->b_wptr -= 594 ETHERFCSL - length; 595 rx_ring->rx_mblk_len -= 596 ETHERFCSL - length; 597 598 QUEUE_POP_HEAD(&rx_ring->recv_list); 599 600 goto rx_end_of_packet; 601 } 602 } 603 604 need_copy = B_TRUE; 605 606 if (length <= Adapter->rx_bcopy_thresh) 607 goto rx_copy; 608 609 /* 610 * Get the pre-constructed mblk that was associated 611 * to the receive data buffer. 612 */ 613 if (packet->mp == NULL) { 614 packet->mp = desballoc((unsigned char *) 615 rx_buf->address - E1000G_IPALIGNROOM, 616 length + E1000G_IPALIGNROOM, 617 BPRI_MED, &packet->free_rtn); 618 619 if (packet->mp != NULL) { 620 packet->mp->b_rptr += E1000G_IPALIGNROOM; 621 packet->mp->b_wptr += E1000G_IPALIGNROOM; 622 } else { 623 E1000G_STAT(rx_ring->stat_esballoc_fail); 624 } 625 } 626 627 if (packet->mp != NULL) { 628 /* 629 * We have two sets of buffer pool. One associated with 630 * the Rxdescriptors and other a freelist buffer pool. 631 * Each time we get a good packet, Try to get a buffer 632 * from the freelist pool using e1000g_get_buf. If we 633 * get free buffer, then replace the descriptor buffer 634 * address with the free buffer we just got, and pass 635 * the pre-constructed mblk upstack. (note no copying) 636 * 637 * If we failed to get a free buffer, then try to 638 * allocate a new buffer(mp) and copy the recv buffer 639 * content to our newly allocated buffer(mp). Don't 640 * disturb the desriptor buffer address. (note copying) 641 */ 642 newpkt = e1000g_get_buf(rx_ring); 643 644 if (newpkt != NULL) { 645 /* 646 * Get the mblk associated to the data, 647 * and strip it off the sw packet. 648 */ 649 nmp = packet->mp; 650 packet->mp = NULL; 651 packet->flag = E1000G_RX_SW_SENDUP; 652 653 /* 654 * Now replace old buffer with the new 655 * one we got from free list 656 * Both the RxSwPacket as well as the 657 * Receive Buffer Descriptor will now 658 * point to this new packet. 659 */ 660 packet = newpkt; 661 662 current_desc->buffer_addr = 663 newpkt->rx_buf->dma_address; 664 665 need_copy = B_FALSE; 666 } else { 667 E1000G_DEBUG_STAT(rx_ring->stat_no_freepkt); 668 } 669 } 670 671 rx_copy: 672 if (need_copy) { 673 /* 674 * No buffers available on free list, 675 * bcopy the data from the buffer and 676 * keep the original buffer. Dont want to 677 * do this.. Yack but no other way 678 */ 679 if ((nmp = allocb(length + E1000G_IPALIGNROOM, 680 BPRI_MED)) == NULL) { 681 /* 682 * The system has no buffers available 683 * to send up the incoming packet, hence 684 * the packet will have to be processed 685 * when there're more buffers available. 686 */ 687 E1000G_STAT(rx_ring->stat_allocb_fail); 688 goto rx_drop; 689 } 690 nmp->b_rptr += E1000G_IPALIGNROOM; 691 nmp->b_wptr += E1000G_IPALIGNROOM; 692 /* 693 * The free list did not have any buffers 694 * available, so, the received packet will 695 * have to be copied into a mp and the original 696 * buffer will have to be retained for future 697 * packet reception. 698 */ 699 bcopy(rx_buf->address, nmp->b_wptr, length); 700 } 701 702 /* 703 * The rx_sw_packet MUST be popped off the 704 * RxSwPacketList before either a putnext or freemsg 705 * is done on the mp that has now been created by the 706 * desballoc. If not, it is possible that the free 707 * routine will get called from the interrupt context 708 * and try to put this packet on the free list 709 */ 710 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 711 712 ASSERT(nmp != NULL); 713 nmp->b_wptr += length; 714 715 if (rx_ring->rx_mblk == NULL) { 716 /* 717 * TCP/UDP checksum offload and 718 * IP checksum offload 719 */ 720 if (!(current_desc->status & E1000_RXD_STAT_IXSM)) { 721 /* 722 * Check TCP/UDP checksum 723 */ 724 if ((current_desc->status & 725 E1000_RXD_STAT_TCPCS) && 726 !(current_desc->errors & 727 E1000_RXD_ERR_TCPE)) 728 cksumflags |= HCK_FULLCKSUM | 729 HCK_FULLCKSUM_OK; 730 /* 731 * Check IP Checksum 732 */ 733 if ((current_desc->status & 734 E1000_RXD_STAT_IPCS) && 735 !(current_desc->errors & 736 E1000_RXD_ERR_IPE)) 737 cksumflags |= HCK_IPV4_HDRCKSUM; 738 } 739 } 740 741 /* 742 * We need to maintain our packet chain in the global 743 * Adapter structure, for the Rx processing can end 744 * with a fragment that has no EOP set. 745 */ 746 if (rx_ring->rx_mblk == NULL) { 747 /* Get the head of the message chain */ 748 rx_ring->rx_mblk = nmp; 749 rx_ring->rx_mblk_tail = nmp; 750 rx_ring->rx_mblk_len = length; 751 } else { /* Not the first packet */ 752 /* Continue adding buffers */ 753 rx_ring->rx_mblk_tail->b_cont = nmp; 754 rx_ring->rx_mblk_tail = nmp; 755 rx_ring->rx_mblk_len += length; 756 } 757 ASSERT(rx_ring->rx_mblk != NULL); 758 ASSERT(rx_ring->rx_mblk_tail != NULL); 759 ASSERT(rx_ring->rx_mblk_tail->b_cont == NULL); 760 761 /* 762 * Now this MP is ready to travel upwards but some more 763 * fragments are coming. 764 * We will send packet upwards as soon as we get EOP 765 * set on the packet. 766 */ 767 if (!end_of_packet) { 768 /* 769 * continue to get the next descriptor, 770 * Tail would be advanced at the end 771 */ 772 goto rx_next_desc; 773 } 774 775 rx_end_of_packet: 776 /* 777 * Found packet with EOP 778 * Process the last fragment. 779 */ 780 if (cksumflags != 0) { 781 (void) hcksum_assoc(rx_ring->rx_mblk, 782 NULL, NULL, 0, 0, 0, 0, cksumflags, 0); 783 cksumflags = 0; 784 } 785 786 /* 787 * Count packets that span multi-descriptors 788 */ 789 E1000G_DEBUG_STAT_COND(rx_ring->stat_multi_desc, 790 (rx_ring->rx_mblk->b_cont != NULL)); 791 792 /* 793 * Append to list to send upstream 794 */ 795 if (ret_mp == NULL) { 796 ret_mp = ret_nmp = rx_ring->rx_mblk; 797 } else { 798 ret_nmp->b_next = rx_ring->rx_mblk; 799 ret_nmp = rx_ring->rx_mblk; 800 } 801 ret_nmp->b_next = NULL; 802 803 rx_ring->rx_mblk = NULL; 804 rx_ring->rx_mblk_tail = NULL; 805 rx_ring->rx_mblk_len = 0; 806 807 pkt_count++; 808 809 rx_next_desc: 810 /* 811 * Zero out the receive descriptors status 812 */ 813 current_desc->status = 0; 814 815 if (current_desc == rx_ring->rbd_last) 816 rx_ring->rbd_next = rx_ring->rbd_first; 817 else 818 rx_ring->rbd_next++; 819 820 last_desc = current_desc; 821 current_desc = rx_ring->rbd_next; 822 823 /* 824 * Put the buffer that we just indicated back 825 * at the end of our list 826 */ 827 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 828 &packet->Link); 829 } /* while loop */ 830 831 /* Sync the Rx descriptor DMA buffers */ 832 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 833 0, 0, DDI_DMA_SYNC_FORDEV); 834 835 /* 836 * Advance the E1000's Receive Queue #0 "Tail Pointer". 837 */ 838 E1000_WRITE_REG(hw, E1000_RDT(0), 839 (uint32_t)(last_desc - rx_ring->rbd_first)); 840 841 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 842 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 843 Adapter->chip_state = E1000G_ERROR; 844 } 845 846 Adapter->rx_pkt_cnt = pkt_count; 847 848 return (ret_mp); 849 850 rx_drop: 851 /* 852 * Zero out the receive descriptors status 853 */ 854 current_desc->status = 0; 855 856 /* Sync the Rx descriptor DMA buffers */ 857 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 858 0, 0, DDI_DMA_SYNC_FORDEV); 859 860 if (current_desc == rx_ring->rbd_last) 861 rx_ring->rbd_next = rx_ring->rbd_first; 862 else 863 rx_ring->rbd_next++; 864 865 last_desc = current_desc; 866 867 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 868 869 QUEUE_PUSH_TAIL(&rx_ring->recv_list, &packet->Link); 870 /* 871 * Reclaim all old buffers already allocated during 872 * Jumbo receives.....for incomplete reception 873 */ 874 if (rx_ring->rx_mblk != NULL) { 875 freemsg(rx_ring->rx_mblk); 876 rx_ring->rx_mblk = NULL; 877 rx_ring->rx_mblk_tail = NULL; 878 rx_ring->rx_mblk_len = 0; 879 } 880 /* 881 * Advance the E1000's Receive Queue #0 "Tail Pointer". 882 */ 883 E1000_WRITE_REG(hw, E1000_RDT(0), 884 (uint32_t)(last_desc - rx_ring->rbd_first)); 885 886 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 887 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 888 Adapter->chip_state = E1000G_ERROR; 889 } 890 891 return (ret_mp); 892 } 893