xref: /titanic_41/usr/src/uts/common/io/e1000api/e1000_i210.h (revision e95181dad4cc30742055089ecd61e6ccb97986e0)
1 /******************************************************************************
2 
3   Copyright (c) 2001-2013, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
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10       this list of conditions and the following disclaimer.
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18       this software without specific prior written permission.
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20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _E1000_I210_H_
36 #define _E1000_I210_H_
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
42 s32 e1000_update_flash_i210(struct e1000_hw *hw);
43 s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw);
44 s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw);
45 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,
46 			      u16 words, u16 *data);
47 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,
48 			     u16 words, u16 *data);
49 s32 e1000_read_invm_i211(struct e1000_hw *hw, u8 address, u16 *data);
50 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
51 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
52 
53 #define E1000_STM_OPCODE		0xDB00
54 #define E1000_EEPROM_FLASH_SIZE_WORD	0x11
55 
56 #define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
57 	(u8)((invm_dword) & 0x7)
58 #define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
59 	(u8)(((invm_dword) & 0x0000FE00) >> 9)
60 #define INVM_DWORD_TO_WORD_DATA(invm_dword) \
61 	(u16)(((invm_dword) & 0xFFFF0000) >> 16)
62 
63 enum E1000_INVM_STRUCTURE_TYPE {
64 	E1000_INVM_UNINITIALIZED_STRUCTURE		= 0x00,
65 	E1000_INVM_WORD_AUTOLOAD_STRUCTURE		= 0x01,
66 	E1000_INVM_CSR_AUTOLOAD_STRUCTURE		= 0x02,
67 	E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE	= 0x03,
68 	E1000_INVM_RSA_KEY_SHA256_STRUCTURE		= 0x04,
69 	E1000_INVM_INVALIDATED_STRUCTURE		= 0x0F,
70 };
71 
72 #define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS	8
73 #define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS	1
74 #define E1000_INVM_ULT_BYTES_SIZE	8
75 #define E1000_INVM_RECORD_SIZE_IN_BYTES	4
76 #define E1000_INVM_VER_FIELD_ONE	0x1FF8
77 #define E1000_INVM_VER_FIELD_TWO	0x7FE000
78 #define E1000_INVM_IMGTYPE_FIELD	0x1F800000
79 
80 #define E1000_INVM_MAJOR_MASK	0x3F0
81 #define E1000_INVM_MINOR_MASK	0xF
82 #define E1000_INVM_MAJOR_SHIFT	4
83 
84 #define ID_LED_DEFAULT_I210		((ID_LED_OFF1_ON2  << 8) | \
85 					 (ID_LED_DEF1_DEF2 <<  4) | \
86 					 (ID_LED_OFF1_OFF2))
87 #define ID_LED_DEFAULT_I210_SERDES	((ID_LED_DEF1_DEF2 << 8) | \
88 					 (ID_LED_DEF1_DEF2 <<  4) | \
89 					 (ID_LED_DEF1_DEF2))
90 
91 /* NVM offset defaults for I211 devices */
92 #define NVM_INIT_CTRL_2_DEFAULT_I211	0X7243
93 #define NVM_INIT_CTRL_4_DEFAULT_I211	0x00C1
94 #define NVM_LED_1_CFG_DEFAULT_I211	0x0184
95 #define NVM_LED_0_2_CFG_DEFAULT_I211	0x200C
96 
97 #ifdef __cplusplus
98 }
99 #endif
100 
101 #endif /* _E1000_I210_H_ */
102