xref: /titanic_41/usr/src/uts/common/io/e1000api/e1000_82571.h (revision e521049d0fdbd76727f036cb77c99c98d7ee1125)
1 /******************************************************************************
2 
3   Copyright (c) 2001-2010, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
8 
9    1. Redistributions of source code must retain the above copyright notice,
10       this list of conditions and the following disclaimer.
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12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
16    3. Neither the name of the Intel Corporation nor the names of its
17       contributors may be used to endorse or promote products derived from
18       this software without specific prior written permission.
19 
20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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31 
32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _E1000_82571_H_
36 #define _E1000_82571_H_
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
42 #define ID_LED_RESERVED_F746 0xF746
43 #define ID_LED_DEFAULT_82573 ((ID_LED_DEF1_DEF2 << 12) | \
44                               (ID_LED_OFF1_ON2  <<  8) | \
45                               (ID_LED_DEF1_DEF2 <<  4) | \
46                               (ID_LED_DEF1_DEF2))
47 
48 #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
49 #define AN_RETRY_COUNT          5 /* Autoneg Retry Count value */
50 
51 /* Intr Throttling - RW */
52 #define E1000_EITR_82574(_n)    (0x000E8 + (0x4 * (_n)))
53 
54 #define E1000_EIAC_82574        0x000DC /* Ext. Interrupt Auto Clear - RW */
55 #define E1000_EIAC_MASK_82574   0x01F00000
56 
57 #define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */
58 
59 #define E1000_RXCFGL    0x0B634 /* TimeSync Rx EtherType & Msg Type Reg - RW */
60 
61 #define E1000_BASE1000T_STATUS 10
62 #define E1000_IDLE_ERROR_COUNT_MASK 0xFF
63 #define E1000_RECEIVE_ERROR_COUNTER 21
64 #define E1000_RECEIVE_ERROR_MAX 0xFFFF
65 bool e1000_check_phy_82574(struct e1000_hw *hw);
66 bool e1000_get_laa_state_82571(struct e1000_hw *hw);
67 void e1000_set_laa_state_82571(struct e1000_hw *hw, bool state);
68 
69 #ifdef __cplusplus
70 }
71 #endif
72 
73 #endif	/* _E1000_82571_H_ */
74