1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright (C) 2013 Hewlett-Packard Development Company, L.P. 14 */ 15 16 #ifndef _CPQARY3_CISS_H 17 #define _CPQARY3_CISS_H 18 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 23 #define CISS_VERSION "1.00" 24 25 /* General Boundary Defintions */ 26 #define CISS_INIT_TIME 90 /* Driver Defined Value */ 27 /* Duration to Wait for the */ 28 /* controller initialization */ 29 #define CISS_SENSEINFOBYTES 256 /* Note that this value may vary */ 30 /* between host implementations */ 31 #define CISS_MAXSGENTRIES 64 32 #define CISS_MAXREPLYQS 256 33 34 /* Command Status Value */ 35 #define CISS_CMD_SUCCESS 0x00 36 #define CISS_CMD_TARGET_STATUS 0x01 37 #define CISS_CMD_DATA_UNDERRUN 0x02 38 #define CISS_CMD_DATA_OVERRUN 0x03 39 #define CISS_CMD_INVALID 0x04 40 #define CISS_CMD_PROTOCOL_ERR 0x05 41 #define CISS_CMD_HARDWARE_ERR 0x06 42 #define CISS_CMD_CONNECTION_LOST 0x07 43 #define CISS_CMD_ABORTED 0x08 44 #define CISS_CMD_ABORT_FAILED 0x09 45 #define CISS_CMD_UNSOLICITED_ABORT 0x0A 46 #define CISS_CMD_TIMEOUT 0x0B 47 #define CISS_CMD_UNABORTABLE 0x0C 48 49 /* Transfer Direction */ 50 #define CISS_XFER_NONE 0x00 51 #define CISS_XFER_WRITE 0x01 52 #define CISS_XFER_READ 0x02 53 #define CISS_XFER_RSVD 0x03 54 55 #define CISS_ATTR_UNTAGGED 0x00 56 #define CISS_ATTR_SIMPLE 0x04 57 #define CISS_ATTR_HEADOFQUEUE 0x05 58 #define CISS_ATTR_ORDERED 0x06 59 60 /* CDB Type */ 61 #define CISS_TYPE_CMD 0x00 62 #define CISS_TYPE_MSG 0x01 63 64 /* Config Space Register Offsetsp */ 65 #define CFG_VENDORID 0x00 66 #define CFG_DEVICEID 0x02 67 #define CFG_I2OBAR 0x10 68 #define CFG_MEM1BAR 0x14 69 70 /* I2O Space Register Offsets */ 71 #define I2O_IBDB_SET 0x20 72 #define I2O_IBDB_CLEAR 0x70 73 #define I2O_INT_STATUS 0x30 74 #define I2O_INT_MASK 0x34 75 #define I2O_IBPOST_Q 0x40 76 #define I2O_OBPOST_Q 0x44 77 #define I2O_OBDB_STATUS 0x9C 78 #define I2O_OBDB_CLEAR 0xA0 79 #define I2O_CTLR_INIT 0xB0 /* not available in CISS specs */ 80 81 /* Configuration Table */ 82 #define CFGTBL_CHANGE_REQ 0x00000001l 83 #define CFGTBL_ACC_CMDS 0x00000001l 84 85 /* Transport Method */ 86 #define CFGTBL_XPORT_SIMPLE 0x00000002l 87 #define CFGTBL_XPORT_PERFORMANT 0x00000004l 88 #define CFGTBL_XPORT_MEMQ 0x00000008l 89 90 #define CPQARY3_SIMPLE CFGTBL_XPORT_SIMPLE 91 #define CPQARY3_PERFORMANT CFGTBL_XPORT_PERFORMANT 92 93 /* not being used currently */ 94 #define CFGTBL_BusType_Ultra2 0x00000001l 95 #define CFGTBL_BusType_Ultra3 0x00000002l 96 #define CFGTBL_BusType_Fibre1G 0x00000100l 97 #define CFGTBL_BusType_Fibre2G 0x00000200l 98 99 /* for hard reset of the controller */ 100 #define CISS_POWER_OFF 0x03 /* Self Defined */ 101 #define CISS_POWER_ON 0x00 /* Self Defined */ 102 #define CISS_POWER_REG_OFFSET 0xF4 /* Self Defined */ 103 104 #define CT_CFG_OFFSET 0xB4 105 #define CT_MEM_OFFSET 0xB8 106 107 /* 108 * STRUCTURES 109 * Command List Structure 110 */ 111 112 #pragma pack(1) 113 114 typedef uint64_t QWORD; 115 116 /* 117 * Structure for Tag field in the controller command structure 118 * Bit 0 : Unused 119 * Bit 1 : If set, signifies an error in processing of the command 120 * Bits 2 & 3 : Used by this driver to signify a host of situations 121 * Bits 4-31 : Used by driver to fill in tag and then used by controller 122 * Bits 32-63 : Reserved 123 */ 124 #define CISS_CMD_ERROR 0x2 125 typedef struct cpqary3_tag { 126 uint32_t reserved:1; 127 uint32_t drvinfo_n_err:3; 128 uint32_t tag_value:28; 129 uint32_t unused; 130 } cpqary3_tag_t; 131 132 typedef union _SCSI3Addr_t { 133 struct { 134 uint8_t Bus:6; 135 uint8_t Mode:2; 136 uint8_t Dev; 137 } PeripDev; 138 struct { 139 uint8_t DevMSB:6; 140 uint8_t Mode:2; 141 uint8_t DevLSB; 142 } LogDev; 143 struct { 144 uint8_t Targ:6; 145 uint8_t Mode:2; 146 uint8_t Dev:5; 147 uint8_t Bus:3; 148 } LogUnit; 149 } SCSI3Addr_t; 150 151 typedef struct _PhysDevAddr_t { 152 uint32_t TargetId:24; 153 uint32_t Bus:6; 154 uint32_t Mode:2; 155 SCSI3Addr_t Target[2]; 156 } PhysDevAddr_t; 157 158 typedef struct _LogDevAddr_t { 159 uint32_t VolId:30; 160 uint32_t Mode:2; 161 uint8_t reserved[4]; 162 } LogDevAddr_t; 163 164 typedef union _LUNAddr_t { 165 uint8_t LunAddrBytes[8]; 166 SCSI3Addr_t SCSI3Lun[4]; 167 PhysDevAddr_t PhysDev; 168 LogDevAddr_t LogDev; 169 } LUNAddr_t; 170 171 typedef struct _CommandListHeader_t { 172 uint8_t ReplyQueue; 173 uint8_t SGList; 174 uint16_t SGTotal; 175 cpqary3_tag_t Tag; 176 LUNAddr_t LUN; /* 20 */ 177 } CommandListHeader_t; 178 179 typedef struct _RequestBlock_t { 180 uint8_t CDBLen; 181 struct { 182 uint8_t Type:3; 183 uint8_t Attribute:3; 184 uint8_t Direction:2; 185 } Type; 186 uint16_t Timeout; 187 uint8_t CDB[16]; /* 20 */ 188 } RequestBlock_t; 189 190 typedef struct _ErrDescriptor_t { 191 QWORD Addr; 192 uint32_t Len; /* 12 */ 193 } ErrDescriptor_t; 194 195 typedef struct _SGDescriptor_t { 196 QWORD Addr; 197 uint32_t Len; 198 uint32_t Ext; /* 16 */ 199 } SGDescriptor_t; 200 201 typedef struct _CommandList_t { 202 CommandListHeader_t Header; /* 20 */ 203 RequestBlock_t Request; /* 20, 40 */ 204 ErrDescriptor_t ErrDesc; /* 12, 52 */ 205 SGDescriptor_t SG[CISS_MAXSGENTRIES]; /* 16*SG_MAXENTRIES=512, 564 */ 206 } CommandList_t; 207 208 typedef union _MoreErrInfo_t { 209 struct { 210 uint8_t Reserved[3]; 211 uint8_t Type; 212 uint32_t ErrorInfo; 213 } Common_Info; 214 struct { 215 uint8_t Reserved[2]; 216 uint8_t offense_size; 217 uint8_t offense_num; 218 uint32_t offense_value; 219 } Invalid_Cmd; 220 } MoreErrInfo_t; 221 222 typedef struct _ErrorInfo_t { 223 uint8_t ScsiStatus; 224 uint8_t SenseLen; 225 uint16_t CommandStatus; 226 uint32_t ResidualCnt; 227 MoreErrInfo_t MoreErrInfo; 228 uint8_t SenseInfo[CISS_SENSEINFOBYTES]; /* 256 + 24 = 280 */ 229 } ErrorInfo_t; 230 231 /* Configuration Table Structure */ 232 typedef struct _HostWrite_t { 233 uint32_t TransportRequest; 234 uint32_t Upper32Addr; 235 uint32_t CoalIntDelay; 236 uint32_t CoalIntCount; 237 } HostWrite_t; 238 239 typedef struct _CfgTable_t { 240 uint8_t Signature[4]; 241 uint32_t SpecValence; 242 uint32_t TransportSupport; 243 uint32_t TransportActive; 244 HostWrite_t HostWrite; 245 uint32_t CmdsOutMax; 246 uint32_t BusTypes; 247 uint32_t TransportMethodOffset; 248 uint8_t ServerName[16]; 249 uint32_t HeartBeat; 250 /* PERF */ 251 uint32_t HostDrvrSupport; /* 0x40 offset from cfg table */ 252 uint32_t MaxSGElements; /* 0x44 offset from cfg table */ 253 uint32_t MaxLunSupport; /* 0x48 offset from cfg table */ 254 uint32_t MaxPhyDevSupport; /* 0x4C offset from cfg table */ 255 uint32_t MaxPhyDrvPerLun; /* 0x50 offset from cfg table */ 256 uint32_t MaxPerfModeCmdsOutMax; /* 0x54 offset from cfg table */ 257 uint32_t MaxBlockFetchCount; /* 0x58 offset from cfg table */ 258 /* PERF */ 259 } CfgTable_t; 260 261 typedef struct _CfgTrans_Perf_t { 262 uint32_t BlockFetchCnt[8]; 263 uint32_t ReplyQSize; 264 uint32_t ReplyQCount; 265 uint32_t ReplyQCntrAddrLow32; 266 uint32_t ReplyQCntrAddrHigh32; 267 uint32_t ReplyQAddr0Low32; 268 uint32_t ReplyQAddr0High32; 269 } CfgTrans_Perf_t; 270 271 typedef struct _CfgTrans_MemQ_t { 272 uint32_t BlockFetchCnt[8]; 273 uint32_t CmdQSize; 274 uint32_t CmdQOffset; 275 uint32_t ReplyQSize; 276 uint32_t ReplyQCount; 277 QWORD ReplyQCntrAddr; 278 QWORD ReplyQAddr[CISS_MAXREPLYQS]; 279 } CfgTrans_MemQ_t; 280 281 typedef union _CfgTrans_t { 282 CfgTrans_Perf_t *Perf; 283 CfgTrans_MemQ_t *MemQ; 284 } CfgTrans_t; 285 286 #define CPQARY3_REPLYQ_INIT_CYCLIC_IND 0x1 287 typedef struct cpqary3_drvr_replyq { 288 uchar_t cyclic_indicator; 289 uchar_t simple_cyclic_indicator; 290 caddr_t replyq_start_addr; 291 uint32_t replyq_start_paddr; 292 uint32_t *replyq_headptr; 293 uint32_t *replyq_simple_ptr; 294 uint32_t index; 295 uint32_t simple_index; 296 uint32_t max_index; 297 } cpqary3_drvr_replyq_t; 298 299 #pragma pack() 300 301 #ifdef __cplusplus 302 } 303 #endif 304 305 #endif /* _CPQARY3_CISS_H */ 306