xref: /titanic_41/usr/src/lib/libdtrace/common/sched.d (revision 749f21d359d8fbd020c974a1a5227316221bfc9c)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #pragma D depends_on module unix
30 #pragma D depends_on provider sched
31 
32 struct cpuinfo {
33 	processorid_t cpu_id;		/* CPU identifier */
34 	psetid_t cpu_pset;		/* processor set identifier */
35 	chipid_t cpu_chip;		/* chip identifier */
36 	lgrp_id_t cpu_lgrp;		/* locality group identifer */
37 	processor_info_t cpu_info;	/* CPU information */
38 };
39 
40 typedef struct cpuinfo cpuinfo_t;
41 
42 translator cpuinfo_t < cpu_t *C > {
43 	cpu_id = C->cpu_id;
44 	cpu_pset = C->cpu_part->cp_id;
45 	cpu_chip = C->cpu_chip->chip_id;
46 	cpu_lgrp = C->cpu_chip->chip_lgrp->lgrp_id;
47 	cpu_info = (processor_info_t)C->cpu_type_info;
48 };
49 
50 translator cpuinfo_t < disp_t *D > {
51 	cpu_id = D->disp_cpu == NULL ? -1 :
52 	    xlate <cpuinfo_t> (D->disp_cpu).cpu_id;
53 	cpu_pset = D->disp_cpu == NULL ? -1 :
54 	    xlate <cpuinfo_t> (D->disp_cpu).cpu_pset;
55 	cpu_chip = D->disp_cpu == NULL ? -1 :
56 	    xlate <cpuinfo_t> (D->disp_cpu).cpu_chip;
57 	cpu_lgrp = D->disp_cpu == NULL ? -1 :
58 	    xlate <cpuinfo_t> (D->disp_cpu).cpu_lgrp;
59 	cpu_info = D->disp_cpu == NULL ?
60 	    *((processor_info_t *)dtrace`dtrace_zero) :
61 	    (processor_info_t)xlate <cpuinfo_t> (D->disp_cpu).cpu_info;
62 };
63 
64 inline cpuinfo_t *curcpu = xlate <cpuinfo_t *> (curthread->t_cpu);
65 #pragma D attributes Stable/Stable/Common curcpu
66 #pragma D binding "1.0" curcpu
67 
68 inline processorid_t cpu = curcpu->cpu_id;
69 #pragma D attributes Stable/Stable/Common cpu
70 #pragma D binding "1.0" cpu
71 
72 inline psetid_t pset = curcpu->cpu_pset;
73 #pragma D attributes Stable/Stable/Common pset
74 #pragma D binding "1.0" pset
75 
76 inline chipid_t chip = curcpu->cpu_chip;
77 #pragma D attributes Stable/Stable/Common chip
78 #pragma D binding "1.0" chip
79 
80 inline lgrp_id_t lgrp = curcpu->cpu_lgrp;
81 #pragma D attributes Stable/Stable/Common lgrp
82 #pragma D binding "1.0" lgrp
83 
84