xref: /titanic_41/usr/src/cmd/trapstat/capabilities/sun4/gettrapent.c (revision 1e49577a7fcde812700ded04431b49d67cc57d6d)
1*1e49577aSRod Evans /*
2*1e49577aSRod Evans  * CDDL HEADER START
3*1e49577aSRod Evans  *
4*1e49577aSRod Evans  * The contents of this file are subject to the terms of the
5*1e49577aSRod Evans  * Common Development and Distribution License (the "License").
6*1e49577aSRod Evans  * You may not use this file except in compliance with the License.
7*1e49577aSRod Evans  *
8*1e49577aSRod Evans  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*1e49577aSRod Evans  * or http://www.opensolaris.org/os/licensing.
10*1e49577aSRod Evans  * See the License for the specific language governing permissions
11*1e49577aSRod Evans  * and limitations under the License.
12*1e49577aSRod Evans  *
13*1e49577aSRod Evans  * When distributing Covered Code, include this CDDL HEADER in each
14*1e49577aSRod Evans  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*1e49577aSRod Evans  * If applicable, add the following below this CDDL HEADER, with the
16*1e49577aSRod Evans  * fields enclosed by brackets "[]" replaced with your own identifying
17*1e49577aSRod Evans  * information: Portions Copyright [yyyy] [name of copyright owner]
18*1e49577aSRod Evans  *
19*1e49577aSRod Evans  * CDDL HEADER END
20*1e49577aSRod Evans  */
21*1e49577aSRod Evans 
22*1e49577aSRod Evans /*
23*1e49577aSRod Evans  * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
24*1e49577aSRod Evans  */
25*1e49577aSRod Evans 
26*1e49577aSRod Evans #include <sys/trapstat.h>
27*1e49577aSRod Evans #include "_trapstat.h"
28*1e49577aSRod Evans 
29*1e49577aSRod Evans static tstat_ent_t g_traps[TSTAT_NENT] = {
30*1e49577aSRod Evans #ifndef	sun4v
31*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
32*1e49577aSRod Evans 	{ "power-on", 		"power on reset" },
33*1e49577aSRod Evans 	{ "watchdog", 		"watchdog reset" },
34*1e49577aSRod Evans 	{ "xir", 		"externally initiated reset" },
35*1e49577aSRod Evans 	{ "sir", 		"software initiated reset" },
36*1e49577aSRod Evans 	{ "red", 		"RED state exception" },
37*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
38*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
39*1e49577aSRod Evans 	{ "immu-xcp", 		"instruction access exception" },
40*1e49577aSRod Evans 	{ "immu-miss", 		"instruction access MMU miss" },
41*1e49577aSRod Evans 	{ "immu-err", 		"instruction access error" },
42*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
43*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
44*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
45*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
46*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
47*1e49577aSRod Evans 	{ "ill-inst", 		"illegal instruction" },
48*1e49577aSRod Evans 	{ "priv-inst", 		"privileged opcode" },
49*1e49577aSRod Evans 	{ "unimp-ldd", 		"unimplemented LDD" },
50*1e49577aSRod Evans 	{ "unimp-std", 		"unimplemented STD" },
51*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
52*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
53*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
54*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
55*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
56*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
57*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
58*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
59*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
60*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
61*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
62*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
63*1e49577aSRod Evans 	{ "fp-disabled", 	"fp disabled" },
64*1e49577aSRod Evans 	{ "fp-ieee754", 	"fp exception ieee754" },
65*1e49577aSRod Evans 	{ "fp-xcp-other", 	"fp exception other" },
66*1e49577aSRod Evans 	{ "tag-oflow", 		"tag overflow" },
67*1e49577aSRod Evans 	{ "cleanwin", 		"clean window" },
68*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
69*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
70*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
71*1e49577aSRod Evans 	{ "div-zero", 		"division by zero" },
72*1e49577aSRod Evans 	{ "internal-err", 	"internal processor error" },
73*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
74*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
75*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
76*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
77*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
78*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
79*1e49577aSRod Evans 	{ "dmmu-xcp", 		"data access exception" },
80*1e49577aSRod Evans 	{ "dmmu-miss", 		"data access MMU miss" },
81*1e49577aSRod Evans 	{ "dmmu-err", 		"data access error" },
82*1e49577aSRod Evans 	{ "dmmu-prot", 		"data access protection" },
83*1e49577aSRod Evans 	{ "unalign", 		"mem address not aligned" },
84*1e49577aSRod Evans 	{ "lddf-unalign", 	"LDDF mem address not aligned" },
85*1e49577aSRod Evans 	{ "stdf-unalign", 	"STDF mem address not aligned" },
86*1e49577aSRod Evans 	{ "priv-act", 		"privileged action" },
87*1e49577aSRod Evans 	{ "ldqf-unalign",	"LDQF mem address not aligned" },
88*1e49577aSRod Evans 	{ "stqf-unalign", 	"STQF mem address not aligned" },
89*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
90*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
91*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
92*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
93*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
94*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
95*1e49577aSRod Evans 	{ "async-d-err", 	"async data error" },
96*1e49577aSRod Evans 	{ "level-1", 		"interrupt level 1" },
97*1e49577aSRod Evans 	{ "level-2", 		"interrupt level 2" },
98*1e49577aSRod Evans 	{ "level-3", 		"interrupt level 3" },
99*1e49577aSRod Evans 	{ "level-4", 		"interrupt level 4" },
100*1e49577aSRod Evans 	{ "level-5", 		"interrupt level 5" },
101*1e49577aSRod Evans 	{ "level-6", 		"interrupt level 6" },
102*1e49577aSRod Evans 	{ "level-7", 		"interrupt level 7" },
103*1e49577aSRod Evans 	{ "level-8", 		"interrupt level 8" },
104*1e49577aSRod Evans 	{ "level-9", 		"interrupt level 9" },
105*1e49577aSRod Evans 	{ "level-10", 		"interrupt level 10" },
106*1e49577aSRod Evans 	{ "level-11", 		"interrupt level 11" },
107*1e49577aSRod Evans 	{ "level-12", 		"interrupt level 12" },
108*1e49577aSRod Evans 	{ "level-13", 		"interrupt level 13" },
109*1e49577aSRod Evans 	{ "level-14", 		"interrupt level 14" },
110*1e49577aSRod Evans 	{ "level-15", 		"interrupt level 15" },
111*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
112*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
113*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
114*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
115*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
116*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
117*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
118*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
119*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
120*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
121*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
122*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
123*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
124*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
125*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
126*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
127*1e49577aSRod Evans 	{ "int-vec", 		"interrupt vector" },
128*1e49577aSRod Evans 	{ "pa-watch", 		"PA watchpoint" },
129*1e49577aSRod Evans 	{ "va-watch", 		"VA watchpoint" },
130*1e49577aSRod Evans 	{ "ecc-err", 		"corrected ECC error" },
131*1e49577aSRod Evans 	{ "itlb-miss", 		"instruction access MMU miss" },
132*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
133*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
134*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
135*1e49577aSRod Evans 	{ "dtlb-miss", 		"data access MMU miss" },
136*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
137*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
138*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
139*1e49577aSRod Evans 	{ "dtlb-prot", 		"data access protection" },
140*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
141*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
142*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
143*1e49577aSRod Evans 	{ "fast-ecc",		"fast ECC error" },
144*1e49577aSRod Evans 	{ "dcache-parity",	"D-cache parity error" },
145*1e49577aSRod Evans 	{ "icache-parity",	"I-cache parity error" },
146*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
147*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
148*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
149*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
150*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
151*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
152*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
153*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
154*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
155*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
156*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
157*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
158*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
159*1e49577aSRod Evans #else /* sun4v */
160*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
161*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
162*1e49577aSRod Evans 	{ "watchdog", 		"watchdog reset" },
163*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
164*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
165*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
166*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
167*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
168*1e49577aSRod Evans 	{ "immu-xcp", 		"instruction access exception" },
169*1e49577aSRod Evans 	{ "immu-miss", 		"instruction access MMU miss" },
170*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
171*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
172*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
173*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
174*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
175*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
176*1e49577aSRod Evans 	{ "ill-inst", 		"illegal instruction" },
177*1e49577aSRod Evans 	{ "priv-inst", 		"privileged opcode" },
178*1e49577aSRod Evans 	{ "unimp-ldd", 		"unimplemented LDD" },
179*1e49577aSRod Evans 	{ "unimp-std", 		"unimplemented STD" },
180*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
181*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
182*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
183*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
184*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
185*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
186*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
187*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
188*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
189*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
190*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
191*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
192*1e49577aSRod Evans 	{ "fp-disabled", 	"fp disabled" },
193*1e49577aSRod Evans 	{ "fp-ieee754", 	"fp exception ieee754" },
194*1e49577aSRod Evans 	{ "fp-xcp-other", 	"fp exception other" },
195*1e49577aSRod Evans 	{ "tag-oflow", 		"tag overflow" },
196*1e49577aSRod Evans 	{ "cleanwin", 		"clean window" },
197*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
198*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
199*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
200*1e49577aSRod Evans 	{ "div-zero", 		"division by zero" },
201*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
202*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
203*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
204*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
205*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
206*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
207*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
208*1e49577aSRod Evans 	{ "dmmu-xcp", 		"data access exception" },
209*1e49577aSRod Evans 	{ "dmmu-miss", 		"data access MMU miss" },
210*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
211*1e49577aSRod Evans 	{ "dmmu-prot", 		"data access protection" },
212*1e49577aSRod Evans 	{ "unalign", 		"mem address not aligned" },
213*1e49577aSRod Evans 	{ "lddf-unalign", 	"LDDF mem address not aligned" },
214*1e49577aSRod Evans 	{ "stdf-unalign", 	"STDF mem address not aligned" },
215*1e49577aSRod Evans 	{ "priv-act", 		"privileged action" },
216*1e49577aSRod Evans 	{ "ldqf-unalign",	"LDQF mem address not aligned" },
217*1e49577aSRod Evans 	{ "stqf-unalign", 	"STQF mem address not aligned" },
218*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
219*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
220*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
221*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
222*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
223*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
224*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
225*1e49577aSRod Evans 	{ "level-1", 		"interrupt level 1" },
226*1e49577aSRod Evans 	{ "level-2", 		"interrupt level 2" },
227*1e49577aSRod Evans 	{ "level-3", 		"interrupt level 3" },
228*1e49577aSRod Evans 	{ "level-4", 		"interrupt level 4" },
229*1e49577aSRod Evans 	{ "level-5", 		"interrupt level 5" },
230*1e49577aSRod Evans 	{ "level-6", 		"interrupt level 6" },
231*1e49577aSRod Evans 	{ "level-7", 		"interrupt level 7" },
232*1e49577aSRod Evans 	{ "level-8", 		"interrupt level 8" },
233*1e49577aSRod Evans 	{ "level-9", 		"interrupt level 9" },
234*1e49577aSRod Evans 	{ "level-10", 		"interrupt level 10" },
235*1e49577aSRod Evans 	{ "level-11", 		"interrupt level 11" },
236*1e49577aSRod Evans 	{ "level-12", 		"interrupt level 12" },
237*1e49577aSRod Evans 	{ "level-13", 		"interrupt level 13" },
238*1e49577aSRod Evans 	{ "level-14", 		"interrupt level 14" },
239*1e49577aSRod Evans 	{ "level-15", 		"interrupt level 15" },
240*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
241*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
242*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
243*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
244*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
245*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
246*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
247*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
248*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
249*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
250*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
251*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
252*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
253*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
254*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
255*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
256*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
257*1e49577aSRod Evans 	{ "pa-watch", 		"PA watchpoint" },
258*1e49577aSRod Evans 	{ "va-watch", 		"VA watchpoint" },
259*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
260*1e49577aSRod Evans 	{ "itlb-miss", 		"instruction access MMU miss" },
261*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
262*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
263*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
264*1e49577aSRod Evans 	{ "dtlb-miss", 		"data access MMU miss" },
265*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
266*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
267*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
268*1e49577aSRod Evans 	{ "dtlb-prot", 		"data access protection" },
269*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
270*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
271*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
272*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
273*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
274*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
275*1e49577aSRod Evans 	{ "ctl-xfer",		"control transfer" },
276*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
277*1e49577aSRod Evans 	{ "instr-brkpt",	"instruction breakpoint" },
278*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
279*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
280*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
281*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
282*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
283*1e49577aSRod Evans 	{ "hw-changed", 	"hardware changed" },
284*1e49577aSRod Evans 	{ "cpu_mondo", 		"cpu mondo trap" },
285*1e49577aSRod Evans 	{ "dev_mondo", 		"device mondo trap" },
286*1e49577aSRod Evans 	{ "res-err", 		"resumable error" },
287*1e49577aSRod Evans 	{ "nonres-err",		"non-resumable error" },
288*1e49577aSRod Evans #endif /* sun4v */
289*1e49577aSRod Evans 	{ "spill-0-normal", 	"spill 0 normal" },
290*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
291*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
292*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
293*1e49577aSRod Evans 	{ "spill-user-32", 	"spill user window, 32-bit" },
294*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
295*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
296*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
297*1e49577aSRod Evans 	{ "spill-user-64", 	"spill user window, 64-bit" },
298*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
299*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
300*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
301*1e49577aSRod Evans 	{ "spill-user-32-cln", 	"spill, clean user window, 32-bit" },
302*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
303*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
304*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
305*1e49577aSRod Evans 	{ "spill-user-64-cln", 	"spill, clean user window, 64-bit" },
306*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
307*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
308*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
309*1e49577aSRod Evans 	{ "spill-kern-32", 	"spill kernel window, 32-bit" },
310*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
311*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
312*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
313*1e49577aSRod Evans 	{ "spill-kern-64", 	"spill kernel window, 64-bit" },
314*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
315*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
316*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
317*1e49577aSRod Evans 	{ "spill-mixed", 	"spill window, mixed 32-bit/64-bit" },
318*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
319*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
320*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
321*1e49577aSRod Evans 	{ "spill-0-other", 	"spill 0 other" },
322*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
323*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
324*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
325*1e49577aSRod Evans 	{ "spill-asuser-32", 	"spill user window as kernel, 32-bit" },
326*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
327*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
328*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
329*1e49577aSRod Evans 	{ "spill-asuser-64", 	"spill user window as kernel, 64-bit" },
330*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
331*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
332*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
333*1e49577aSRod Evans 	{ "spill-asuser-32-cln", "spill, clean user window as kernel, 32-bit" },
334*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
335*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
336*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
337*1e49577aSRod Evans 	{ "spill-asuser-64-cln", "spill, clean user window as kernel, 64-bit" },
338*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
339*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
340*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
341*1e49577aSRod Evans 	{ "spill-5-other", 	"spill 5 other" },
342*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
343*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
344*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
345*1e49577aSRod Evans 	{ "spill-6-other", 	"spill 6 other" },
346*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
347*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
348*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
349*1e49577aSRod Evans 	{ "spill-7-other", 	"spill 7 other" },
350*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
351*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
352*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
353*1e49577aSRod Evans 	{ "fill-0-normal", 	"fill 0 normal" },
354*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
355*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
356*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
357*1e49577aSRod Evans 	{ "fill-user-32", 	"fill user window, 32-bit" },
358*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
359*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
360*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
361*1e49577aSRod Evans 	{ "fill-user-64", 	"fill user window, 64-bit" },
362*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
363*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
364*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
365*1e49577aSRod Evans 	{ "fill-user-32-cln", 	"fill user window, 32-bit" },
366*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
367*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
368*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
369*1e49577aSRod Evans 	{ "fill-user-64-cln", 	"fill user window, 64-bit" },
370*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
371*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
372*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
373*1e49577aSRod Evans 	{ "fill-kern-32", 	"fill kernel window, 32-bit" },
374*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
375*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
376*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
377*1e49577aSRod Evans 	{ "fill-kern-64", 	"fill kernel window, 64-bit" },
378*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
379*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
380*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
381*1e49577aSRod Evans 	{ "fill-mixed", 	"fill window, mixed 32-bit/64-bit" },
382*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
383*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
384*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
385*1e49577aSRod Evans 	{ "fill-0-other", 	"fill 0 other" },
386*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
387*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
388*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
389*1e49577aSRod Evans 	{ "fill-asuser-32", 	"fill user window as kernel, 32-bit" },
390*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
391*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
392*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
393*1e49577aSRod Evans 	{ "fill-asuser-64", 	"fill user window as kernel, 64-bit" },
394*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
395*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
396*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
397*1e49577aSRod Evans 	{ "fill-asuser-32-cln", "fill user window as kernel, 32-bit" },
398*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
399*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
400*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
401*1e49577aSRod Evans 	{ "fill-asuser-64-cln",	"fill user window as kernel, 64-bit" },
402*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
403*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
404*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
405*1e49577aSRod Evans 	{ "fill-5-other", 	"fill 5 other" },
406*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
407*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
408*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
409*1e49577aSRod Evans 	{ "fill-6-other", 	"fill 6 other" },
410*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
411*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
412*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
413*1e49577aSRod Evans 	{ "fill-7-other", 	"fill 7 other" },
414*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
415*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
416*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_CONTINUED },
417*1e49577aSRod Evans 	{ "syscall-4x", 	"old system call" },
418*1e49577aSRod Evans 	{ "usr-brkpt", 		"user breakpoint" },
419*1e49577aSRod Evans 	{ "usr-div-zero", 	"user divide by zero" },
420*1e49577aSRod Evans 	{ "flush-wins", 	"flush windows" },
421*1e49577aSRod Evans 	{ "clean-wins", 	"clean windows" },
422*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
423*1e49577aSRod Evans 	{ "fix-align", 		"fix unaligned references" },
424*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
425*1e49577aSRod Evans 	{ "syscall-32", 	"ILP32 system call" },
426*1e49577aSRod Evans 	{ "set-t0-addr", 	"set trap0 address" },
427*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
428*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
429*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
430*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
431*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
432*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
433*1e49577aSRod Evans 	{ "trap-inst-16", 	"trap instruction 16", },
434*1e49577aSRod Evans 	{ "trap-inst-17", 	"trap instruction 17", },
435*1e49577aSRod Evans 	{ "trap-inst-18", 	"trap instruction 18", },
436*1e49577aSRod Evans 	{ "trap-inst-19", 	"trap instruction 19", },
437*1e49577aSRod Evans 	{ "trap-inst-20", 	"trap instruction 20", },
438*1e49577aSRod Evans 	{ "trap-inst-21", 	"trap instruction 21", },
439*1e49577aSRod Evans 	{ "trap-inst-22", 	"trap instruction 22", },
440*1e49577aSRod Evans 	{ "trap-inst-23", 	"trap instruction 23", },
441*1e49577aSRod Evans 	{ "trap-inst-24", 	"trap instruction 24", },
442*1e49577aSRod Evans 	{ "trap-inst-25", 	"trap instruction 25", },
443*1e49577aSRod Evans 	{ "trap-inst-26", 	"trap instruction 26", },
444*1e49577aSRod Evans 	{ "trap-inst-27", 	"trap instruction 27", },
445*1e49577aSRod Evans 	{ "trap-inst-28", 	"trap instruction 28", },
446*1e49577aSRod Evans 	{ "trap-inst-29", 	"trap instruction 29", },
447*1e49577aSRod Evans 	{ "trap-inst-30", 	"trap instruction 30", },
448*1e49577aSRod Evans 	{ "trap-inst-31", 	"trap instruction 31", },
449*1e49577aSRod Evans 	{ "get-cc", 		"get condition codes" },
450*1e49577aSRod Evans 	{ "set-cc", 		"set condition codes" },
451*1e49577aSRod Evans 	{ "get-psr", 		"get psr" },
452*1e49577aSRod Evans 	{ "set-psr", 		"set psr (some fields)" },
453*1e49577aSRod Evans 	{ "getts", 		"get timestamp" },
454*1e49577aSRod Evans 	{ "gethrvtime", 	"get lwp virtual time" },
455*1e49577aSRod Evans 	{ "self-xcall", 	"self xcall" },
456*1e49577aSRod Evans 	{ "gethrtime", 		"get hrestime" },
457*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
458*1e49577aSRod Evans 	{ "getlgrp",		"get lgrpid" },
459*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
460*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
461*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
462*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
463*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
464*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
465*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
466*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
467*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
468*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
469*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
470*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
471*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
472*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
473*1e49577aSRod Evans 	{ "dtrace-pid",		"DTrace pid provider" },
474*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
475*1e49577aSRod Evans 	{ "dtrace-return",	"DTrace pid provider return" },
476*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
477*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
478*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
479*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
480*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
481*1e49577aSRod Evans 	{ "syscall-64", 	"LP64 system call" },
482*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
483*1e49577aSRod Evans 	{ "tt-freeze", 		"freeze traptrace" },
484*1e49577aSRod Evans 	{ "tt-unfreeze", 	"unfreeze traptrace" },
485*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
486*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
487*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
488*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
489*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
490*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
491*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
492*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
493*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
494*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
495*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
496*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
497*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
498*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
499*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
500*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
501*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
502*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
503*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
504*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
505*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
506*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
507*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
508*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
509*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
510*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
511*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
512*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
513*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
514*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
515*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
516*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
517*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
518*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
519*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
520*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
521*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
522*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
523*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
524*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
525*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
526*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
527*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
528*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
529*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
530*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
531*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
532*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
533*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
534*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
535*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
536*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
537*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
538*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
539*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
540*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_UNUSED },
541*1e49577aSRod Evans 	{ "ptl1-panic", 	"test ptl1-panic" },
542*1e49577aSRod Evans 	{ "kmdb-enter", 	"kmdb enter (L1-A)" },
543*1e49577aSRod Evans 	{ "kmdb-brkpt", 	"kmdb breakpoint" },
544*1e49577aSRod Evans 	{ "obp-brkpt", 		"obp breakpoint" },
545*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
546*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
547*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
548*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
549*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
550*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
551*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
552*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
553*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
554*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
555*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
556*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
557*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
558*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
559*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
560*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
561*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
562*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
563*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
564*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
565*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
566*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
567*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
568*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
569*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
570*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
571*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
572*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
573*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
574*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
575*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
576*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
577*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
578*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
579*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
580*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
581*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
582*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
583*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
584*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
585*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
586*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
587*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
588*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
589*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
590*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
591*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
592*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
593*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
594*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
595*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
596*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
597*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
598*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
599*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
600*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
601*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
602*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
603*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
604*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
605*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
606*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
607*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
608*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
609*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
610*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
611*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
612*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
613*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
614*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
615*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
616*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
617*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
618*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
619*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
620*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
621*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
622*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
623*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
624*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
625*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
626*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
627*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
628*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
629*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
630*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
631*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
632*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
633*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
634*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
635*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
636*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
637*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
638*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
639*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
640*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
641*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
642*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
643*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
644*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
645*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
646*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
647*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
648*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
649*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
650*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
651*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
652*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
653*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
654*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
655*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
656*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
657*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
658*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
659*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
660*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
661*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
662*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
663*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
664*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
665*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
666*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
667*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
668*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
669*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
670*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
671*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED },
672*1e49577aSRod Evans 	{ NULL, NULL,		TSTAT_ENT_RESERVED }
673*1e49577aSRod Evans };
674*1e49577aSRod Evans 
675*1e49577aSRod Evans tstat_ent_t *
get_trap_ent(int ndx)676*1e49577aSRod Evans get_trap_ent(int ndx)
677*1e49577aSRod Evans {
678*1e49577aSRod Evans 	return (&g_traps[ndx]);
679*1e49577aSRod Evans }
680