xref: /titanic_41/usr/src/cmd/fm/eversholt/files/common/pciex.esc (revision 9a0e82381c494d655823a54fc713a8c2a571131c)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21/*
22 * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23 * Use is subject to license terms.
24 */
25
26#pragma dictionary "PCIEX"
27
28#include <fm/topo_hc.h>
29
30/*
31 * FIT rates - assume leaf devices are somewhat less reliable than
32 * root complexes, switches and bridges
33 */
34#define PCIEX_RC_FIT 500
35#define PCIEX_SW_FIT 500
36#define PCIEX_BDG_FIT 500
37#define PCIEX_DEV_FIT 1000
38#define PCIEX_RC_INV_FIT 500
39#define PCIEX_DEV_INV_FIT 1000
40#define PCIEX_RC_NR_FIT 500
41#define PCIEX_SW_NR_FIT 500
42#define PCIEX_BDG_NR_FIT 500
43#define PCIEX_DEV_NR_FIT 1000
44#define PCIEX_BUS_FIT 500
45#define PCIEX_BUS_NR_FIT 500
46
47/*
48 * SERD parameters.
49 *
50 * PCI Express correctable link errors are automatically handled by the
51 * hardware, so have relatively little impact and we can allow quite a
52 * high frequency. We will also be quite conservative about nonfatal internal
53 * errors reported by the driver.
54 *
55 * Nonfatal dpe errors (ptlp/ecrc errors) have to be recovered by the hardened
56 * driver which may cause intermittant performance/responsiveness problems, so
57 * we have tighter serd parameters for these. These are most likely errors in
58 * buffers/caches within devices and bridges, so use similar rates to cpu
59 * data cache parity errors.
60 */
61#define CORRLINK_COUNT 6
62#define CORRLINK_TIME 2h
63#define NONFATAL_DPE_COUNT 3
64#define NONFATAL_DPE_TIME 168h
65
66/*
67 * if the source-id payload is valid, then check it matches
68 */
69#define SOURCE_ID_MATCHES_BDF \
70	(!payloadprop_defined("source-valid") || \
71	payloadprop("source-valid") == 0 || \
72	payloadprop("source-id") == ((b << 8) | (d << 3) | f))
73
74#define SOURCE_ID_MATCHES_OWN_BDF \
75	(payloadprop_defined("source-valid") && \
76	payloadprop("source-valid") == 1 && \
77	payloadprop("source-id") == (confprop(pciexrc, TOPO_PCI_BDF) + 0))
78
79/*
80 * Other useful macros. These use the EXCAP property (PCI Express Capabilities
81 * register) to find the type for PCI Express devices, and the CLASS-CODE
82 * property (PCI Class Code register) for to find the type of PCI devices behind
83 * a PCI Express-PCI bridge - note that 60400 and 60401 are defined as PCI-PCI
84 * bridges, everything else is consider a PCI leaf device.
85 */
86#define	PCIEXFN		pciexbus/pciexdev/pciexfn
87#define	PCIEXFNHZ	pciexbus<>/pciexdev<>/pciexfn<>
88#define	PCIEXFN1	pciexbus[b]/pciexdev[d]/pciexfn[f]
89#define	PCIFN		pcibus/pcidev/pcifn
90#define	PCIFNHZ		pcibus<>/pcidev<>/pcifn<>
91#define	PCIFN1		pcibus[b]/pcidev[d]/pcifn[f]
92#define IS_LF(f) 	(confprop(f, TOPO_PCI_EXCAP) == "pciexdev")
93#define IS_BG(f) 	(confprop(f, TOPO_PCI_EXCAP) == "pcibus")
94#define IS_SD(f)	(confprop(f, TOPO_PCI_EXCAP) == "pciexswd")
95#define IS_SU(f)	(confprop(f, TOPO_PCI_EXCAP) == "pciexswu")
96#define	IS_PCI_LF(f)	(confprop_defined(f, TOPO_PCI_CLASS) && \
97			confprop(f, TOPO_PCI_CLASS) != "60400" && \
98			confprop(f, TOPO_PCI_CLASS) != "60401")
99
100/*
101 * define faults
102 */
103event fault.io.pciex.device-interr@PCIEXFN, FITrate=PCIEX_DEV_FIT;
104
105event fault.io.pciex.device-interr-deg@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0;
106
107engine serd.io.pciex.flt-nf@PCIEXFN, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME;
108event fault.io.pciex.device-interr-unaf@PCIEXFN, FITrate=PCIEX_DEV_FIT,
109	engine=serd.io.pciex.flt-nf@PCIEXFN;
110
111engine serd.io.device.nonfatal@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME;
112event fault.io.pciex.device-interr-corr@PCIEXFN, FITrate=PCIEX_DEV_FIT,
113	engine=serd.io.device.nonfatal@PCIEXFN;
114
115event fault.io.pciex.device-interr@pciexrc, FITrate=PCIEX_RC_FIT;
116
117event fault.io.pciex.device-interr-deg@pciexrc, FITrate=PCIEX_RC_FIT, retire=0;
118
119engine serd.io.pciex.flt-nf@pciexrc, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME;
120event fault.io.pciex.device-interr-unaf@pciexrc, FITrate=PCIEX_RC_FIT,
121	engine=serd.io.pciex.flt-nf@pciexrc;
122
123engine serd.io.device.nonfatal@pciexrc, N=CORRLINK_COUNT, T=CORRLINK_TIME;
124event fault.io.pciex.device-interr-corr@pciexrc, FITrate=PCIEX_RC_FIT,
125	engine=serd.io.device.nonfatal@pciexrc;
126
127event fault.io.pciex.device-invreq@PCIEXFN, FITrate=PCIEX_DEV_INV_FIT;
128
129event fault.io.pciex.device-invreq@pciexrc, FITrate=PCIEX_RC_FIT;
130
131event fault.io.pciex.device-noresp@PCIEXFN, FITrate=PCIEX_DEV_NR_FIT;
132
133event fault.io.pciex.device-noresp@pciexrc, FITrate=PCIEX_RC_NR_FIT;
134
135event fault.io.pciex.bus-noresp@PCIEXFN, FITrate=PCIEX_BUS_NR_FIT;
136
137event fault.io.pciex.bus-linkerr@PCIEXFN, FITrate=PCIEX_BUS_FIT;
138
139engine serd.io.pciex.corrlink-bus@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME;
140event fault.io.pciex.bus-linkerr-corr@PCIEXFN, FITrate=PCIEX_BUS_FIT,
141	engine=serd.io.pciex.corrlink-bus@PCIEXFN;
142
143/*
144 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
145 * Handling of leaf driver detected internal errors. Use serd engine if
146 * no service impact - otherwise fail immediately
147 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
148 */
149event ereport.io.device.inval_state@PCIEXFN{within(5s)};
150event ereport.io.device.no_response@PCIEXFN{within(5s)};
151event ereport.io.device.stall@PCIEXFN{within(5s)};
152event ereport.io.device.badint_limit@PCIEXFN{within(5s)};
153event ereport.io.device.intern_corr@PCIEXFN{within(5s)};
154event ereport.io.device.intern_uncorr@PCIEXFN{within(5s)};
155event ereport.io.service.lost@PCIEXFN{within(5s)};
156event ereport.io.service.degraded@PCIEXFN{within(5s)};
157event ereport.io.service.unaffected@PCIEXFN{within(5s)};
158event ereport.io.service.restored@PCIEXFN{within(30s)};
159event ereport.io.service.lost@PCIFN{within(5s)};
160event ereport.io.service.degraded@PCIFN{within(5s)};
161event ereport.io.service.unaffected@PCIFN{within(5s)};
162
163event error.io.pciex.noimpact-d@PCIEXFN;
164event error.io.pciex.noimpact-d@PCIEXFN/PCIEXFN;
165event error.io.pciex.noimpact-d@PCIEXFN/PCIFN;
166event error.io.pciex.noimpact-d@PCIFN/PCIFN;
167event error.io.pciex.noimpact-d@PCIFN;
168event error.io.pciex.degraded-d@PCIEXFN;
169event error.io.pciex.degraded-d@PCIEXFN/PCIEXFN;
170event error.io.pciex.degraded-d@PCIEXFN/PCIFN;
171event error.io.pciex.degraded-d@PCIFN/PCIFN;
172event error.io.pciex.degraded-d@PCIFN;
173event error.io.pciex.lost-d@PCIEXFN;
174event error.io.pciex.lost-d@PCIEXFN/PCIEXFN;
175event error.io.pciex.lost-d@PCIEXFN/PCIFN;
176event error.io.pciex.lost-d@PCIFN/PCIFN;
177event error.io.pciex.lost-d@PCIFN;
178event error.io.service.restored@PCIEXFN;
179event error.io.service.restored@PCIFN;
180event error.io.device.nf-device@PCIEXFN;
181event error.io.device.deg-device@PCIEXFN;
182event error.io.device.f-device@PCIEXFN;
183
184prop error.io.device.f-device@PCIEXFN (1)->
185    ereport.io.device.inval_state@PCIEXFN,
186    ereport.io.device.no_response@PCIEXFN,
187    ereport.io.device.stall@PCIEXFN,
188    ereport.io.device.badint_limit@PCIEXFN,
189    ereport.io.device.intern_corr@PCIEXFN,
190    ereport.io.device.intern_uncorr@PCIEXFN;
191
192prop error.io.device.f-device@PCIEXFN (0)->
193    error.io.pciex.lost-d@PCIEXFN;
194
195prop error.io.device.deg-device@PCIEXFN (1)->
196    ereport.io.device.inval_state@PCIEXFN,
197    ereport.io.device.no_response@PCIEXFN,
198    ereport.io.device.stall@PCIEXFN,
199    ereport.io.device.badint_limit@PCIEXFN,
200    ereport.io.device.intern_corr@PCIEXFN,
201    ereport.io.device.intern_uncorr@PCIEXFN;
202
203prop error.io.device.deg-device@PCIEXFN (1)->
204    error.io.pciex.degraded-d@PCIEXFN;
205
206prop error.io.device.nf-device@PCIEXFN (1)->
207    ereport.io.device.inval_state@PCIEXFN,
208    ereport.io.device.no_response@PCIEXFN,
209    ereport.io.device.stall@PCIEXFN,
210    ereport.io.device.badint_limit@PCIEXFN,
211    ereport.io.device.intern_corr@PCIEXFN,
212    ereport.io.device.intern_uncorr@PCIEXFN;
213
214prop error.io.device.nf-device@PCIEXFN (1)->
215    error.io.pciex.noimpact-d@PCIEXFN;
216
217/*
218 * handling of service impact ereports.
219 */
220prop error.io.pciex.lost-d@PCIEXFN (1)->
221    ereport.io.service.lost@PCIEXFN,
222    error.io.pciex.lost-d@PCIEXFN/PCIEXFNHZ,
223    error.io.pciex.lost-d@PCIEXFN/PCIFNHZ;
224
225prop error.io.pciex.lost-d@PCIEXFN (0)->
226    ereport.io.service.unaffected@PCIEXFN,
227    ereport.io.service.degraded@PCIEXFN;
228
229prop error.io.pciex.lost-d@PCIFN (1)->
230    ereport.io.service.lost@PCIFN,
231    error.io.pciex.lost-d@PCIFN/PCIFNHZ;
232
233prop error.io.pciex.lost-d@PCIFN (0)->
234    ereport.io.service.unaffected@PCIFN,
235    ereport.io.service.degraded@PCIFN;
236
237prop error.io.pciex.degraded-d@PCIEXFN (1)->
238    ereport.io.service.degraded@PCIEXFN,
239    error.io.pciex.degraded-d@PCIEXFN/PCIEXFNHZ,
240    error.io.pciex.degraded-d@PCIEXFN/PCIFNHZ;
241
242prop error.io.pciex.degraded-d@PCIEXFN (0)->
243    ereport.io.service.unaffected@PCIEXFN;
244
245prop error.io.pciex.degraded-d@PCIFN (1)->
246    ereport.io.service.degraded@PCIFN,
247    error.io.pciex.degraded-d@PCIFN/PCIFNHZ;
248
249prop error.io.pciex.degraded-d@PCIFN (0)->
250    ereport.io.service.unaffected@PCIFN;
251
252prop error.io.pciex.noimpact-d@PCIEXFN (1)->
253    ereport.io.service.unaffected@PCIEXFN,
254    error.io.service.restored@PCIEXFN,
255    error.io.pciex.noimpact-d@PCIEXFN/PCIEXFNHZ,
256    error.io.pciex.noimpact-d@PCIEXFN/PCIFNHZ;
257
258prop error.io.pciex.noimpact-d@PCIFN (1)->
259    ereport.io.service.unaffected@PCIFN,
260    error.io.service.restored@PCIFN,
261    error.io.pciex.noimpact-d@PCIFN/PCIFNHZ;
262
263prop error.io.service.restored@PCIEXFN (1)->
264    ereport.io.service.lost@PCIEXFN,
265    ereport.io.service.degraded@PCIEXFN;
266
267prop error.io.service.restored@PCIEXFN (1)->
268    ereport.io.service.restored@PCIEXFN;
269
270/*
271 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
272 * A faulty PCI Express hostbridge (root complex) may cause:
273 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
274 * - nr-d:		the device not to respond to a valid upstream request
275 * - ca-d:		the device to completer abort a valid upstream request
276 * - mtlp-d:		a malformed tlp to be transmitted downstream
277 * - badreq-d:		a bad downstream request - not CRC error (may cause
278 *			completer to respond with ur or ca)
279 * - ecrcreq-d:		TLP with end-to-end CRC error transmitted downstream
280 * - ecrccomp-d:	TLP with end-to-end CRC error transmitted downstream
281 * - poisreq-d:		poisoned request transmitted downstream
282 * - poiscomp-d:	poisoned completion transmitted downstream
283 * - corrlink:		correctable link or physical level error
284 * - fatlink:		fatal link or physical level error
285 */
286event error.io.pciex.nr-d@pciexrc/PCIEXFN;
287event error.io.pciex.ca-d@pciexrc/PCIEXFN;
288event error.io.pciex.mtlp-d@pciexrc/PCIEXFN;
289event error.io.pciex.corrlink@pciexrc/pciexbus;
290event error.io.pciex.fatlink@pciexrc/PCIEXFN;
291event error.io.pciex.badreq-d@pciexrc/PCIEXFN;
292event error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFN;
293event error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFN;
294event error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFN;
295
296prop fault.io.pciex.device-noresp@pciexrc (1)->
297    error.io.pciex.nr-d@pciexrc/PCIEXFNHZ;
298
299prop fault.io.pciex.device-invreq@pciexrc (1)->
300    error.io.pciex.badreq-d@pciexrc/PCIEXFNHZ;
301
302prop fault.io.pciex.device-interr-corr@pciexrc (1)->
303    error.io.pciex.corrlink@pciexrc/pciexbus<> { setserdsuffix("_corr") };
304
305prop fault.io.pciex.device-interr-unaf@pciexrc (1)->
306    error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFNHZ;
307
308prop fault.io.pciex.device-interr-deg@pciexrc (1)->
309    error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFNHZ;
310
311prop fault.io.pciex.device-interr@pciexrc (1)->
312    error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFNHZ,
313    error.io.pciex.ca-d@pciexrc/PCIEXFNHZ,
314    error.io.pciex.mtlp-d@pciexrc/PCIEXFNHZ,
315    error.io.pciex.fatlink@pciexrc/PCIEXFNHZ;
316
317/*
318 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
319 * A faulty PCI Express leaf device or upstream switch port may cause:
320 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
321 * - flt-nr-u:		the device not to respond to a valid downstream request
322 * - flt-ca-u:		the device to completer abort a valid downstream request
323 * - flt-badreq-u:	a bad upstream request - not CRC error (may cause
324 *			completer to respond with ur or ca) - leaf only
325 * - flt-mtlp-u:	a malformed tlp transmitted upstream - leaf only
326 * - flt-ecrcreq-u:	request with end-to-end CRC error transmitted upstream
327 * - flt-ecrccomp-u:	compl with end-to-end CRC error transmitted upstream
328 * - flt-poisreq-u:	poisoned request transmitted upstream
329 * - flt-poiscomp-u:	poisoned completion transmitted upstream
330 * - device:		internal error reported by leaf device
331 * - corrlink:		correctable link or physical level error
332 * - fatlink:		fatal link or physical level error
333 */
334
335event error.io.pciex.flt-nr-u@PCIEXFN;
336event error.io.pciex.flt-ca-u@PCIEXFN;
337event error.io.pciex.flt-mtlp-u@PCIEXFN;
338event error.io.pciex.fatlink@PCIEXFN;
339event error.io.pciex.flt-badreq-u@PCIEXFN;
340event error.io.pciex.flt-nf-poisecrc-u@PCIEXFN;
341event error.io.pciex.flt-f-poisecrc-u@PCIEXFN;
342event error.io.pciex.flt-deg-poisecrc-u@PCIEXFN;
343event error.io.pciex.corrlink@pciexbus;
344
345prop fault.io.pciex.device-noresp@PCIEXFN { IS_LF(PCIEXFN) } (1)->
346    error.io.pciex.flt-nr-u@PCIEXFN;
347
348prop fault.io.pciex.device-noresp@PCIEXFN { IS_SU(PCIEXFN) } (1)->
349    error.io.pciex.flt-nr-u@PCIEXFN;
350
351prop fault.io.pciex.device-invreq@PCIEXFN { IS_LF(PCIEXFN) } (1)->
352    error.io.pciex.flt-badreq-u@PCIEXFN;
353
354prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SU(PCIEXFN) } (1)->
355    error.io.pciex.corrlink@pciexbus { setserdsuffix("_corr") };
356
357prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SU(PCIEXFN) } (1)->
358    error.io.pciex.flt-nf-poisecrc-u@PCIEXFN;
359
360prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_LF(PCIEXFN) } (0)->
361    error.io.pciex.corrlink@pciexbus { setserdsuffix("_corr") };
362
363prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_LF(PCIEXFN) } (0)->
364    error.io.device.nf-device@PCIEXFN;
365
366prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_LF(PCIEXFN) } (1)->
367    error.io.pciex.flt-nf-poisecrc-u@PCIEXFN;
368
369prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SU(PCIEXFN) } (1)->
370    error.io.pciex.flt-deg-poisecrc-u@PCIEXFN;
371
372prop fault.io.pciex.device-interr@PCIEXFN { IS_SU(PCIEXFN) } (1)->
373    error.io.pciex.flt-f-poisecrc-u@PCIEXFN,
374    error.io.pciex.flt-ca-u@PCIEXFN,
375    error.io.pciex.fatlink@PCIEXFN;
376
377prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_LF(PCIEXFN) } (1)->
378    error.io.pciex.flt-deg-poisecrc-u@PCIEXFN,
379    error.io.device.deg-device@PCIEXFN;
380
381prop fault.io.pciex.device-interr@PCIEXFN { IS_LF(PCIEXFN) } (1)->
382    error.io.pciex.flt-f-poisecrc-u@PCIEXFN,
383    error.io.device.f-device@PCIEXFN,
384    error.io.pciex.flt-ca-u@PCIEXFN,
385    error.io.pciex.flt-mtlp-u@PCIEXFN,
386    error.io.pciex.fatlink@PCIEXFN;
387
388/*
389 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
390 * A faulty PCI Express downstream switch port may cause
391 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
392 * - nr-d:		the device not to respond to an upstream request
393 * - ca-d:		the device to completer abort an upstream request
394 * - ecrcreq-d:		TLP with end-to-end CRC error transmitted upstream
395 * - ecrccomp-d:	TLP with end-to-end CRC error transmitted upstream
396 * - poisreq-d:		poisoned request transmitted upstream
397 * - poiscomp-d:	poisoned completion transmitted upstream
398 * - corrlink:		correctable link or physical level error
399 * - fatlink:		fatal link or physical level error
400 */
401
402event error.io.pciex.nr-d@PCIEXFN/PCIEXFN;
403event error.io.pciex.ca-d@PCIEXFN/PCIEXFN;
404event error.io.pciex.corrlink@PCIEXFN/pciexbus;
405event error.io.pciex.fatlink@PCIEXFN/PCIEXFN;
406event error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFN;
407event error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFN;
408event error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFN;
409
410prop fault.io.pciex.device-noresp@PCIEXFN { IS_SD(PCIEXFN) } (1)->
411    error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ;
412
413prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) } (1)->
414    error.io.pciex.corrlink@PCIEXFN/pciexbus<> { setserdsuffix("_corr") };
415
416prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SD(PCIEXFN) } (1)->
417    error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFNHZ;
418
419prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SD(PCIEXFN) } (1)->
420    error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFNHZ;
421
422prop fault.io.pciex.device-interr@PCIEXFN { IS_SD(PCIEXFN) } (1)->
423    error.io.pciex.ca-d@PCIEXFN/PCIEXFNHZ,
424    error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFNHZ,
425    error.io.pciex.fatlink@PCIEXFN/PCIEXFNHZ;
426
427/*
428 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
429 * A faulty PCIEX bus may cause:
430 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
431 * - flt-nr-u:		a device to not respond because the link is down
432 * - nr-d:		a device to not respond because the link is down
433 * - corrlink:		correctable link or physical level error
434 * - fatlink:		fatal link or physical level error
435 */
436
437event error.io.pciex.nr-d@PCIEXFN;
438
439prop fault.io.pciex.bus-noresp@PCIEXFN { !IS_SD(PCIEXFN) } (0)->
440    error.io.pciex.flt-nr-u@PCIEXFN,
441    error.io.pciex.nr-d@PCIEXFN;
442
443prop fault.io.pciex.bus-linkerr-corr@PCIEXFN (0)->
444    error.io.pciex.corrlink@pciexbus;
445
446prop fault.io.pciex.bus-linkerr@PCIEXFN { !IS_SD(PCIEXFN) } (0)->
447    error.io.pciex.fatlink@PCIEXFN;
448
449/*
450 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
451 * A faulty pciex-pci bridge may cause
452 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
453 * The following errors to propagate onto the PCI Express fabric
454 * - flt-nr-u:		the device not to respond to a valid downstream request
455 * - flt-ca-u:		the device to completer abort a valid downstream request
456 * - flt-ecrcreq-u:	request with end-to-end CRC error transmitted upstream
457 * - flt-ecrccomp-u:	compl with end-to-end CRC error transmitted upstream
458 * - flt-poisreq-u:	poisoned request transmitted upstream
459 * - flt-poiscomp-u:	poisoned completion transmitted upstream
460 * - corrlink:		correctable link or physical level error upstream
461 * - fatlink:		fatal link or physical level error upstream
462 * - sec-interr:	internal error on pci express to pci bridge
463 *
464 * And the following errors to propagate onto the secondary pci or pci/x bus
465 * (these will be handled by code in the pci.esc file).
466 * - nr-pw-d:		the device not to respond to a valid upstream request
467 * - nr-drw-d:		the device not to respond to a valid upstream request
468 * - retry-to-d:	failure to retry an downstream delayed request
469 * - ta-pw-d:		the device responds with a ta to a valid upstream
470 *			request
471 * - ta-drw-d:		the device responds with a ta to a valid upstream
472 *			request
473 * - ape-d:	address/parity to get corrupted during downstream transmission.
474 * - dpe-d:	data/parity to get corrupted during downstream transmission.
475 * - scpe-d:	split completion to get corrupted during downstream transmission
476 */
477
478event error.io.pci.ape-d@PCIEXFN/PCIFN;
479event error.io.pci.f-dpe-d@PCIEXFN/PCIFN;
480event error.io.pci.deg-dpe-d@PCIEXFN/PCIFN;
481event error.io.pci.nf-dpe-d@PCIEXFN/PCIFN;
482event error.io.pci.retry-to-d@PCIEXFN/PCIFN;
483event error.io.pci.nr-pw-d@PCIEXFN/PCIFN;
484event error.io.pci.nr-drw-d@PCIEXFN/PCIFN;
485event error.io.pci.ta-pw-d@PCIEXFN/PCIFN;
486event error.io.pci.ta-drw-d@PCIEXFN/PCIFN;
487event error.io.pcix.scpe-d@PCIEXFN/PCIFN;
488event error.io.pciex.sec-interr@PCIEXFN;
489event ereport.io.pci.sec-sta@PCIEXFN{within(5s)};
490
491prop fault.io.pciex.device-noresp@PCIEXFN { IS_BG(PCIEXFN) } (1)->
492    error.io.pciex.flt-nr-u@PCIEXFN,
493    error.io.pci.retry-to-d@PCIEXFN/PCIFNHZ,
494    error.io.pci.nr-pw-d@PCIEXFN/PCIFNHZ,
495    error.io.pci.nr-drw-d@PCIEXFN/PCIFNHZ;
496
497prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_BG(PCIEXFN) } (1)->
498    error.io.pciex.corrlink@pciexbus { setserdsuffix("_corr") };
499
500prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (1)->
501    error.io.pciex.flt-nf-poisecrc-u@PCIEXFN,
502    error.io.pci.nf-dpe-d@PCIEXFN/PCIFNHZ;
503
504prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_BG(PCIEXFN) } (1)->
505    error.io.pciex.flt-deg-poisecrc-u@PCIEXFN,
506    error.io.pci.deg-dpe-d@PCIEXFN/PCIFNHZ;
507
508prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (1)->
509    error.io.pciex.flt-f-poisecrc-u@PCIEXFN,
510    error.io.pciex.flt-ca-u@PCIEXFN,
511    error.io.pciex.flt-mtlp-u@PCIEXFN,
512    error.io.pciex.sec-interr@PCIEXFN,
513    error.io.pciex.fatlink@PCIEXFN,
514    error.io.pci.ta-pw-d@PCIEXFN/PCIFNHZ,
515    error.io.pci.ta-drw-d@PCIEXFN/PCIFNHZ,
516    error.io.pci.ape-d@PCIEXFN/PCIFNHZ,
517    error.io.pcix.scpe-d@PCIEXFN/PCIFNHZ,
518    error.io.pci.f-dpe-d@PCIEXFN/PCIFNHZ;
519
520prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (0)->
521    ereport.io.pci.sec-sta@PCIEXFN;
522
523prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (0)->
524    ereport.io.pci.sec-sta@PCIEXFN;
525
526/*
527 * the following rules for ptlp and ecrc faults are split into fatal and
528 * nonfatal, depending on the service impact reported by the leaf driver
529 */
530event error.io.pciex.nf-poisecrc-d@PCIEXFN;
531event error.io.pciex.deg-poisecrc-d@PCIEXFN;
532event error.io.pciex.f-poisecrc-d@PCIEXFN;
533event error.io.pciex.ecrcreq-d@PCIEXFN;
534event error.io.pciex.ecrccomp-d@PCIEXFN;
535event error.io.pciex.poisreq-d@PCIEXFN;
536event error.io.pciex.poiscomp-d@PCIEXFN;
537event error.io.pciex.flt-poisreq-u@PCIEXFN;
538event error.io.pciex.flt-poiscomp-u@PCIEXFN;
539event error.io.pciex.flt-ecrcreq-u@PCIEXFN;
540event error.io.pciex.flt-ecrccomp-u@PCIEXFN;
541
542prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)->
543    error.io.pciex.ecrcreq-d@PCIEXFN,
544    error.io.pciex.ecrccomp-d@PCIEXFN,
545    error.io.pciex.poisreq-d@PCIEXFN,
546    error.io.pciex.poiscomp-d@PCIEXFN;
547
548prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)->
549    error.io.pciex.noimpact-d@PCIEXFN;
550
551prop error.io.pciex.f-poisecrc-d@PCIEXFN (1)->
552    error.io.pciex.ecrcreq-d@PCIEXFN,
553    error.io.pciex.ecrccomp-d@PCIEXFN,
554    error.io.pciex.poisreq-d@PCIEXFN,
555    error.io.pciex.poiscomp-d@PCIEXFN;
556
557prop error.io.pciex.f-poisecrc-d@PCIEXFN (0)->
558    error.io.pciex.lost-d@PCIEXFN;
559
560prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)->
561    error.io.pciex.ecrcreq-d@PCIEXFN,
562    error.io.pciex.ecrccomp-d@PCIEXFN,
563    error.io.pciex.poisreq-d@PCIEXFN,
564    error.io.pciex.poiscomp-d@PCIEXFN;
565
566prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)->
567    error.io.pciex.degraded-d@PCIEXFN;
568
569prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)->
570    error.io.pciex.flt-ecrcreq-u@PCIEXFN,
571    error.io.pciex.flt-ecrccomp-u@PCIEXFN,
572    error.io.pciex.flt-poisreq-u@PCIEXFN,
573    error.io.pciex.flt-poiscomp-u@PCIEXFN;
574
575prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)->
576    error.io.pciex.noimpact-d@PCIEXFN;
577
578prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)->
579    error.io.pciex.flt-ecrcreq-u@PCIEXFN,
580    error.io.pciex.flt-ecrccomp-u@PCIEXFN,
581    error.io.pciex.flt-poisreq-u@PCIEXFN,
582    error.io.pciex.flt-poiscomp-u@PCIEXFN;
583
584prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)->
585    error.io.pciex.degraded-d@PCIEXFN;
586
587prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (1)->
588    error.io.pciex.flt-ecrcreq-u@PCIEXFN,
589    error.io.pciex.flt-ecrccomp-u@PCIEXFN,
590    error.io.pciex.flt-poisreq-u@PCIEXFN,
591    error.io.pciex.flt-poiscomp-u@PCIEXFN;
592
593prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (0)->
594    error.io.pciex.lost-d@PCIEXFN;
595
596/*
597 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
598 * declarations
599 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
600 */
601event error.io.pciex.fatal@PCIEXFN;
602event error.io.pciex.nonfatal@PCIEXFN;
603event error.io.pciex.flt-ur-u@PCIEXFN;
604event error.io.pciex.mtlp-d@PCIEXFN;
605event error.io.pciex.sw-mtlp-d@PCIEXFN;
606event error.io.pciex.mtlp-d@PCIEXFN/PCIEXFN;
607event error.io.pciex.ca-d@PCIEXFN;
608event error.io.pciex.ca-fwd-d@PCIEXFN;
609event error.io.pciex.ca-fwd-d@PCIEXFN/PCIEXFN;
610event error.io.pciex.poisreq-fwd-d@PCIEXFN;
611event error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN;
612event error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN;
613event error.io.pciex.poiscomp-fwd-d@PCIEXFN;
614event error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFN;
615event error.io.pciex.ecrcreq-fwd-d@PCIEXFN/PCIEXFN;
616event error.io.pciex.ecrccomp-fwd-d@PCIEXFN/PCIEXFN;
617event error.io.pciex.ecrcreq-fwd-d@PCIEXFN;
618event error.io.pciex.ecrccomp-fwd-d@PCIEXFN;
619event error.io.pciex.source-ecrcreq-u@PCIEXFN;
620event error.io.pciex.source-ecrccomp-u@PCIEXFN;
621event error.io.pciex.source-poiscomp-u@PCIEXFN;
622event error.io.pciex.source-poisreq-u@PCIEXFN;
623event error.io.pciex.badreq-d@PCIEXFN;
624event error.io.pciex.badreq-d@PCIEXFN/PCIEXFN;
625event error.io.pci.badreq-pw-d@PCIEXFN/PCIFN;
626event error.io.pci.badreq-drw-d@PCIEXFN/PCIFN;
627event error.io.pci.target-ma-d@PCIEXFN;
628event error.io.pci.target-rta-d@PCIEXFN;
629event error.io.pci.dpdata-pw-d@PCIEXFN/PCIFN;
630event error.io.pci.dpdata-dw-d@PCIEXFN/PCIFN;
631event error.io.pci.dpdata-dr-d@PCIEXFN/PCIFN;
632event error.io.pciex.ca-u@PCIEXFN;
633event error.io.pciex.ca-u@PCIEXFN/PCIEXFN;
634event error.io.pciex.ca-u@pciexrc/PCIEXFN;
635event error.io.pciex.ur-u@PCIEXFN;
636event error.io.pciex.ur-u@PCIEXFN/PCIEXFN;
637event error.io.pciex.ur-u@pciexrc/PCIEXFN;
638event error.io.pciex.nr-u@PCIEXFN;
639event error.io.pciex.nr-u@PCIEXFN/PCIEXFN;
640event error.io.pciex.nr-u@pciexrc/PCIEXFN;
641event error.io.pciex.mtlp-u@PCIEXFN;
642event error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN;
643event error.io.pciex.mtlp-u@pciexrc/PCIEXFN;
644event error.io.pciex.badreq-u@PCIEXFN;
645event error.io.pciex.badreq-u@PCIEXFN/PCIEXFN;
646event error.io.pciex.badreq-u@pciexrc/PCIEXFN;
647event error.io.pciex.poisreq-u@PCIEXFN;
648event error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN;
649event error.io.pciex.poisreq-u@pciexrc/PCIEXFN;
650event error.io.pciex.poiscomp-u@PCIEXFN;
651event error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN;
652event error.io.pciex.poiscomp-u@pciexrc/PCIEXFN;
653event error.io.pciex.ecrcreq-u@PCIEXFN;
654event error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN;
655event error.io.pciex.ecrccomp-u@PCIEXFN;
656event error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN;
657
658event ereport.io.pci.ma@PCIEXFN{within(5s)};
659event ereport.io.pci.mdpe@PCIEXFN{within(5s)};
660event ereport.io.pci.dpe@PCIEXFN{within(5s)};
661event ereport.io.pci.rta@PCIEXFN{within(5s)};
662event ereport.io.pci.sta@PCIEXFN{within(5s)};
663event ereport.io.pciex.dl.dllp@PCIEXFN{within(5s)};
664event ereport.io.pciex.dl.btlp@PCIEXFN{within(5s)};
665event ereport.io.pciex.dl.bdllp@PCIEXFN{within(5s)};
666event ereport.io.pciex.dl.rto@PCIEXFN{within(5s)};
667event ereport.io.pciex.dl.rnr@PCIEXFN{within(5s)};
668event ereport.io.pciex.pl.re@PCIEXFN{within(5s)};
669event ereport.io.pciex.pl.te@PCIEXFN{within(5s)};
670event ereport.io.pciex.tl.fcp@PCIEXFN{within(5s)};
671event ereport.io.pciex.tl.rof@PCIEXFN{within(5s)};
672event ereport.io.pciex.tl.mtlp@PCIEXFN{within(5s)};
673event ereport.io.pciex.tl.ur@PCIEXFN{within(5s)};
674event ereport.io.pciex.tl.ca@PCIEXFN{within(5s)};
675event ereport.io.pciex.tl.ptlp@PCIEXFN{within(5s)};
676event ereport.io.pciex.tl.ecrc@PCIEXFN{within(5s)};
677event ereport.io.pciex.tl.uc@PCIEXFN{within(5s)};
678event ereport.io.pciex.tl.cto@PCIEXFN{within(5s)};
679event ereport.io.pciex.dl.dllp@pciexrc{within(5s)};
680event ereport.io.pciex.dl.btlp@pciexrc{within(5s)};
681event ereport.io.pciex.dl.bdllp@pciexrc{within(5s)};
682event ereport.io.pciex.dl.rto@pciexrc{within(5s)};
683event ereport.io.pciex.dl.rnr@pciexrc{within(5s)};
684event ereport.io.pciex.pl.re@pciexrc{within(5s)};
685event ereport.io.pciex.pl.te@pciexrc{within(5s)};
686event ereport.io.pciex.tl.fcp@pciexrc{within(5s)};
687event ereport.io.pciex.tl.rof@pciexrc{within(5s)};
688event ereport.io.pciex.tl.mtlp@pciexrc{within(5s)};
689event ereport.io.pciex.tl.ur@pciexrc{within(5s)};
690event ereport.io.pciex.tl.ca@pciexrc{within(5s)};
691event ereport.io.pciex.tl.ptlp@pciexrc{within(5s)};
692event ereport.io.pciex.tl.ecrc@pciexrc{within(5s)};
693event ereport.io.pciex.tl.cto@pciexrc{within(5s)};
694event ereport.io.pci.sec-ma@pciexrc{within(5s)};
695event ereport.io.pci.sec-mdpe@pciexrc{within(5s)};
696event ereport.io.pci.sec-dpe@pciexrc{within(5s)};
697event ereport.io.pci.sec-rta@pciexrc{within(5s)};
698event ereport.io.pci.sec-sta@pciexrc{within(5s)};
699event ereport.io.pci.sec-mdpe@PCIEXFN{within(5s)};
700event ereport.io.pci.sec-dpe@PCIEXFN{within(5s)};
701event ereport.io.pci.sec-rserr@PCIEXFN{within(5s)};
702event ereport.io.pci.sserr@PCIEXFN{within(5s)};
703event ereport.io.pci.sec-rserr@pciexrc{within(5s)};
704event ereport.io.pciex.rc.fe-msg@pciexrc{within(5s)};
705event ereport.io.pciex.rc.nfe-msg@pciexrc{within(5s)};
706event ereport.io.pciex.rc.mue-msg@pciexrc{within(5s)};
707event ereport.io.pciex.bdg.sec-interr@PCIEXFN{within(5s)};
708event ereport.io.pciex.bdg.sec-ude@PCIEXFN{within(5s)};
709event ereport.io.pci.target-mdpe@PCIEXFN{within(5s)};
710event ereport.io.pci.target-mdpe@PCIFN{within(5s)};
711
712/*
713 * handling of fatal and nonfatal error messages propagated up to root complex
714 *
715 * Use these for errors reported by root-complex on behalf of another device.
716 * Can use source-id payload to identify where the message came from.
717 */
718prop error.io.pciex.fatal@PCIEXFN1 (1)->
719    ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) },
720    ereport.io.pciex.rc.fe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) &&
721	SOURCE_ID_MATCHES_BDF };
722
723prop error.io.pciex.fatal@PCIEXFN (0)->
724    ereport.io.pci.sserr@PCIEXFN1;
725
726prop error.io.pciex.fatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)->
727    ereport.io.pci.sserr@PCIEXFN1,
728    ereport.io.pci.sec-rserr@PCIEXFN1;
729
730prop error.io.pciex.fatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)->
731    ereport.io.pci.sec-rserr@pciexrc;
732
733prop error.io.pciex.nonfatal@PCIEXFN1 (1)->
734    ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) },
735    ereport.io.pciex.rc.nfe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) &&
736	SOURCE_ID_MATCHES_BDF };
737
738prop error.io.pciex.nonfatal@PCIEXFN (0)->
739    ereport.io.pci.sserr@PCIEXFN;
740
741prop error.io.pciex.nonfatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)->
742    ereport.io.pci.sserr@PCIEXFN1,
743    ereport.io.pci.sec-rserr@PCIEXFN1;
744
745prop error.io.pciex.nonfatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)->
746    ereport.io.pci.sec-rserr@pciexrc;
747
748/*
749 * link-level errors - could generate ereports at either end of link
750 *
751 * can use may propagations here as these ereports are only seen for these
752 * faults.
753 */
754prop error.io.pciex.corrlink@pciexbus { !IS_SD(PCIEXFN) } (0)->
755    ereport.io.pciex.dl.btlp@PCIEXFN,
756    ereport.io.pciex.dl.bdllp@PCIEXFN,
757    ereport.io.pciex.dl.rto@PCIEXFN,
758    ereport.io.pciex.dl.rnr@PCIEXFN,
759    ereport.io.pciex.pl.re@PCIEXFN;
760
761prop error.io.pciex.corrlink@PCIEXFN/pciexbus { IS_SD(PCIEXFN) } (0)->
762    ereport.io.pciex.dl.btlp@PCIEXFN,
763    ereport.io.pciex.dl.bdllp@PCIEXFN,
764    ereport.io.pciex.dl.rto@PCIEXFN,
765    ereport.io.pciex.dl.rnr@PCIEXFN,
766    ereport.io.pciex.pl.re@PCIEXFN;
767
768prop error.io.pciex.corrlink@pciexrc/pciexbus (0)->
769    ereport.io.pciex.dl.btlp@pciexrc,
770    ereport.io.pciex.dl.bdllp@pciexrc,
771    ereport.io.pciex.dl.rto@pciexrc,
772    ereport.io.pciex.dl.rnr@pciexrc,
773    ereport.io.pciex.pl.re@pciexrc;
774
775prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)->
776    error.io.pciex.fatal@PCIEXFN;
777
778prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)->
779    ereport.io.pciex.dl.dllp@PCIEXFN,
780    ereport.io.pciex.tl.fcp@PCIEXFN,
781    ereport.io.pciex.tl.rof@PCIEXFN;
782
783prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)->
784    error.io.pciex.fatal@PCIEXFN;
785
786prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)->
787    ereport.io.pciex.dl.dllp@PCIEXFN,
788    ereport.io.pciex.pl.te@PCIEXFN,
789    ereport.io.pciex.tl.fcp@PCIEXFN,
790    ereport.io.pciex.tl.rof@PCIEXFN;
791
792prop error.io.pciex.fatlink@pciexrc/PCIEXFN (0)->
793    ereport.io.pciex.dl.dllp@pciexrc,
794    ereport.io.pciex.pl.te@pciexrc,
795    ereport.io.pciex.tl.fcp@pciexrc,
796    ereport.io.pciex.tl.rof@pciexrc;
797
798/*
799 * bridge internal error
800 */
801prop error.io.pciex.sec-interr@PCIEXFN { IS_BG(PCIEXFN) } (2) ->
802    error.io.pciex.nonfatal@PCIEXFN,
803    ereport.io.pciex.bdg.sec-interr@PCIEXFN;
804
805/*
806 * downstream poisoned request
807 *
808 * - poisreq-d cascades down to the leaf device/bridge and any switch ports
809 *   on route must raise a ptlp ereport while any switch ports forwarding
810 *   the poisoned request must raise sec-mdpe ereports. The originator of the
811 *   poisoning (be it root complex or downstream port of a switch) also raises
812 *   sec-mdpe. A hardened leaf driver will also raise ptlp. A target-mdpe may
813 *   be seen at the leaf (which may be a pci device beyond the bridge).
814 *
815 * Additionally, the leaf/bridge may treat the request as a ur, which the
816 * root complex will see and report an ma. Use flt-ur-u to represent this.
817 *
818 * The fault can always be recognized and the source identified using the ptlp
819 * and sec-mdpe ereports.
820 */
821prop error.io.pciex.poisreq-d@PCIEXFN (1)->
822    error.io.pciex.poisreq-fwd-d@PCIEXFN;
823
824prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) ||
825    IS_SU(PCIEXFN) } (1)->
826    error.io.pciex.flt-ur-u@PCIEXFN,
827    error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFNHZ;
828
829prop error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN (1)->
830    ereport.io.pci.sec-mdpe@pciexrc;
831
832prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SU(PCIEXFN) } (0)->
833    ereport.io.pci.sec-mdpe@PCIEXFN;
834
835prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)->
836    ereport.io.pci.dpe@PCIEXFN,
837    ereport.io.pciex.tl.ptlp@PCIEXFN;
838
839prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)->
840    error.io.pciex.nonfatal@PCIEXFN;
841
842prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (1)->
843    ereport.io.pci.sec-mdpe@PCIEXFN;
844
845prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)->
846    ereport.io.pci.dpe@PCIEXFN,
847    ereport.io.pciex.tl.ptlp@PCIEXFN,
848    error.io.pciex.nonfatal@PCIEXFN;
849
850prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)->
851    ereport.io.pci.dpe@PCIEXFN,
852    ereport.io.pciex.tl.ptlp@PCIEXFN,
853    error.io.pciex.nonfatal@PCIEXFN;
854
855prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)->
856    error.io.pci.dpdata-pw-d@PCIEXFN/PCIFNHZ,
857    error.io.pci.dpdata-dw-d@PCIEXFN/PCIFNHZ;
858
859prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)->
860    error.io.pciex.nonfatal@PCIEXFN;
861
862prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)->
863    ereport.io.pci.dpe@PCIEXFN,
864    ereport.io.pciex.tl.ptlp@PCIEXFN,
865    error.io.pciex.flt-ur-u@PCIEXFN;
866
867prop error.io.pciex.poisreq-fwd-d@PCIEXFN (0)->
868    ereport.io.pci.target-mdpe@PCIEXFN;
869
870/*
871 * downstream poisoned completion
872 *
873 * - poiscomp-d cascades down to the leaf device/bridge and any switch ports on
874 *   route must raise ptlp and mdpe ereports.  A hardened leaf driver will also
875 *   raise pltp and mdpe. For non-hardened leaf devices, no ptlp/mdpe may be
876 *   reported, and though we should still see a nonfatal error reported from
877 *   the root complex identifying the leaf device, we won't actually be informed
878 *   that the error was an ptlp.
879 */
880prop error.io.pciex.poiscomp-d@PCIEXFN (1)->
881    error.io.pciex.poiscomp-fwd-d@PCIEXFN;
882
883prop error.io.pciex.poiscomp-fwd-d@PCIEXFN (1)->
884    error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFNHZ;
885
886prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)->
887    ereport.io.pci.dpe@PCIEXFN,
888    ereport.io.pciex.tl.ptlp@PCIEXFN;
889
890prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (1)->
891    ereport.io.pci.mdpe@PCIEXFN,
892    ereport.io.pci.sec-mdpe@PCIEXFN;
893
894prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)->
895    error.io.pciex.nonfatal@PCIEXFN;
896
897prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)->
898    ereport.io.pci.mdpe@PCIEXFN,
899    ereport.io.pci.sec-mdpe@PCIEXFN,
900    ereport.io.pci.dpe@PCIEXFN,
901    ereport.io.pciex.tl.ptlp@PCIEXFN,
902    error.io.pciex.nonfatal@PCIEXFN;
903
904prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (4)->
905    ereport.io.pci.mdpe@PCIEXFN,
906    ereport.io.pci.dpe@PCIEXFN,
907    ereport.io.pciex.tl.ptlp@PCIEXFN,
908    error.io.pciex.nonfatal@PCIEXFN;
909
910prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)->
911    error.io.pci.dpdata-dr-d@PCIEXFN/PCIFNHZ;
912
913prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)->
914    error.io.pciex.nonfatal@PCIEXFN;
915
916prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)->
917    ereport.io.pci.mdpe@PCIEXFN,
918    ereport.io.pci.dpe@PCIEXFN,
919    ereport.io.pciex.tl.ptlp@PCIEXFN;
920
921/*
922 * downstream request with ecrc error.
923 *
924 * - ecrcreq-d cascades down to the leaf device/bridge and any switches on
925 *   route can optionally raise an ecrc ereport. A hardened leaf driver may also
926 *   raise ecrc. For non-hardened leaf devices, no ecrc may be reported, and
927 *   though we should still see a nonfatal error reported from the root complex
928 *   identifying the leaf device, we won't actually be informed that the error
929 *   was an ecrc.
930 *
931 * Additionally, as the leaf/bridge will just throw away the packet, we should
932 * eventually get a cto at the root complex - so use an nr-u at the pciex
933 * leaf or bridge to get the appropriate behaviour. For the case where the leaf
934 * driver wasn't hardened we may be able to identify the leaf device (and
935 * therefore any intermediate switches which might have caused the problem)
936 * either via a target-ma ereport if available or via the nonfatal error
937 * reported from the root complex identifying the leaf device. The combination
938 * of a nonfatal error reported from the root complex and a cto from the root
939 * complex is sufficient to positively identify this case.
940 */
941prop error.io.pciex.ecrcreq-d@PCIEXFN (1)->
942    error.io.pciex.ecrcreq-fwd-d@PCIEXFN;
943
944prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) ||
945    IS_SD(PCIEXFN) } (1)->
946    error.io.pciex.flt-nr-u@PCIEXFN,
947    error.io.pciex.ecrcreq-fwd-d@PCIEXFN/PCIEXFNHZ;
948
949prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) ||
950    IS_SD(PCIEXFN) } (0)->
951    ereport.io.pciex.tl.ecrc@PCIEXFN,
952    error.io.pciex.nonfatal@PCIEXFN;
953
954prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)->
955    error.io.pciex.nonfatal@PCIEXFN,
956    ereport.io.pciex.tl.ecrc@PCIEXFN,
957    error.io.pciex.flt-nr-u@PCIEXFN;
958
959prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (2)->
960    error.io.pciex.nonfatal@PCIEXFN,
961    error.io.pciex.flt-nr-u@PCIEXFN;
962
963prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)->
964    ereport.io.pciex.tl.ecrc@PCIEXFN;
965
966/*
967 * downstream completion with ecrc error.
968 *
969 * - ecrccomp-d cascades down to the leaf device/bridge and any switches on
970 *   route can optionally raise an ecrc ereport. A hardened leaf driver may
971 *   also raise ecrc. For non-hardened leaf devices, no ecrc may be reported,
972 *   and though we should still see a nonfatal error reported from the root
973 *   complex identifying the leaf device, we won't actually be informed that
974 *   the error was an ecrc.
975 *
976 * Additionally, as the leaf/bridge will just throw away the packet, we should
977 * eventually get a cto. Note the leaf ereports are optional (ie in case driver
978 * not hardened) but if we get both ecrc and cto we need to distinguish from
979 * cto only which would be an nr-d.
980 */
981prop error.io.pciex.ecrccomp-d@PCIEXFN (1)->
982    error.io.pciex.ecrccomp-fwd-d@PCIEXFN;
983
984prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN (1)->
985    error.io.pciex.ecrccomp-fwd-d@PCIEXFN/PCIEXFNHZ;
986
987prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) ||
988    IS_SD(PCIEXFN) } (0)->
989    error.io.pciex.nonfatal@PCIEXFN,
990    ereport.io.pciex.tl.ecrc@PCIEXFN;
991
992prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)->
993    error.io.pciex.nonfatal@PCIEXFN,
994    ereport.io.pciex.tl.ecrc@PCIEXFN,
995    error.io.pciex.nr-d@PCIEXFN;
996
997prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)->
998    error.io.pciex.nonfatal@PCIEXFN;
999
1000prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1001    ereport.io.pciex.tl.ecrc@PCIEXFN,
1002    error.io.pciex.nr-d@PCIEXFN;
1003
1004/*
1005 * upstream poisoned request
1006 *
1007 * - flt-poisreq-u is on the pciex node which generated the fault
1008 * - source-poisreq-u refers to at least one leaf or bridge device
1009 *   whose bdf (if leaf) must match the source-id in the payload of the
1010 *   ereport generated from the root complex.
1011 * - poisreq-u propagates up to the root complex and any switch ports on
1012 *   route will raise a ptlp ereport, while any upstream devices generating
1013 *   or forwarding the poisoned packed will raise an mdpe ereport. The root
1014 *   complex should also report a ptlp.
1015 *
1016 * Additionally, as the root complex may treat the request as a ur, which the
1017 * leaf/bridge will see (and if hardened report) as an ma (including sending a
1018 * ta onto the child pci bus if this was a delayed write).
1019 *
1020 * We can always recognize what sort of fault this is from the ptlp (with no
1021 * sec-mdpe) at the root complex. Recognizing which originating devices may be
1022 * implicated can be done using the mdpe ereport (for a hardened leaf driver),
1023 * or for a non-hardened leaf driver by using the source-id payload in the ptlp
1024 * ereport to identify the originator of the request.  The ptlp/mdpe ereports
1025 * at the intervening switches will narrow the fault down to a single suspect.
1026 */
1027
1028prop error.io.pciex.flt-poisreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) ||
1029    IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)->
1030    error.io.pciex.source-poisreq-u@PCIEXFN;
1031
1032prop error.io.pciex.source-poisreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) &&
1033    SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)->
1034    ereport.io.pciex.tl.ptlp@pciexrc,
1035    ereport.io.pciex.tl.ur@pciexrc;
1036
1037prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1038    ereport.io.pci.ma@PCIEXFN;
1039
1040prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) &&
1041    is_under(pciexrc, PCIEXFN) } (0)->
1042    ereport.io.pciex.tl.ptlp@pciexrc,
1043    ereport.io.pciex.tl.ur@pciexrc;
1044
1045prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (0)->
1046    ereport.io.pci.ma@PCIEXFN,
1047    ereport.io.pci.sec-sta@PCIEXFN,
1048    error.io.pci.ta-drw-d@PCIEXFN/PCIFN;
1049
1050prop error.io.pciex.flt-poisreq-u@PCIEXFN (1)->
1051    error.io.pciex.poisreq-u@PCIEXFN;
1052
1053/*
1054 * the remaining propagations are also used for poisoned requests propagating
1055 * up due to a fault behind a pcie-pci bridge
1056 */
1057prop error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN (1)->
1058    error.io.pciex.poisreq-u@PCIEXFN;
1059
1060prop error.io.pciex.poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (1)->
1061    ereport.io.pci.mdpe@PCIEXFN;
1062
1063prop error.io.pciex.poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1064    ereport.io.pci.mdpe@PCIEXFN;
1065
1066prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (2)->
1067    ereport.io.pci.sec-dpe@PCIEXFN,
1068    ereport.io.pciex.tl.ptlp@PCIEXFN;
1069
1070prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (0)->
1071    ereport.io.pci.mdpe@PCIEXFN,
1072    error.io.pciex.nonfatal@PCIEXFN;
1073
1074prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (1)->
1075    ereport.io.pci.mdpe@PCIEXFN;
1076
1077prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (0)->
1078    ereport.io.pci.sec-dpe@PCIEXFN,
1079    ereport.io.pciex.tl.ptlp@PCIEXFN,
1080    error.io.pciex.nonfatal@PCIEXFN;
1081
1082prop error.io.pciex.poisreq-u@pciexrc/PCIEXFN (1)->
1083    ereport.io.pci.sec-dpe@pciexrc;
1084
1085/*
1086 * upstream poisoned completion
1087 *
1088 * - flt-poiscomp-u is on the pciex node which generated the fault. There will
1089 *   be a target-mdpe downstream from here.
1090 * - source-poiscomp-u refers to at least one leaf or bridge device
1091 *   whose bdf (if leaf) must match the source-id in the payload of the
1092 *   ereport generated from the root complex.
1093 * - poiscomp-u propagates up to the root complex and any switches on
1094 *   route will raise ptlp and sec-mdpe ereports. The root complex will also
1095 *   raise a sec-mdpe and ptlp.
1096 *
1097 * We can always recognize what sort of fault this is from the ptlp/sec-mdpe at
1098 * the root complex. Recognizing which originating devices may be implicated
1099 * can be done using the source-id payload in the ptlp ereport to identify the
1100 * originator of the completion. The ptlp/sec-mdpe ereports at the intervening
1101 * switches will narrow the fault down to a single suspect.
1102 */
1103prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_LF(PCIEXFN1) &&
1104    is_under(PCIEXFN, PCIEXFN1) } (0)->
1105    ereport.io.pci.target-mdpe@PCIEXFN1;
1106
1107prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_PCI_LF(PCIFN) &&
1108    is_under(PCIEXFN, PCIFN) } (0)->
1109    ereport.io.pci.target-mdpe@PCIFN;
1110
1111prop error.io.pciex.flt-poiscomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) ||
1112    IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)->
1113    error.io.pciex.source-poiscomp-u@PCIEXFN;
1114
1115prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) &&
1116    SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)->
1117    ereport.io.pciex.tl.ptlp@pciexrc;
1118
1119prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_BG(PCIEXFN1) &&
1120    is_under(pciexrc, PCIEXFN1) } (0)->
1121    ereport.io.pciex.tl.ptlp@pciexrc;
1122
1123prop error.io.pciex.flt-poiscomp-u@PCIEXFN (1)->
1124    error.io.pciex.poiscomp-u@PCIEXFN;
1125
1126/*
1127 * the remaining propagations are also used for poisoned completions propagating
1128 * up due to a fault behind a pcie-pci bridge
1129 */
1130prop error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN (1)->
1131    error.io.pciex.poiscomp-u@PCIEXFN;
1132
1133prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (2)->
1134    ereport.io.pci.sec-dpe@PCIEXFN,
1135    ereport.io.pciex.tl.ptlp@PCIEXFN;
1136
1137prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (1)->
1138    ereport.io.pci.sec-mdpe@PCIEXFN,
1139    ereport.io.pci.mdpe@PCIEXFN;
1140
1141prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (0)->
1142    error.io.pciex.nonfatal@PCIEXFN;
1143
1144prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SU(PCIEXFN) } (0)->
1145    ereport.io.pci.mdpe@PCIEXFN,
1146    ereport.io.pci.sec-mdpe@PCIEXFN,
1147    ereport.io.pci.sec-dpe@PCIEXFN,
1148    ereport.io.pciex.tl.ptlp@PCIEXFN,
1149    error.io.pciex.nonfatal@PCIEXFN;
1150
1151prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (1)->
1152    ereport.io.pci.sec-dpe@pciexrc;
1153
1154prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (0)->
1155    ereport.io.pci.sec-mdpe@pciexrc;
1156
1157/*
1158 * upstream request with ecrc error.
1159 *
1160 * - flt-ecrcreq-u is on the pciex node which generated the fault.
1161 * - source-ecrcreq-u cascades down to at least one leaf device (pciex or pci),
1162 *   whose bdf (if pciex) must match the source-id in the payload of the
1163 *   ereport generated from the root complex.
1164 * - ecrcreq-u propagates up to the root complex which must report it with an
1165 *   ecrc ereport and any switches on route can optionally raise an ecrc ereport
1166 *
1167 * Additionally, as the root complex will just throw away the packet, we may
1168 * eventually get a cto - so use an nr-d at the pciex leaf or bridge to get
1169 * the appropriate behaviour.
1170 *
1171 * We can always recognize what sort of fault this is from the ecrc (with no
1172 * cto) at the root complex. Recognizing which leaf device may be implicated
1173 * can be done from the cto ereport (for a hardened leaf driver) or for a
1174 * non-hardened leaf using the source-id payload of the ecrc.
1175 */
1176prop error.io.pciex.flt-ecrcreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) ||
1177    IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)->
1178    error.io.pciex.source-ecrcreq-u@PCIEXFN;
1179
1180prop error.io.pciex.source-ecrcreq-u@PCIEXFN (0)->
1181    error.io.pciex.nr-d@PCIEXFN;
1182
1183prop error.io.pciex.source-ecrcreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) &&
1184    SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)->
1185    ereport.io.pciex.tl.ecrc@pciexrc;
1186
1187prop error.io.pciex.source-ecrcreq-u@PCIEXFN { IS_BG(PCIEXFN) &&
1188    is_under(pciexrc, PCIEXFN) } (0)->
1189    ereport.io.pciex.tl.ecrc@pciexrc;
1190
1191prop error.io.pciex.flt-ecrcreq-u@PCIEXFN (1)->
1192     error.io.pciex.ecrcreq-u@PCIEXFN;
1193
1194prop error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN (1)->
1195     error.io.pciex.ecrcreq-u@PCIEXFN;
1196
1197prop error.io.pciex.ecrcreq-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)->
1198    ereport.io.pciex.tl.ecrc@PCIEXFN,
1199    error.io.pciex.nonfatal@PCIEXFN;
1200
1201/*
1202 * upstream completion with ecrc error.
1203 *
1204 * - flt-ecrccomp-u is on the pciex node which generated the fault.
1205 * - source-ecrccomp-u cascades down to at least one leaf device (pciex or pci),
1206 *   whose bdf (if pciex) must match the source-id in the payload of the
1207 *   ereport generated from the root complex.
1208 * - ecrccomp-u propagates up to the root complex, which should report it with
1209 *   an ecrc ereport and any switches on route can optionally raise an ecrc
1210 *   ereport.
1211 *
1212 * Additionally, as the root complex will just throw away the packet, we'll
1213 * eventually get a cto - so use an flt-nr-u at the pciex leaf or bridge to get
1214 * the appropriate behaviour.
1215 *
1216 * We can always recognize what sort of fault this from the ecrc/cto from the
1217 * root complex. Recognizing which leaf device may be implicated can be done
1218 * using either the source-id payload of the ecrc or the target-ma ereport if
1219 * available.
1220 */
1221prop error.io.pciex.flt-ecrccomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) ||
1222    IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)->
1223    error.io.pciex.source-ecrccomp-u@PCIEXFN;
1224
1225prop error.io.pciex.source-ecrccomp-u@PCIEXFN (0)->
1226    error.io.pciex.flt-nr-u@PCIEXFN;
1227
1228prop error.io.pciex.source-ecrccomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) &&
1229    SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)->
1230    ereport.io.pciex.tl.ecrc@pciexrc;
1231
1232prop error.io.pciex.source-ecrccomp-u@PCIEXFN { IS_BG(PCIEXFN) &&
1233    is_under(pciexrc, PCIEXFN) } (0)->
1234    ereport.io.pciex.tl.ecrc@pciexrc;
1235
1236prop error.io.pciex.flt-ecrccomp-u@PCIEXFN (1)->
1237    error.io.pciex.ecrccomp-u@PCIEXFN;
1238
1239prop error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN (1)->
1240    error.io.pciex.ecrccomp-u@PCIEXFN;
1241
1242prop error.io.pciex.ecrccomp-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)->
1243    ereport.io.pciex.tl.ecrc@PCIEXFN,
1244    error.io.pciex.nonfatal@PCIEXFN;
1245
1246/*
1247 * no response to downstream requester
1248 *
1249 * - nr-d will effectively cascade downstream to the requester. The fault here
1250 *   is always at the root complex. For a hardened leaf device driver, we will
1251 *   always be able to recognize this as the requester will report this as a
1252 *   cto. For non-hardened leaf devices, no cto will be reported, and though we
1253 *   should still see a nonfatal error reported from the root complex
1254 *   identifying the leaf device, we won't actually be informed that the error
1255 *   was a cto.
1256 */
1257prop error.io.pciex.nr-d@PCIEXFN (1)->
1258    error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ;
1259
1260prop error.io.pciex.nr-d@PCIEXFN { IS_BG(PCIEXFN) } (2)->
1261    error.io.pciex.nonfatal@PCIEXFN,
1262    ereport.io.pciex.tl.cto@PCIEXFN;
1263
1264prop error.io.pciex.nr-d@PCIEXFN { IS_BG(PCIEXFN) } (0)->
1265    ereport.io.pci.ma@PCIEXFN,
1266    ereport.io.pci.sec-sta@PCIEXFN,
1267    error.io.pci.nr-drw-d@PCIEXFN/PCIFN,
1268    error.io.pci.ta-drw-d@PCIEXFN/PCIFN;
1269
1270prop error.io.pciex.nr-d@PCIEXFN { IS_LF(PCIEXFN) } (1)->
1271    error.io.pciex.nonfatal@PCIEXFN;
1272
1273prop error.io.pciex.nr-d@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1274    ereport.io.pci.ma@PCIEXFN,
1275    ereport.io.pciex.tl.cto@PCIEXFN;
1276
1277/*
1278 * no response to upstream requester
1279 *
1280 * - flt-nr-u will effectively cascade upstream to the root complex which will
1281 *   report it as a cto.
1282 *
1283 * We have to use target-ma to informs us which device failed to respond.
1284 */
1285prop error.io.pciex.flt-nr-u@PCIEXFN (1)->
1286    error.io.pci.target-ma-d@PCIEXFN;
1287
1288prop error.io.pciex.flt-nr-u@PCIEXFN (1)->
1289    error.io.pciex.nr-u@PCIEXFN;
1290
1291prop error.io.pciex.nr-u@PCIEXFN/PCIEXFN (1)->
1292    error.io.pciex.nr-u@PCIEXFN;
1293
1294prop error.io.pciex.nr-u@pciexrc/PCIEXFN (1)->
1295    ereport.io.pciex.tl.cto@pciexrc;
1296
1297prop error.io.pciex.nr-u@pciexrc/PCIEXFN (0)->
1298    ereport.io.pci.sec-ma@pciexrc;
1299
1300/*
1301 * downstream malformed tlp
1302 *
1303 * This will cascade downstream to the receiver which will report it as an mtlp.
1304 * For non-hardened leaf drivers, no mtlp will be reported, and though we should
1305 * still see a fatal error reported from the root complex identifying the leaf
1306 * device, we won't actually be informed that the error was a mtlp.
1307 * Note that sw-mtlp-d is to handle the case where the switch is actually
1308 * the target of the packet (config request etc).
1309 */
1310prop error.io.pciex.mtlp-d@PCIEXFN { IS_SD(PCIEXFN) || IS_SU(PCIEXFN) } (1)->
1311    error.io.pciex.sw-mtlp-d@PCIEXFN,
1312    error.io.pciex.mtlp-d@PCIEXFN/PCIEXFNHZ;
1313
1314prop error.io.pciex.sw-mtlp-d@PCIEXFN { IS_SU(PCIEXFN) } (2)->
1315    error.io.pciex.fatal@PCIEXFN,
1316    ereport.io.pciex.tl.mtlp@PCIEXFN;
1317
1318prop error.io.pciex.mtlp-d@PCIEXFN { IS_BG(PCIEXFN) } (2)->
1319    error.io.pciex.fatal@PCIEXFN,
1320    ereport.io.pciex.tl.mtlp@PCIEXFN;
1321
1322prop error.io.pciex.mtlp-d@PCIEXFN { IS_LF(PCIEXFN) } (1)->
1323    error.io.pciex.fatal@PCIEXFN;
1324
1325prop error.io.pciex.mtlp-d@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1326    ereport.io.pciex.tl.mtlp@PCIEXFN;
1327
1328/*
1329 * upstream malformed tlp
1330 *
1331 * This will cascade upstream to the receiver which will report it as an mtlp.
1332 */
1333prop error.io.pciex.flt-mtlp-u@PCIEXFN (1)->
1334    error.io.pciex.mtlp-u@PCIEXFN;
1335
1336prop error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN (1)->
1337    error.io.pciex.mtlp-u@PCIEXFN;
1338
1339prop error.io.pciex.mtlp-u@pciexrc/PCIEXFN (1)->
1340    ereport.io.pciex.tl.mtlp@pciexrc;
1341
1342/*
1343 * downstream completer aborts
1344 *
1345 * This could be the fault of the root complex or a switch reporting an internal
1346 * error, or of the leaf device sending an invalid request (the latter is
1347 * handled by the flt-badreq-u case below).
1348 *
1349 * This is reported by the completer or by an intervening downstream switch
1350 * port. The completer abort response propagates down to the initiator which
1351 * will set the legacy pci bit rta.
1352 *
1353 * The fault can always be recognized by the ca ereport from the root complex
1354 * or downstream switch port. The originator of the request can be recognized
1355 * by the rta for a hardened driver or by using the source-id payload of the
1356 * ca ereport for a non-hardened driver.
1357 */
1358prop error.io.pciex.ca-d@pciexrc/PCIEXFN (0)->
1359    ereport.io.pciex.tl.ca@pciexrc;
1360
1361prop error.io.pciex.ca-d@pciexrc/PCIEXFN (1)->
1362    ereport.io.pci.sec-sta@pciexrc;
1363
1364prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (0)->
1365    ereport.io.pci.sec-sta@PCIEXFN;
1366
1367prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (2)->
1368    ereport.io.pciex.tl.ca@PCIEXFN,
1369    error.io.pciex.nonfatal@PCIEXFN;
1370
1371prop error.io.pciex.ca-d@PCIEXFN (0)->
1372    error.io.pciex.ca-fwd-d@PCIEXFN;
1373
1374prop error.io.pciex.ca-fwd-d@PCIEXFN (1)->
1375    error.io.pciex.ca-fwd-d@PCIEXFN/PCIEXFNHZ;
1376
1377prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)->
1378    ereport.io.pci.rta@PCIEXFN;
1379
1380prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (0)->
1381    ereport.io.pci.sec-sta@PCIEXFN,
1382    error.io.pci.ta-drw-d@PCIEXFN/PCIFN;
1383
1384prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1385    ereport.io.pci.rta@PCIEXFN;
1386
1387/*
1388 * upstream completer aborts
1389 *
1390 * This could be the fault of the leaf device/bridge/upstream switch port
1391 * reporting an internal error, or of the root complex sending an invalid
1392 * request (the latter case is handled by badreq-d below).
1393 *
1394 * This is reported as a ca by the completer. The completer (for non-posted
1395 * requests) sends the appropriate error bits in the completion message to
1396 * the initiator which will set the legacy pci bit sec-rta.
1397 *
1398 * The fault can always be recognized from the sec-rta bit at the root complex.
1399 *
1400 * If the fault was with a PCI Express leaf with a hardened driver, then we
1401 * will identify the device from the ca ereport.
1402 *
1403 * If the fault was with a PCI Express leaf with a non-hardened driver, then we
1404 * can still identify the leaf device from the source-id payload of the nonfatal
1405 * message ereport from the root complex or from the target-rta ereport.
1406 */
1407prop error.io.pciex.flt-ca-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)->
1408    ereport.io.pciex.tl.ca@PCIEXFN;
1409
1410prop error.io.pciex.flt-ca-u@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1411    ereport.io.pciex.tl.ca@PCIEXFN;
1412
1413prop error.io.pciex.flt-ca-u@PCIEXFN (0)->
1414    error.io.pciex.nonfatal@PCIEXFN,
1415    ereport.io.pci.sta@PCIEXFN;
1416
1417prop error.io.pciex.flt-ca-u@PCIEXFN (2)->
1418    error.io.pci.target-rta-d@PCIEXFN,
1419    error.io.pciex.ca-u@PCIEXFN;
1420
1421prop error.io.pciex.ca-u@PCIEXFN/PCIEXFN (1)->
1422    error.io.pciex.ca-u@PCIEXFN;
1423
1424prop error.io.pciex.ca-u@pciexrc/PCIEXFN (0)->
1425    ereport.io.pci.sec-rta@pciexrc;
1426
1427/*
1428 * upstream bad request
1429 *
1430 * When detecting bad data on a request the completer (or any switch on the
1431 * way to the completer) may report ur or ca. If the switch detects the problem
1432 * first then the request doesn't get forwarded on to the completer.
1433 *
1434 * These are reported as ur/ca ereports. For non-posted requests, the reporter
1435 * then sends the appropriate error bits in the completion message to the
1436 * initiator which will set the legacy pci bits ma or rta.
1437 *
1438 * For flt-badreq-u, the ca/ur ereports contain a source-id payload that
1439 * identifies the initiator.
1440 *
1441 * The fault can always be recognized by the ca/ur ereport from the root
1442 * complex or downstream switch port. The originator of the request can be
1443 * recognized by the rta/ma for a hardened driver or by using the source-id
1444 * payload of the ca/ur ereport for a non-hardened driver.
1445 */
1446prop error.io.pciex.flt-badreq-u@PCIEXFN (0)->
1447    ereport.io.pci.ma@PCIEXFN,
1448    ereport.io.pci.rta@PCIEXFN;
1449
1450prop error.io.pciex.flt-badreq-u@PCIEXFN1 {
1451    SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)->
1452    ereport.io.pciex.tl.ur@pciexrc,
1453    ereport.io.pciex.tl.ca@pciexrc;
1454
1455prop error.io.pciex.flt-badreq-u@PCIEXFN (1)->
1456    error.io.pciex.badreq-u@PCIEXFN;
1457
1458prop error.io.pciex.badreq-u@PCIEXFN/PCIEXFN (1)->
1459    error.io.pciex.badreq-u@PCIEXFN;
1460
1461prop error.io.pciex.badreq-u@pciexrc/PCIEXFN (0)->
1462    ereport.io.pci.sec-sta@pciexrc;
1463
1464prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) &&
1465    SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIEXFN1) } (0)->
1466    ereport.io.pciex.tl.ur@PCIEXFN,
1467    ereport.io.pciex.tl.ca@PCIEXFN;
1468
1469prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) &&
1470    is_under(PCIEXFN, PCIEXFN1) } (0)->
1471    ereport.io.pci.sec-sta@PCIEXFN,
1472    error.io.pciex.nonfatal@PCIEXFN;
1473
1474/*
1475 * downstream bad request
1476 *
1477 * When detecting bad data on a request the completer (or any switch on the
1478 * way to the completer) may report ur or ca. If the switch detects the problem
1479 * first then the request doesn't get forwarded on to the completer.
1480 *
1481 * These are reported as ur/ca ereports (except where the completer is a non-
1482 * hardened leaf driver when all we get is a nonfatal error from the root
1483 * complex identifying the leaf device). The reporter then sends the appropriate
1484 * error bits in the completion message to the initiator which will set the
1485 * legacy pci bits ma or rta (oddly there is no equivalent in pcie error
1486 * reporting).
1487 */
1488prop error.io.pciex.badreq-d@PCIEXFN { IS_SU(PCIEXFN) || IS_SD(PCIEXFN) } (1)->
1489    error.io.pciex.flt-ur-u@PCIEXFN,
1490    error.io.pciex.flt-ca-u@PCIEXFN,
1491    error.io.pciex.badreq-d@PCIEXFN/PCIEXFNHZ;
1492
1493prop error.io.pciex.badreq-d@PCIEXFN { IS_BG(PCIEXFN) } (1)->
1494    error.io.pciex.flt-ur-u@PCIEXFN,
1495    error.io.pciex.flt-ca-u@PCIEXFN,
1496    error.io.pci.badreq-pw-d@PCIEXFN/PCIFNHZ,
1497    error.io.pci.badreq-drw-d@PCIEXFN/PCIFNHZ;
1498
1499prop error.io.pciex.badreq-d@PCIEXFN { IS_LF(PCIEXFN) } (1)->
1500    error.io.pciex.flt-ur-u@PCIEXFN,
1501    error.io.pciex.flt-ca-u@PCIEXFN;
1502
1503prop error.io.pciex.flt-ur-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)->
1504    ereport.io.pciex.tl.ur@PCIEXFN;
1505
1506prop error.io.pciex.flt-ur-u@PCIEXFN { IS_LF(PCIEXFN) } (0)->
1507    ereport.io.pciex.tl.ur@PCIEXFN;
1508
1509prop error.io.pciex.flt-ur-u@PCIEXFN (2)->
1510    error.io.pci.target-ma-d@PCIEXFN,
1511    error.io.pciex.ur-u@PCIEXFN;
1512
1513prop error.io.pciex.flt-ur-u@PCIEXFN (0)->
1514    error.io.pciex.nonfatal@PCIEXFN;
1515
1516prop error.io.pciex.ur-u@PCIEXFN/PCIEXFN (1)->
1517    error.io.pciex.ur-u@PCIEXFN;
1518
1519prop error.io.pciex.ur-u@pciexrc/PCIEXFN (0)->
1520    ereport.io.pci.sec-ma@pciexrc;
1521
1522/*
1523 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1524 * Stub unused legacy pci ereports at root complex.
1525 * Stub tl.uc as we can't do anything useful with it (we should eventually
1526 * get a cto which we can do something with - a uc without a cto is a genuinely
1527 * spurious completion which is at least harmless).
1528 * Stub messages that the root complex sends to itself.
1529 * Stub mce/mue/ce/nr/noadverr.
1530 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1531 */
1532
1533event error.io.pciex.discard_rc@pciexrc;
1534
1535event ereport.io.pciex.noadverr@PCIEXFN{within(5s)};
1536event ereport.io.pciex.correctable@PCIEXFN{within(5s)};
1537event ereport.io.pciex.nonfatal@PCIEXFN{within(5s)};
1538event ereport.io.pciex.a-nonfatal@PCIEXFN{within(5s)};
1539event ereport.io.pciex.fatal@PCIEXFN{within(5s)};
1540event ereport.io.pci.nr@PCIEXFN{within(5s)};
1541event ereport.io.pci.nr@pciexrc{within(5s)};
1542event ereport.io.pci.ma@pciexrc{within(5s)};
1543event ereport.io.pci.rta@pciexrc{within(5s)};
1544event ereport.io.pci.sta@pciexrc{within(5s)};
1545event ereport.io.pci.dpe@pciexrc{within(5s)};
1546event ereport.io.pci.mdpe@pciexrc{within(5s)};
1547event ereport.io.pci.sserr@pciexrc{within(5s)};
1548event ereport.io.pciex.tl.uc@pciexrc{within(5s)};
1549event ereport.io.pciex.noadverr@pciexrc{within(5s)};
1550event ereport.io.pciex.a-nonfatal@pciexrc{within(5s)};
1551event ereport.io.pciex.rc.ce-msg@pciexrc{within(5s)};
1552event ereport.io.pciex.rc.mce-msg@pciexrc{within(5s)};
1553
1554event upset.io.pciex.discard_uc@PCIEXFN;
1555event upset.io.pciex.discard@PCIEXFN;
1556event upset.io.pciex.discard@pciexrc;
1557
1558prop upset.io.pciex.discard_uc@PCIEXFN { IS_BG(PCIEXFN) } (1)->
1559    ereport.io.pciex.tl.uc@PCIEXFN;
1560
1561prop upset.io.pciex.discard_uc@PCIEXFN { IS_LF(PCIEXFN) } (1)->
1562    ereport.io.pciex.tl.uc@PCIEXFN;
1563
1564prop upset.io.pciex.discard@PCIEXFN (1)->
1565    ereport.io.pci.nr@PCIEXFN,
1566    ereport.io.pciex.noadverr@PCIEXFN,
1567    ereport.io.pciex.correctable@PCIEXFN,
1568    ereport.io.pciex.nonfatal@PCIEXFN,
1569    ereport.io.pciex.a-nonfatal@PCIEXFN,
1570    ereport.io.pciex.fatal@PCIEXFN;
1571
1572prop error.io.pciex.discard_rc@pciexrc (0)->
1573    ereport.io.pciex.rc.mue-msg@pciexrc,
1574    ereport.io.pciex.rc.fe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF },
1575    ereport.io.pciex.rc.nfe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF };
1576
1577prop upset.io.pciex.discard@pciexrc (1)->
1578    error.io.pciex.discard_rc@pciexrc,
1579    ereport.io.pci.nr@pciexrc,
1580    ereport.io.pciex.noadverr@pciexrc,
1581    ereport.io.pciex.a-nonfatal@pciexrc,
1582    ereport.io.pciex.rc.ce-msg@pciexrc,
1583    ereport.io.pciex.rc.mce-msg@pciexrc,
1584    ereport.io.pciex.tl.uc@pciexrc,
1585    ereport.io.pci.ma@pciexrc,
1586    ereport.io.pci.rta@pciexrc,
1587    ereport.io.pci.sta@pciexrc,
1588    ereport.io.pci.dpe@pciexrc,
1589    ereport.io.pci.mdpe@pciexrc,
1590    ereport.io.pci.sserr@pciexrc;
1591
1592/*
1593 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1594 * rules for propagations from child PCI bus
1595 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1596 */
1597
1598event error.io.pci.retry-to-u@PCIEXFN/PCIFN;
1599event error.io.pci.ma-u@PCIEXFN/PCIFN;
1600event error.io.pci.ta-u@PCIEXFN/PCIFN;
1601event error.io.pci.ape-u@PCIEXFN/PCIFN;
1602event error.io.pci.source-ape-u@PCIFN;
1603event error.io.pci.target-ma-d@PCIFN;
1604event error.io.pci.target-rta-d@PCIFN;
1605event error.io.pci.badreq-pw-u@PCIEXFN/PCIFN;
1606event error.io.pci.badreq-drw-u@PCIEXFN/PCIFN;
1607event error.io.pci.source-perr-u@PCIFN;
1608event error.io.pci.source-dpdata-u@PCIFN;
1609event error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN;
1610event error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN;
1611event error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN;
1612event error.io.pci.perr-pw-u@PCIEXFN/PCIFN;
1613event error.io.pci.perr-dw-u@PCIEXFN/PCIFN;
1614event error.io.pci.perr-dr-u@PCIEXFN/PCIFN;
1615event error.io.pci.serr-u@PCIEXFN/PCIFN;
1616event error.io.pcix.scpe-u@PCIEXFN/PCIFN;
1617event error.io.pcix.source-scpe-u@PCIFN;
1618event error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN;
1619event error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN;
1620event error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN;
1621event error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN;
1622event error.io.pcix.uscmd@PCIEXFN;
1623
1624event ereport.io.pcix.sec-spl-dis@PCIEXFN{within(5s)};
1625event ereport.io.pciex.bdg.uscmd@PCIEXFN{within(5s)};
1626event ereport.io.pciex.bdg.sec-perr@PCIEXFN{within(5s)};
1627event ereport.io.pciex.bdg.sec-uadr@PCIEXFN{within(5s)};
1628event ereport.io.pciex.bdg.sec-uat@PCIEXFN{within(5s)};
1629event ereport.io.pciex.bdg.sec-serr@PCIEXFN{within(5s)};
1630event ereport.io.pciex.bdg.sec-tex@PCIEXFN{within(5s)};
1631event ereport.io.pciex.bdg.sec-rma@PCIEXFN{within(5s)};
1632event ereport.io.pciex.bdg.sec-rta@PCIEXFN{within(5s)};
1633event ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN{within(5s)};
1634event ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN{within(5s)};
1635event ereport.io.pci.dto@PCIEXFN{within(5s)};
1636event ereport.io.pci.sec-rta@PCIEXFN{within(5s)};
1637event ereport.io.pci.sec-ma@PCIEXFN{within(5s)};
1638
1639/*
1640 * ma-u will only propagate on to pciex bus for non-posted accesses. It
1641 * is then represented as an unsupported request.
1642 */
1643prop error.io.pci.ma-u@PCIEXFN/PCIFN (0)->
1644    ereport.io.pciex.tl.ur@PCIEXFN;
1645
1646prop error.io.pci.ma-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)->
1647    ereport.io.pci.sec-ma@pciexrc;
1648
1649prop error.io.pci.ma-u@PCIEXFN/PCIFN (2)->
1650    ereport.io.pci.sec-ma@PCIEXFN,
1651    error.io.pciex.nonfatal@PCIEXFN;
1652
1653prop error.io.pci.target-ma-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) &&
1654    SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)->
1655    ereport.io.pciex.bdg.sec-rma@PCIEXFN;
1656
1657/*
1658 * ta-u will only propagate on to pciex bus for non-posted accesses. It is
1659 * then represented as a completer abort.
1660 */
1661prop error.io.pci.ta-u@PCIEXFN/PCIFN (0)->
1662    ereport.io.pci.sta@PCIEXFN,
1663    ereport.io.pciex.tl.ca@PCIEXFN;
1664
1665prop error.io.pci.ta-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)->
1666    ereport.io.pci.sec-rta@pciexrc;
1667
1668prop error.io.pci.ta-u@PCIEXFN/PCIFN (2)->
1669    ereport.io.pci.sec-rta@PCIEXFN,
1670    error.io.pciex.nonfatal@PCIEXFN;
1671
1672prop error.io.pci.target-rta-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) &&
1673    SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)->
1674    ereport.io.pciex.bdg.sec-rta@PCIEXFN;
1675
1676/*
1677 * PERR# on a delayed write is represented as an unsupported request
1678 */
1679prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (1)->
1680    ereport.io.pci.sec-mdpe@PCIEXFN;
1681
1682prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (0)->
1683    error.io.pciex.flt-ur-u@PCIEXFN;
1684
1685prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (1)->
1686    ereport.io.pci.sec-mdpe@PCIEXFN;
1687
1688prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (0)->
1689    error.io.pciex.nonfatal@PCIEXFN;
1690
1691prop error.io.pci.perr-dr-u@PCIEXFN/PCIFN (1)->
1692    error.io.pciex.nonfatal@PCIEXFN;
1693
1694prop error.io.pci.source-perr-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) &&
1695    SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)->
1696    ereport.io.pciex.bdg.sec-perr@PCIEXFN;
1697
1698/*
1699 * If the bridge receives data with bad ecc/parity from pci/pci-x, it will
1700 * propagate onto pci express as a poisoned tlp
1701 */
1702prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (2)->
1703    ereport.io.pci.sec-dpe@PCIEXFN,
1704    error.io.pciex.poiscomp-u@PCIEXFN;
1705
1706prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (0)->
1707    error.io.pciex.nonfatal@PCIEXFN;
1708
1709prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (1)->
1710    ereport.io.pci.sec-mdpe@PCIEXFN,
1711    ereport.io.pci.mdpe@PCIEXFN;
1712
1713prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (1)->
1714    ereport.io.pci.sec-dpe@PCIEXFN;
1715
1716prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (0)->
1717    error.io.pciex.nonfatal@PCIEXFN,
1718    error.io.pciex.poisreq-u@PCIEXFN,
1719    ereport.io.pci.ma@PCIEXFN,
1720    ereport.io.pci.sec-sta@PCIEXFN,
1721    error.io.pci.ta-drw-d@PCIEXFN/PCIFN;
1722
1723prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (2)->
1724    ereport.io.pci.sec-dpe@PCIEXFN,
1725    error.io.pciex.poisreq-u@PCIEXFN;
1726
1727prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (0)->
1728    error.io.pciex.nonfatal@PCIEXFN,
1729    ereport.io.pci.ma@PCIEXFN;
1730
1731prop error.io.pci.source-dpdata-u@PCIFN { is_under(pciexrc, PCIFN) } (0)->
1732    ereport.io.pciex.tl.ptlp@pciexrc,
1733    ereport.io.pciex.tl.ur@pciexrc;
1734
1735prop error.io.pci.source-dpdata-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1)
1736    && SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)->
1737    ereport.io.pciex.bdg.sec-ude@PCIEXFN;
1738
1739/*
1740 * If the bridge sees an address or attribute parity error it is considered
1741 * a fatal error.
1742 */
1743prop error.io.pci.ape-u@PCIEXFN/PCIFN (2)->
1744    ereport.io.pci.sec-dpe@PCIEXFN,
1745    error.io.pciex.fatal@PCIEXFN;
1746
1747prop error.io.pci.source-ape-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) &&
1748    SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)->
1749    ereport.io.pciex.bdg.sec-uat@PCIEXFN,
1750    ereport.io.pciex.bdg.sec-uadr@PCIEXFN;
1751
1752prop error.io.pci.ape-u@PCIEXFN/PCIFN (0)->
1753    ereport.io.pci.sec-rserr@PCIEXFN,
1754    ereport.io.pciex.bdg.sec-serr@PCIEXFN,
1755    ereport.io.pci.sec-sta@PCIEXFN;
1756
1757/*
1758 * If the bridge sees a split completion error (pci-x only) it could
1759 * result in a number of things
1760 * - unrecovered split completion message data error (uscmd). This would
1761 *   happen on a pio write. A completer abort is returned to the initiator.
1762 * - for various faults in the split completion (eg address parity error)
1763 *   we will respond with a target abort (which the child device will treat
1764 *   as a split completion ta)
1765 * - for other faults we can't tell who send the split completion and so
1766 *   just drop the request (which the child device sees as a split
1767 *   completion ma)
1768 */
1769prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (0)->
1770    ereport.io.pci.sec-dpe@PCIEXFN,
1771    ereport.io.pci.sec-rserr@PCIEXFN,
1772    ereport.io.pciex.bdg.sec-serr@PCIEXFN,
1773    ereport.io.pci.sec-sta@PCIEXFN,
1774    error.io.pciex.fatal@PCIEXFN;
1775
1776prop error.io.pcix.source-scpe-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) &&
1777    SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)->
1778    ereport.io.pciex.bdg.sec-uat@PCIEXFN,
1779    ereport.io.pciex.bdg.sec-uadr@PCIEXFN;
1780
1781prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (1)->
1782    error.io.pcix.uscmd@PCIEXFN,
1783    error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN,
1784    error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN;
1785
1786prop error.io.pcix.uscmd@PCIEXFN (4)->
1787    error.io.pciex.fatal@PCIEXFN,
1788    ereport.io.pci.sta@PCIEXFN,
1789    ereport.io.pciex.tl.ca@PCIEXFN,
1790    ereport.io.pciex.bdg.uscmd@PCIEXFN;
1791
1792prop error.io.pcix.uscmd@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)->
1793    ereport.io.pci.sec-rta@pciexrc;
1794
1795/*
1796 * Similarly a child device may have responded with a master abort or
1797 * target abort to one of our split competions. The hardware just logs these.
1798 */
1799prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (3)->
1800    error.io.pciex.nonfatal@PCIEXFN,
1801    ereport.io.pcix.sec-spl-dis@PCIEXFN,
1802    ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN;
1803
1804prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (0)->
1805    ereport.io.pci.sec-ma@PCIEXFN;
1806
1807prop error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN (4)->
1808    error.io.pciex.nonfatal@PCIEXFN,
1809    ereport.io.pcix.sec-spl-dis@PCIEXFN,
1810    ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN,
1811    ereport.io.pci.sec-rta@PCIEXFN;
1812
1813/*
1814 * SERR# is considered fatal
1815 */
1816prop error.io.pci.serr-u@PCIEXFN/PCIFN (3)->
1817    error.io.pciex.fatal@PCIEXFN,
1818    ereport.io.pci.sec-rserr@PCIEXFN,
1819    ereport.io.pciex.bdg.sec-serr@PCIEXFN;
1820
1821/*
1822 * Retry time-out is nonfatal. The initial requester has stopped retrying so
1823 * there's nothing else the hardware can do but flag the error.
1824 */
1825prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (2)->
1826    error.io.pciex.nonfatal@PCIEXFN,
1827    ereport.io.pciex.bdg.sec-tex@PCIEXFN;
1828
1829prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (0)->
1830    ereport.io.pci.sta@PCIEXFN,
1831    ereport.io.pci.dto@PCIEXFN;
1832
1833prop error.io.pci.retry-to-u@PCIEXFN/PCIFN {
1834    is_under(pciexrc, PCIEXFN/PCIFN) } (0)->
1835    ereport.io.pci.sec-rta@pciexrc;
1836
1837/*
1838 * A bad dma request (eg with invalid address) propagates onto pci express
1839 * as a bad dma request. The end result may be a master abort or target abort
1840 * (depending on whether the child is pci-x or pci).
1841 */
1842prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN (0)->
1843    ereport.io.pci.ma@PCIEXFN,
1844    ereport.io.pci.rta@PCIEXFN,
1845    ereport.io.pci.sec-sta@PCIEXFN;
1846
1847prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN {
1848    is_under(pciexrc, PCIEXFN/PCIFN) } (0)->
1849    ereport.io.pciex.tl.ur@pciexrc,
1850    ereport.io.pciex.tl.ca@pciexrc,
1851    ereport.io.pci.sec-sta@pciexrc;
1852
1853prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) &&
1854    is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)->
1855    ereport.io.pciex.tl.ur@PCIEXFN1,
1856    ereport.io.pciex.tl.ca@PCIEXFN1,
1857    ereport.io.pci.sec-sta@PCIEXFN1,
1858    error.io.pciex.nonfatal@PCIEXFN1;
1859
1860prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN (0)->
1861    ereport.io.pci.ma@PCIEXFN,
1862    ereport.io.pci.rta@PCIEXFN,
1863    ereport.io.pci.sec-sta@PCIEXFN;
1864
1865prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN {
1866    is_under(pciexrc, PCIEXFN/PCIFN) } (0)->
1867    ereport.io.pciex.tl.ur@pciexrc,
1868    ereport.io.pciex.tl.ca@pciexrc,
1869    ereport.io.pci.sec-sta@pciexrc;
1870
1871prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) &&
1872    is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)->
1873    ereport.io.pciex.tl.ur@PCIEXFN1,
1874    ereport.io.pciex.tl.ca@PCIEXFN1,
1875    ereport.io.pci.sec-sta@PCIEXFN1,
1876    error.io.pciex.nonfatal@PCIEXFN1;
1877
1878/*
1879 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1880 * target- propagations
1881 *
1882 * A Root Complex driver may generate "target-" ereports when knowledge of the
1883 * physical address associated with a fault allows the target device to be
1884 * determined. This is not a requirement of the Diagnosis Engine, but can be
1885 * valuable when available.
1886 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1887 */
1888event error.io.pci.target-ma-d@PCIEXFN/PCIEXFN;
1889event error.io.pci.target-rta-d@PCIEXFN/PCIEXFN;
1890event error.io.pci.target-ma-d@PCIEXFN/PCIFN;
1891event error.io.pci.target-rta-d@PCIEXFN/PCIFN;
1892
1893event ereport.io.pci.target-rta@PCIEXFN{within(5s)};
1894event ereport.io.pci.target-ma@PCIEXFN{within(5s)};
1895
1896prop error.io.pci.target-ma-d@PCIEXFN (1)->
1897    error.io.pci.target-ma-d@PCIEXFN/PCIEXFNHZ;
1898
1899prop error.io.pci.target-ma-d@PCIEXFN (1)->
1900    error.io.pci.target-ma-d@PCIEXFN/PCIFNHZ;
1901
1902prop error.io.pci.target-ma-d@PCIEXFN (0)->
1903    ereport.io.pci.target-ma@PCIEXFN;
1904
1905prop error.io.pci.target-rta-d@PCIEXFN (1)->
1906    error.io.pci.target-rta-d@PCIEXFN/PCIEXFNHZ;
1907
1908prop error.io.pci.target-rta-d@PCIEXFN (1)->
1909    error.io.pci.target-rta-d@PCIEXFN/PCIFNHZ;
1910
1911prop error.io.pci.target-rta-d@PCIEXFN (0)->
1912    ereport.io.pci.target-rta@PCIEXFN;
1913
1914/*
1915 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1916 * stub unused pciex-pci bridge ereports
1917 * - ignore usc/sec-unex-spl
1918 * - ignore sec-spl-or/sec-spl-dly as these aren't really faults (tuning info)
1919 * - ignore ecc.ue ereports (we get everything we need from dpe/mdpe)
1920 * - ignore ecc.ce ereports for now (could do serd on these)
1921 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1922 */
1923
1924event ereport.io.pciex.bdg.usc@PCIEXFN{within(5s)};
1925event ereport.io.pcix.sec-unex-spl@PCIEXFN{within(5s)};
1926event ereport.io.pcix.sec-spl-or@PCIEXFN{within(5s)};
1927event ereport.io.pcix.sec-spl-dly@PCIEXFN{within(5s)};
1928event ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN{within(5s)};
1929event ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN{within(5s)};
1930event ereport.io.pcix.sec-ecc.ce-data@PCIEXFN{within(5s)};
1931event ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN{within(5s)};
1932event ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN{within(5s)};
1933event ereport.io.pcix.sec-ecc.ue-data@PCIEXFN{within(5s)};
1934event ereport.io.pcix.sec-s-ce@PCIEXFN{within(5s)};
1935event ereport.io.pcix.sec-s-ue@PCIEXFN{within(5s)};
1936
1937event upset.io.pciex.discard-bdg@PCIEXFN;
1938
1939prop upset.io.pciex.discard-bdg@PCIEXFN (1)->
1940    ereport.io.pciex.bdg.usc@PCIEXFN,
1941    ereport.io.pcix.sec-unex-spl@PCIEXFN,
1942    ereport.io.pcix.sec-spl-or@PCIEXFN,
1943    ereport.io.pcix.sec-spl-dly@PCIEXFN,
1944    ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN,
1945    ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN,
1946    ereport.io.pcix.sec-ecc.ce-data@PCIEXFN,
1947    ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN,
1948    ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN,
1949    ereport.io.pcix.sec-ecc.ue-data@PCIEXFN,
1950    ereport.io.pcix.sec-s-ce@PCIEXFN,
1951    ereport.io.pcix.sec-s-ue@PCIEXFN;
1952