xref: /illumos-gate/usr/src/uts/sun4v/sys/cnex.h (revision 5b7f77ad52bf657ba49d64d16f527e958d0fb820)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _CNEX_H
28 #define	_CNEX_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * Channel nexus "reg" spec
38  */
39 typedef struct cnex_regspec {
40 	uint64_t physaddr;
41 	uint64_t size;
42 } cnex_regspec_t;
43 
44 /*
45  * Channel nexus interrupt map
46  */
47 struct cnex_pil_map {
48 	ldc_dev_t	devclass;	/* LDC device class */
49 	uint32_t	pil;		/* PIL for device class */
50 };
51 
52 /*
53  * Channel interrupt information
54  */
55 typedef struct cnex_intr {
56 	uint64_t	ino;		/* dev intr number */
57 	uint64_t	cpuid;		/* Target CPU */
58 	uint64_t	icookie;	/* dev intr cookie */
59 	uint64_t	id;		/* LDC channel ID  */
60 	dev_info_t	*dip;		/* LDC channel devinfo */
61 	uint_t		(*hdlr)();	/* intr handler */
62 	caddr_t		arg1;		/* intr argument 1 */
63 	caddr_t		arg2;		/* intr argument 2 */
64 } cnex_intr_t;
65 
66 /* cnex interrupt types */
67 typedef enum {
68 	CNEX_TX_INTR = 1,		/* transmit interrupt */
69 	CNEX_RX_INTR			/* receive interrupt */
70 } cnex_intrtype_t;
71 
72 /*
73  * Channel information
74  */
75 typedef struct cnex_ldc {
76 	kmutex_t	lock;		/* Channel lock */
77 	struct cnex_ldc	*next;
78 
79 	uint64_t	id;
80 	ldc_dev_t 	devclass;	/* Device class channel belongs to */
81 
82 	cnex_intr_t	tx;		/* Transmit interrupt */
83 	cnex_intr_t	rx;		/* Receive interrupt */
84 	dev_info_t	*dip;		/* dip of the associated device */
85 } cnex_ldc_t;
86 
87 /*
88  * Channel nexus soft state pointer
89  */
90 typedef struct cnex_soft_state {
91 	dev_info_t 	*devi;
92 	uint64_t	cfghdl;		/* cnex config handle */
93 	kmutex_t	clist_lock;	/* lock to protect channel list */
94 	cnex_ldc_t	*clist;		/* list of registered channels */
95 } cnex_soft_state_t;
96 
97 #ifdef __cplusplus
98 }
99 #endif
100 
101 #endif /* _CNEX_H */
102