xref: /illumos-gate/usr/src/uts/sun4v/os/mach_cpu_states.c (revision cc6c5292fa8a241fe50604cf6a918edfbf7cd7d2)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/types.h>
30 #include <sys/systm.h>
31 #include <sys/archsystm.h>
32 #include <sys/t_lock.h>
33 #include <sys/uadmin.h>
34 #include <sys/panic.h>
35 #include <sys/reboot.h>
36 #include <sys/autoconf.h>
37 #include <sys/machsystm.h>
38 #include <sys/promif.h>
39 #include <sys/membar.h>
40 #include <vm/hat_sfmmu.h>
41 #include <sys/cpu_module.h>
42 #include <sys/cpu_sgnblk_defs.h>
43 #include <sys/intreg.h>
44 #include <sys/consdev.h>
45 #include <sys/kdi_impl.h>
46 #include <sys/hypervisor_api.h>
47 #include <sys/vmsystm.h>
48 #include <sys/dtrace.h>
49 #include <sys/xc_impl.h>
50 #include <sys/callb.h>
51 
52 /*
53  * hvdump_buf_va is a pointer to the currently-configured hvdump_buf.
54  * A value of NULL indicates that this area is not configured.
55  * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX.
56  */
57 
58 caddr_t hvdump_buf_va;
59 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT;
60 static uint64_t hvdump_buf_pa;
61 
62 
63 #ifdef	TRAPTRACE
64 #include <sys/traptrace.h>
65 #include <sys/hypervisor_api.h>
66 u_longlong_t panic_tick;
67 #endif /* TRAPTRACE */
68 
69 extern u_longlong_t	gettick();
70 static void reboot_machine(char *);
71 static void update_hvdump_buffer(void);
72 
73 /*
74  * For xt_sync synchronization.
75  */
76 extern uint64_t xc_tick_limit;
77 extern uint64_t xc_tick_jump_limit;
78 
79 /*
80  * We keep our own copies, used for cache flushing, because we can be called
81  * before cpu_fiximpl().
82  */
83 static int kdi_dcache_size;
84 static int kdi_dcache_linesize;
85 static int kdi_icache_size;
86 static int kdi_icache_linesize;
87 
88 /*
89  * Assembly support for generic modules in sun4v/ml/mach_xc.s
90  */
91 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
92 extern void kdi_flush_idcache(int, int, int, int);
93 extern uint64_t get_cpuaddr(uint64_t, uint64_t);
94 
95 /*
96  * Machine dependent code to reboot.
97  * "mdep" is interpreted as a character pointer; if non-null, it is a pointer
98  * to a string to be used as the argument string when rebooting.
99  *
100  * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
101  * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
102  * we are in a normal shutdown sequence (interrupts are not blocked, the
103  * system is not panic'ing or being suspended).
104  */
105 /*ARGSUSED*/
106 void
107 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
108 {
109 	page_t *first, *pp;
110 	extern void pm_cfb_check_and_powerup(void);
111 
112 	/*
113 	 * Clear any unresolved UEs from memory.  We rely on the fact that on
114 	 * sun4u, pagezero() will always clear UEs.  Since we're rebooting, we
115 	 * just force p_selock to appear locked so pagezero()'s assert works.
116 	 *
117 	 * Pages that were retired successfully due to multiple CEs will
118 	 * also be cleared.
119 	 */
120 	if (memsegs != NULL) {
121 		pp = first = page_first();
122 		do {
123 			if (page_isretired(pp) || page_istoxic(pp)) {
124 				/* pagezero asserts PAGE_LOCKED */
125 				pp->p_selock = -1;
126 				pagezero(pp, 0, PAGESIZE);
127 			}
128 		} while ((pp = page_next(pp)) != first);
129 	}
130 
131 	/*
132 	 * XXX - rconsvp is set to NULL to ensure that output messages
133 	 * are sent to the underlying "hardware" device using the
134 	 * monitor's printf routine since we are in the process of
135 	 * either rebooting or halting the machine.
136 	 */
137 	rconsvp = NULL;
138 
139 	/*
140 	 * At a high interrupt level we can't:
141 	 *	1) bring up the console
142 	 * or
143 	 *	2) wait for pending interrupts prior to redistribution
144 	 *	   to the current CPU
145 	 *
146 	 * so we do them now.
147 	 */
148 	pm_cfb_check_and_powerup();
149 
150 	/* make sure there are no more changes to the device tree */
151 	devtree_freeze();
152 
153 	if (invoke_cb)
154 		(void) callb_execute_class(CB_CL_MDBOOT, NULL);
155 
156 	/*
157 	 * stop other cpus which also raise our priority. since there is only
158 	 * one active cpu after this, and our priority will be too high
159 	 * for us to be preempted, we're essentially single threaded
160 	 * from here on out.
161 	 */
162 	stop_other_cpus();
163 
164 	/*
165 	 * try and reset leaf devices.  reset_leaves() should only
166 	 * be called when there are no other threads that could be
167 	 * accessing devices
168 	 */
169 	reset_leaves();
170 
171 	if (fcn == AD_HALT) {
172 		halt((char *)NULL);
173 	} else if (fcn == AD_POWEROFF) {
174 		power_down(NULL);
175 	} else {
176 		if (bootstr == NULL) {
177 			switch (fcn) {
178 
179 			case AD_BOOT:
180 				bootstr = "";
181 				break;
182 
183 			case AD_IBOOT:
184 				bootstr = "-a";
185 				break;
186 
187 			case AD_SBOOT:
188 				bootstr = "-s";
189 				break;
190 
191 			case AD_SIBOOT:
192 				bootstr = "-sa";
193 				break;
194 			default:
195 				cmn_err(CE_WARN,
196 				    "mdboot: invalid function %d", fcn);
197 				bootstr = "";
198 				break;
199 			}
200 		}
201 		reboot_machine(bootstr);
202 	}
203 	/* MAYBE REACHED */
204 }
205 
206 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
207 /*ARGSUSED*/
208 void
209 mdpreboot(int cmd, int fcn, char *bootstr)
210 {
211 }
212 
213 /*
214  * Halt the machine and then reboot with the device
215  * and arguments specified in bootstr.
216  */
217 static void
218 reboot_machine(char *bootstr)
219 {
220 	flush_windows();
221 	stop_other_cpus();		/* send stop signal to other CPUs */
222 	prom_printf("rebooting...\n");
223 	/*
224 	 * For platforms that use CPU signatures, we
225 	 * need to set the signature block to OS and
226 	 * the state to exiting for all the processors.
227 	 */
228 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
229 	prom_reboot(bootstr);
230 	/*NOTREACHED*/
231 }
232 
233 /*
234  * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
235  * Once in panic_idle() they raise spl, record their location, and spin.
236  */
237 static void
238 panic_idle(void)
239 {
240 	(void) spl7();
241 
242 	debug_flush_windows();
243 	(void) setjmp(&curthread->t_pcb);
244 
245 	CPU->cpu_m.in_prom = 1;
246 	membar_stld();
247 
248 	for (;;);
249 }
250 
251 /*
252  * Force the other CPUs to trap into panic_idle(), and then remove them
253  * from the cpu_ready_set so they will no longer receive cross-calls.
254  */
255 /*ARGSUSED*/
256 void
257 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
258 {
259 	cpuset_t cps;
260 	int i;
261 
262 	(void) splzs();
263 	CPUSET_ALL_BUT(cps, cp->cpu_id);
264 	xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
265 
266 	for (i = 0; i < NCPU; i++) {
267 		if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
268 			int ntries = 0x10000;
269 
270 			while (!cpu[i]->cpu_m.in_prom && ntries) {
271 				DELAY(50);
272 				ntries--;
273 			}
274 
275 			if (!cpu[i]->cpu_m.in_prom)
276 				printf("panic: failed to stop cpu%d\n", i);
277 
278 			cpu[i]->cpu_flags &= ~CPU_READY;
279 			cpu[i]->cpu_flags |= CPU_QUIESCED;
280 			CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
281 		}
282 	}
283 }
284 
285 /*
286  * Platform callback following each entry to panicsys().  If we've panicked at
287  * level 14, we examine t_panic_trap to see if a fatal trap occurred.  If so,
288  * we disable further %tick_cmpr interrupts.  If not, an explicit call to panic
289  * was made and so we re-enqueue an interrupt request structure to allow
290  * further level 14 interrupts to be processed once we lower PIL.  This allows
291  * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
292  */
293 void
294 panic_enter_hw(int spl)
295 {
296 #ifdef TRAPTRACE
297 	if (!panic_tick) {
298 		uint64_t prev_freeze;
299 
300 		panic_tick = gettick();
301 		/*  there are no possible error codes for this hcall */
302 		(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
303 			&prev_freeze);
304 		TRAPTRACE_FREEZE;
305 	}
306 #endif
307 
308 	if (spl == ipltospl(PIL_14)) {
309 		uint_t opstate = disable_vec_intr();
310 
311 		if (curthread->t_panic_trap != NULL) {
312 			tickcmpr_disable();
313 			intr_dequeue_req(PIL_14, cbe_level14_inum);
314 		} else {
315 			if (!tickcmpr_disabled())
316 				intr_enqueue_req(PIL_14, cbe_level14_inum);
317 			/*
318 			 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
319 			 * and SOFTINT<16> (STICK_INT) to indicate
320 			 * that the current level 14 has been serviced.
321 			 */
322 			wr_clr_softint((1 << PIL_14) |
323 				TICK_INT_MASK | STICK_INT_MASK);
324 		}
325 
326 		enable_vec_intr(opstate);
327 	}
328 }
329 
330 /*
331  * Miscellaneous hardware-specific code to execute after panicstr is set
332  * by the panic code: we also print and record PTL1 panic information here.
333  */
334 /*ARGSUSED*/
335 void
336 panic_quiesce_hw(panic_data_t *pdp)
337 {
338 	extern uint_t getpstate(void);
339 	extern void setpstate(uint_t);
340 
341 #ifdef TRAPTRACE
342 	uint64_t prev_freeze;
343 	/*
344 	 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
345 	 */
346 	if (!panic_tick)
347 		panic_tick = gettick();
348 	/*  there are no possible error codes for this hcall */
349 	(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL, &prev_freeze);
350 	TRAPTRACE_FREEZE;
351 #endif
352 	/*
353 	 * For Platforms that use CPU signatures, we
354 	 * need to set the signature block to OS, the state to
355 	 * exiting, and the substate to panic for all the processors.
356 	 */
357 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
358 
359 	update_hvdump_buffer();
360 
361 	/*
362 	 * Disable further ECC errors from the bus nexus.
363 	 */
364 	(void) bus_func_invoke(BF_TYPE_ERRDIS);
365 
366 	/*
367 	 * Redirect all interrupts to the current CPU.
368 	 */
369 	intr_redist_all_cpus_shutdown();
370 
371 	/*
372 	 * This call exists solely to support dumps to network
373 	 * devices after sync from OBP.
374 	 *
375 	 * If we came here via the sync callback, then on some
376 	 * platforms, interrupts may have arrived while we were
377 	 * stopped in OBP.  OBP will arrange for those interrupts to
378 	 * be redelivered if you say "go", but not if you invoke a
379 	 * client callback like 'sync'.	 For some dump devices
380 	 * (network swap devices), we need interrupts to be
381 	 * delivered in order to dump, so we have to call the bus
382 	 * nexus driver to reset the interrupt state machines.
383 	 */
384 	(void) bus_func_invoke(BF_TYPE_RESINTR);
385 
386 	setpstate(getpstate() | PSTATE_IE);
387 }
388 
389 /*
390  * Platforms that use CPU signatures need to set the signature block to OS and
391  * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
392  * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
393  * reboot the machine if the dump never completes.
394  */
395 /*ARGSUSED*/
396 void
397 panic_dump_hw(int spl)
398 {
399 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
400 }
401 
402 /*
403  * for ptl1_panic
404  */
405 void
406 ptl1_init_cpu(struct cpu *cpu)
407 {
408 	ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
409 
410 	/*CONSTCOND*/
411 	if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
412 		panic("ptl1_init_cpu: not enough space left for ptl1_panic "
413 		    "stack, sizeof (struct cpu) = %d", sizeof (struct cpu));
414 	}
415 
416 	pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
417 	cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
418 }
419 
420 void
421 ptl1_panic_handler(ptl1_state_t *pstate)
422 {
423 	static const char *ptl1_reasons[] = {
424 #ifdef	PTL1_PANIC_DEBUG
425 		"trap for debug purpose",	/* PTL1_BAD_DEBUG */
426 #else
427 		"unknown trap",			/* PTL1_BAD_DEBUG */
428 #endif
429 		"register window trap",		/* PTL1_BAD_WTRAP */
430 		"kernel MMU miss",		/* PTL1_BAD_KMISS */
431 		"kernel protection fault",	/* PTL1_BAD_KPROT_FAULT */
432 		"ISM MMU miss",			/* PTL1_BAD_ISM */
433 		"kernel MMU trap",		/* PTL1_BAD_MMUTRAP */
434 		"kernel trap handler state",	/* PTL1_BAD_TRAP */
435 		"floating point trap",		/* PTL1_BAD_FPTRAP */
436 #ifdef	DEBUG
437 		"pointer to intr_req",		/* PTL1_BAD_INTR_REQ */
438 #else
439 		"unknown trap",			/* PTL1_BAD_INTR_REQ */
440 #endif
441 #ifdef	TRAPTRACE
442 		"TRACE_PTR state",		/* PTL1_BAD_TRACE_PTR */
443 #else
444 		"unknown trap",			/* PTL1_BAD_TRACE_PTR */
445 #endif
446 		"stack overflow",		/* PTL1_BAD_STACK */
447 		"DTrace flags",			/* PTL1_BAD_DTRACE_FLAGS */
448 		"attempt to steal locked ctx",  /* PTL1_BAD_CTX_STEAL */
449 		"CPU ECC error loop",		/* PTL1_BAD_ECC */
450 		"unexpected error from hypervisor call", /* PTL1_BAD_HCALL */
451 		"unexpected global level(%gl)", /* PTL1_BAD_GL */
452 	};
453 
454 	uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1;
455 	uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
456 	struct trap_info ti = { 0 };
457 
458 	/*
459 	 * Use trap_info for a place holder to call panic_savetrap() and
460 	 * panic_showtrap() to save and print out ptl1_panic information.
461 	 */
462 	if (curthread->t_panic_trap == NULL)
463 		curthread->t_panic_trap = &ti;
464 
465 	if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
466 		panic("bad %s at TL %u", ptl1_reasons[reason], tl);
467 	else
468 		panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
469 }
470 
471 void
472 clear_watchdog_on_exit(void)
473 {
474 }
475 
476 void
477 clear_watchdog_timer(void)
478 {
479 }
480 
481 int
482 kdi_watchdog_disable(void)
483 {
484 	return (0);	/* sun4v has no watchdog */
485 }
486 
487 void
488 kdi_watchdog_restore(void)
489 {
490 	/* nothing to do -- no watchdog to re-enable */
491 }
492 
493 void
494 mach_dump_buffer_init(void)
495 {
496 	uint64_t  ret, minsize = 0;
497 
498 	if (hvdump_buf_sz > HVDUMP_SIZE_MAX)
499 		hvdump_buf_sz = HVDUMP_SIZE_MAX;
500 
501 	hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE);
502 	if (hvdump_buf_va == NULL)
503 		return;
504 
505 	hvdump_buf_pa = va_to_pa(hvdump_buf_va);
506 
507 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
508 	    &minsize);
509 
510 	if (ret != H_EOK) {
511 		contig_mem_free(hvdump_buf_va, hvdump_buf_sz);
512 		hvdump_buf_va = NULL;
513 		cmn_err(CE_NOTE, "!Error in setting up hvstate"
514 		    "dump buffer. Error = 0x%lx, size = 0x%lx,"
515 		    "buf_pa = 0x%lx", ret, hvdump_buf_sz,
516 		    hvdump_buf_pa);
517 
518 		if (ret == H_EINVAL) {
519 			cmn_err(CE_NOTE, "!Buffer size too small."
520 			    "Available buffer size = 0x%lx,"
521 			    "Minimum buffer size required = 0x%lx",
522 			    hvdump_buf_sz, minsize);
523 		}
524 	}
525 }
526 
527 
528 static void
529 update_hvdump_buffer(void)
530 {
531 	uint64_t ret, dummy_val;
532 
533 	if (hvdump_buf_va == NULL)
534 		return;
535 
536 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
537 	    &dummy_val);
538 	if (ret != H_EOK) {
539 		cmn_err(CE_NOTE, "!Cannot update hvstate dump"
540 		    "buffer. Error = 0x%lx", ret);
541 	}
542 }
543 
544 
545 static int
546 getintprop(dnode_t node, char *name, int deflt)
547 {
548 	int	value;
549 
550 	switch (prom_getproplen(node, name)) {
551 	case 0:
552 		value = 1;	/* boolean properties */
553 		break;
554 
555 	case sizeof (int):
556 		(void) prom_getprop(node, name, (caddr_t)&value);
557 		break;
558 
559 	default:
560 		value = deflt;
561 		break;
562 	}
563 
564 	return (value);
565 }
566 
567 /*
568  * Called by setcpudelay
569  */
570 void
571 cpu_init_tick_freq(void)
572 {
573 	sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq;
574 }
575 
576 int shipit(int n, uint64_t cpu_list_ra);
577 extern uint64_t xc_tick_limit;
578 extern uint64_t xc_tick_jump_limit;
579 
580 #ifdef DEBUG
581 #define	SEND_MONDO_STATS	1
582 #endif
583 
584 #ifdef SEND_MONDO_STATS
585 uint32_t x_one_stimes[64];
586 uint32_t x_one_ltimes[16];
587 uint32_t x_set_stimes[64];
588 uint32_t x_set_ltimes[16];
589 uint32_t x_set_cpus[NCPU];
590 #endif
591 
592 void
593 send_one_mondo(int cpuid)
594 {
595 	int retries, stat;
596 	uint64_t starttick, endtick, tick, lasttick;
597 	struct machcpu	*mcpup = &(CPU->cpu_m);
598 
599 	CPU_STATS_ADDQ(CPU, sys, xcalls, 1);
600 	starttick = lasttick = gettick();
601 	mcpup->cpu_list[0] = (uint16_t)cpuid;
602 	stat = shipit(1, mcpup->cpu_list_ra);
603 	endtick = starttick + xc_tick_limit;
604 	retries = 0;
605 	while (stat != 0) {
606 		ASSERT(stat == H_EWOULDBLOCK);
607 		tick = gettick();
608 		/*
609 		 * If there is a big jump between the current tick
610 		 * count and lasttick, we have probably hit a break
611 		 * point.  Adjust endtick accordingly to avoid panic.
612 		 */
613 		if (tick > (lasttick + xc_tick_jump_limit))
614 			endtick += (tick - lasttick);
615 		lasttick = tick;
616 		if (tick > endtick) {
617 			if (panic_quiesce)
618 				return;
619 			cmn_err(CE_PANIC, "send mondo timeout "
620 			    "(target 0x%x) [retries: 0x%x hvstat: 0x%x]",
621 			    cpuid, retries, stat);
622 		}
623 		drv_usecwait(1);
624 		stat = shipit(1, mcpup->cpu_list_ra);
625 		retries++;
626 	}
627 #ifdef SEND_MONDO_STATS
628 	{
629 		int n = gettick() - starttick;
630 		if (n < 8192)
631 			x_one_stimes[n >> 7]++;
632 		else if (n < 16*8192)
633 			x_one_ltimes[(n >> 13) & 0xf]++;
634 		else
635 			x_one_ltimes[0xf]++;
636 	}
637 #endif
638 }
639 
640 void
641 send_mondo_set(cpuset_t set)
642 {
643 	uint64_t starttick, endtick, tick, lasttick;
644 	int i, retries, stat, fcpuid, lcpuid;
645 	int ncpuids = 0;
646 	int shipped = 0;
647 	struct machcpu	*mcpup = &(CPU->cpu_m);
648 
649 	ASSERT(!CPUSET_ISNULL(set));
650 	starttick = lasttick = gettick();
651 	endtick = starttick + xc_tick_limit;
652 
653 	fcpuid = -1;
654 	for (i = 0; i < NCPU; i++) {
655 		if (CPU_IN_SET(set, i)) {
656 			ncpuids++;
657 			mcpup->cpu_list[0] = (uint16_t)i;
658 			stat = shipit(1, mcpup->cpu_list_ra);
659 			if (stat != 0) {
660 				ASSERT(stat == H_EWOULDBLOCK);
661 				if (fcpuid < 0)
662 					fcpuid = i;
663 				lcpuid = i;
664 				continue;
665 			}
666 			shipped++;
667 			CPUSET_DEL(set, i);
668 			if (CPUSET_ISNULL(set))
669 				break;
670 		}
671 	}
672 
673 	retries = 0;
674 	while (shipped < ncpuids) {
675 		ASSERT(fcpuid >= 0 && fcpuid <= lcpuid && lcpuid < NCPU);
676 		tick = gettick();
677 		/*
678 		 * If there is a big jump between the current tick
679 		 * count and lasttick, we have probably hit a break
680 		 * point.  Adjust endtick accordingly to avoid panic.
681 		 */
682 		if (tick > (lasttick + xc_tick_jump_limit))
683 			endtick += (tick - lasttick);
684 		lasttick = tick;
685 		if (tick > endtick) {
686 			if (panic_quiesce)
687 				return;
688 			cmn_err(CE_CONT, "send mondo timeout "
689 			    "[retries: 0x%x]  cpuids: ", retries);
690 			for (i = fcpuid; i <= lcpuid; i++) {
691 				if (CPU_IN_SET(set, i))
692 					cmn_err(CE_CONT, " 0x%x", i);
693 			}
694 			cmn_err(CE_CONT, "\n");
695 			cmn_err(CE_PANIC, "send_mondo_set: timeout");
696 		}
697 
698 		/* adjust fcpuid to the first CPU in set */
699 		for (; fcpuid <= lcpuid; fcpuid++)
700 			if (CPU_IN_SET(set, fcpuid))
701 				break;
702 
703 		/* adjust lcpuid to the last CPU in set */
704 		for (; lcpuid >= fcpuid; lcpuid--)
705 			if (CPU_IN_SET(set, lcpuid))
706 				break;
707 
708 		/* resend undelivered mondo */
709 		for (i = fcpuid; i <= lcpuid; i++) {
710 			if (CPU_IN_SET(set, i)) {
711 				mcpup->cpu_list[0] = (uint16_t)i;
712 				stat = shipit(1, mcpup->cpu_list_ra);
713 				if (stat != 0) {
714 					ASSERT(stat == H_EWOULDBLOCK);
715 					continue;
716 				}
717 				shipped++;
718 				CPUSET_DEL(set, i);
719 				if (shipped == ncpuids)
720 					break;
721 			}
722 		}
723 		if (shipped == ncpuids)
724 			break;
725 
726 		while (gettick() < (tick + sys_clock_mhz))
727 			;
728 		retries++;
729 	}
730 
731 #ifdef SEND_MONDO_STATS
732 	{
733 		int n = gettick() - starttick;
734 		if (n < 8192)
735 			x_set_stimes[n >> 7]++;
736 		else if (n < 16*8192)
737 			x_set_ltimes[(n >> 13) & 0xf]++;
738 		else
739 			x_set_ltimes[0xf]++;
740 	}
741 	x_set_cpus[shipped]++;
742 #endif
743 }
744 
745 void
746 syncfpu(void)
747 {
748 }
749 
750 void
751 cpu_flush_ecache(void)
752 {
753 }
754 
755 void
756 sticksync_slave(void)
757 {}
758 
759 void
760 sticksync_master(void)
761 {}
762 
763 void
764 cpu_init_cache_scrub(void)
765 {}
766 
767 int
768 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data)
769 {
770 	int ret, watched;
771 
772 	watched = watch_disable_addr((void *)addr, 4, S_WRITE);
773 	ret = dtrace_blksuword32(addr, data, 0);
774 	if (watched)
775 		watch_enable_addr((void *)addr, 4, S_WRITE);
776 
777 	return (ret);
778 }
779 
780 int
781 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain)
782 {
783 	if (suword32((void *)addr, *data) == -1)
784 		return (tryagain ? dtrace_blksuword32_err(addr, data) : -1);
785 	dtrace_flush_sec(addr);
786 
787 	return (0);
788 }
789 
790 /*ARGSUSED*/
791 void
792 cpu_faulted_enter(struct cpu *cp)
793 {
794 }
795 
796 /*ARGSUSED*/
797 void
798 cpu_faulted_exit(struct cpu *cp)
799 {
800 }
801 
802 static int
803 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg)
804 {
805 	int rc, i;
806 
807 	for (rc = 0, i = 0; i < NCPU; i++) {
808 		if (CPU_IN_SET(cpu_ready_set, i))
809 			rc += cb(i, arg);
810 	}
811 
812 	return (rc);
813 }
814 
815 /*
816  * Sends a cross-call to a specified processor.  The caller assumes
817  * responsibility for repetition of cross-calls, as appropriate (MARSA for
818  * debugging).
819  */
820 static int
821 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1,
822     uintptr_t arg2)
823 {
824 	int stat;
825 	struct machcpu	*mcpup;
826 	uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0;
827 
828 	mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m);
829 
830 	/*
831 	 * if (idsr_busy())
832 	 *	return (KDI_XC_RES_ERR);
833 	 */
834 
835 	init_mondo_nocheck((xcfunc_t *)func, arg1, arg2);
836 
837 	mcpup->cpu_list[0] = (uint16_t)cpuid;
838 	stat = shipit(1, mcpup->cpu_list_ra);
839 
840 	if (stat == 0)
841 		return (KDI_XC_RES_OK);
842 	else
843 		return (KDI_XC_RES_NACK);
844 }
845 
846 static void
847 kdi_tickwait(clock_t nticks)
848 {
849 	clock_t endtick = gettick() + nticks;
850 
851 	while (gettick() < endtick);
852 }
853 
854 static void
855 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size,
856     int icache_linesize)
857 {
858 	kdi_dcache_size = dcache_size;
859 	kdi_dcache_linesize = dcache_linesize;
860 	kdi_icache_size = icache_size;
861 	kdi_icache_linesize = icache_linesize;
862 }
863 
864 /* used directly by kdi_read/write_phys */
865 void
866 kdi_flush_caches(void)
867 {
868 	/* Not required on sun4v architecture. */
869 }
870 
871 /*ARGSUSED*/
872 int
873 kdi_get_stick(uint64_t *stickp)
874 {
875 	return (-1);
876 }
877 
878 void
879 cpu_kdi_init(kdi_t *kdi)
880 {
881 	kdi->kdi_flush_caches = kdi_flush_caches;
882 	kdi->mkdi_cpu_init = kdi_cpu_init;
883 	kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter;
884 	kdi->mkdi_xc_one = kdi_xc_one;
885 	kdi->mkdi_tickwait = kdi_tickwait;
886 	kdi->mkdi_get_stick = kdi_get_stick;
887 }
888 
889 /*
890  * Routine to return memory information associated
891  * with a physical address and syndrome.
892  */
893 /* ARGSUSED */
894 int
895 cpu_get_mem_info(uint64_t synd, uint64_t afar,
896     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
897     int *segsp, int *banksp, int *mcidp)
898 {
899 	return (ENOTSUP);
900 }
901 
902 /*
903  * This routine returns the size of the kernel's FRU name buffer.
904  */
905 size_t
906 cpu_get_name_bufsize()
907 {
908 	return (UNUM_NAMLEN);
909 }
910 
911 /*
912  * This routine is a more generic interface to cpu_get_mem_unum(),
913  * that may be used by other modules (e.g. mm).
914  */
915 /* ARGSUSED */
916 int
917 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
918     char *buf, int buflen, int *lenp)
919 {
920 	return (ENOTSUP);
921 }
922 
923 /*
924  * xt_sync - wait for previous x-traps to finish
925  */
926 void
927 xt_sync(cpuset_t cpuset)
928 {
929 	union {
930 		uint8_t volatile byte[NCPU];
931 		uint64_t volatile xword[NCPU / 8];
932 	} cpu_sync;
933 	uint64_t starttick, endtick, tick, lasttick;
934 	int i;
935 
936 	kpreempt_disable();
937 	CPUSET_DEL(cpuset, CPU->cpu_id);
938 	CPUSET_AND(cpuset, cpu_ready_set);
939 
940 	/*
941 	 * Sun4v uses a queue for receiving mondos. Successful
942 	 * transmission of a mondo only indicates that the mondo
943 	 * has been written into the queue.
944 	 *
945 	 * We use an array of bytes to let each cpu to signal back
946 	 * to the cross trap sender that the cross trap has been
947 	 * executed. Set the byte to 1 before sending the cross trap
948 	 * and wait until other cpus reset it to 0.
949 	 */
950 	bzero((void *)&cpu_sync, NCPU);
951 	for (i = 0; i < NCPU; i++)
952 		if (CPU_IN_SET(cpuset, i))
953 			cpu_sync.byte[i] = 1;
954 
955 	xt_some(cpuset, (xcfunc_t *)xt_sync_tl1,
956 	    (uint64_t)cpu_sync.byte, 0);
957 
958 	starttick = lasttick = gettick();
959 	endtick = starttick + xc_tick_limit;
960 
961 	for (i = 0; i < (NCPU / 8); i ++) {
962 		while (cpu_sync.xword[i] != 0) {
963 			tick = gettick();
964 			/*
965 			 * If there is a big jump between the current tick
966 			 * count and lasttick, we have probably hit a break
967 			 * point. Adjust endtick accordingly to avoid panic.
968 			 */
969 			if (tick > (lasttick + xc_tick_jump_limit)) {
970 				endtick += (tick - lasttick);
971 			}
972 			lasttick = tick;
973 			if (tick > endtick) {
974 				if (panic_quiesce)
975 					goto out;
976 				cmn_err(CE_CONT, "Cross trap sync timeout "
977 				    "at cpu_sync.xword[%d]: 0x%lx\n",
978 				    i, cpu_sync.xword[i]);
979 				cmn_err(CE_PANIC, "xt_sync: timeout");
980 			}
981 		}
982 	}
983 
984 out:
985 	kpreempt_enable();
986 }
987