xref: /illumos-gate/usr/src/uts/sun4v/os/mach_cpu_states.c (revision b24ab6762772a3f6a89393947930c7fa61306783)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #include <sys/types.h>
27 #include <sys/systm.h>
28 #include <sys/archsystm.h>
29 #include <sys/t_lock.h>
30 #include <sys/uadmin.h>
31 #include <sys/panic.h>
32 #include <sys/reboot.h>
33 #include <sys/autoconf.h>
34 #include <sys/machsystm.h>
35 #include <sys/promif.h>
36 #include <sys/membar.h>
37 #include <vm/hat_sfmmu.h>
38 #include <sys/cpu_module.h>
39 #include <sys/cpu_sgnblk_defs.h>
40 #include <sys/intreg.h>
41 #include <sys/consdev.h>
42 #include <sys/kdi_impl.h>
43 #include <sys/traptrace.h>
44 #include <sys/hypervisor_api.h>
45 #include <sys/vmsystm.h>
46 #include <sys/dtrace.h>
47 #include <sys/xc_impl.h>
48 #include <sys/callb.h>
49 #include <sys/mdesc.h>
50 #include <sys/mach_descrip.h>
51 #include <sys/wdt.h>
52 #include <sys/soft_state.h>
53 #include <sys/promimpl.h>
54 #include <sys/hsvc.h>
55 #include <sys/ldoms.h>
56 #include <sys/kldc.h>
57 #include <sys/dumphdr.h>
58 
59 /*
60  * hvdump_buf_va is a pointer to the currently-configured hvdump_buf.
61  * A value of NULL indicates that this area is not configured.
62  * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX.
63  */
64 
65 caddr_t hvdump_buf_va;
66 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT;
67 static uint64_t hvdump_buf_pa;
68 
69 u_longlong_t panic_tick;
70 
71 extern u_longlong_t gettick();
72 static void reboot_machine(char *);
73 static void update_hvdump_buffer(void);
74 
75 /*
76  * For xt_sync synchronization.
77  */
78 extern uint64_t xc_tick_limit;
79 extern uint64_t xc_tick_jump_limit;
80 extern uint64_t xc_sync_tick_limit;
81 
82 /*
83  * We keep our own copies, used for cache flushing, because we can be called
84  * before cpu_fiximpl().
85  */
86 static int kdi_dcache_size;
87 static int kdi_dcache_linesize;
88 static int kdi_icache_size;
89 static int kdi_icache_linesize;
90 
91 /*
92  * Assembly support for generic modules in sun4v/ml/mach_xc.s
93  */
94 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
95 extern void kdi_flush_idcache(int, int, int, int);
96 extern uint64_t get_cpuaddr(uint64_t, uint64_t);
97 
98 
99 #define	BOOT_CMD_MAX_LEN	256
100 #define	BOOT_CMD_BASE		"boot "
101 
102 /*
103  * In an LDoms system we do not save the user's boot args in NVRAM
104  * as is done on legacy systems.  Instead, we format and send a
105  * 'reboot-command' variable to the variable service.  The contents
106  * of the variable are retrieved by OBP and used verbatim for
107  * the next boot.
108  */
109 static void
110 store_boot_cmd(char *args, boolean_t add_boot_str)
111 {
112 	static char	cmd_buf[BOOT_CMD_MAX_LEN];
113 	size_t		len = 1;
114 	pnode_t		node;
115 	size_t		base_len = 0;
116 	size_t		args_len;
117 	size_t		args_max;
118 
119 	if (add_boot_str) {
120 		(void) strcpy(cmd_buf, BOOT_CMD_BASE);
121 
122 		base_len = strlen(BOOT_CMD_BASE);
123 		len = base_len + 1;
124 	}
125 
126 	if (args != NULL) {
127 		args_len = strlen(args);
128 		args_max = BOOT_CMD_MAX_LEN - len;
129 
130 		if (args_len > args_max) {
131 			cmn_err(CE_WARN, "Reboot command too long (%ld), "
132 			    "truncating command arguments", len + args_len);
133 
134 			args_len = args_max;
135 		}
136 
137 		len += args_len;
138 		(void) strncpy(&cmd_buf[base_len], args, args_len);
139 	}
140 
141 	node = prom_optionsnode();
142 	if ((node == OBP_NONODE) || (node == OBP_BADNODE) ||
143 	    prom_setprop(node, "reboot-command", cmd_buf, len) == -1)
144 		cmn_err(CE_WARN, "Unable to store boot command for "
145 		    "use on reboot");
146 }
147 
148 
149 /*
150  * Machine dependent code to reboot.
151  *
152  * "bootstr", when non-null, points to a string to be used as the
153  * argument string when rebooting.
154  *
155  * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
156  * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
157  * we are in a normal shutdown sequence (interrupts are not blocked, the
158  * system is not panic'ing or being suspended).
159  */
160 /*ARGSUSED*/
161 void
162 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
163 {
164 	extern void pm_cfb_check_and_powerup(void);
165 
166 	/*
167 	 * XXX - rconsvp is set to NULL to ensure that output messages
168 	 * are sent to the underlying "hardware" device using the
169 	 * monitor's printf routine since we are in the process of
170 	 * either rebooting or halting the machine.
171 	 */
172 	rconsvp = NULL;
173 
174 	switch (fcn) {
175 	case AD_HALT:
176 		/*
177 		 * LDoms: By storing a no-op command
178 		 * in the 'reboot-command' variable we cause OBP
179 		 * to ignore the setting of 'auto-boot?' after
180 		 * it completes the reset.  This causes the system
181 		 * to stop at the ok prompt.
182 		 */
183 		if (domaining_enabled() && invoke_cb)
184 			store_boot_cmd("noop", B_FALSE);
185 		break;
186 
187 	case AD_POWEROFF:
188 		break;
189 
190 	default:
191 		if (bootstr == NULL) {
192 			switch (fcn) {
193 
194 			case AD_BOOT:
195 				bootstr = "";
196 				break;
197 
198 			case AD_IBOOT:
199 				bootstr = "-a";
200 				break;
201 
202 			case AD_SBOOT:
203 				bootstr = "-s";
204 				break;
205 
206 			case AD_SIBOOT:
207 				bootstr = "-sa";
208 				break;
209 			default:
210 				cmn_err(CE_WARN,
211 				    "mdboot: invalid function %d", fcn);
212 				bootstr = "";
213 				break;
214 			}
215 		}
216 
217 		/*
218 		 * If LDoms is running, we must save the boot string
219 		 * before we enter restricted mode.  This is possible
220 		 * only if we are not being called from panic.
221 		 */
222 		if (domaining_enabled() && invoke_cb)
223 			store_boot_cmd(bootstr, B_TRUE);
224 	}
225 
226 	/*
227 	 * At a high interrupt level we can't:
228 	 *	1) bring up the console
229 	 * or
230 	 *	2) wait for pending interrupts prior to redistribution
231 	 *	   to the current CPU
232 	 *
233 	 * so we do them now.
234 	 */
235 	pm_cfb_check_and_powerup();
236 
237 	/* make sure there are no more changes to the device tree */
238 	devtree_freeze();
239 
240 	if (invoke_cb)
241 		(void) callb_execute_class(CB_CL_MDBOOT, NULL);
242 
243 	/*
244 	 * Clear any unresolved UEs from memory.
245 	 */
246 	page_retire_mdboot();
247 
248 	/*
249 	 * stop other cpus which also raise our priority. since there is only
250 	 * one active cpu after this, and our priority will be too high
251 	 * for us to be preempted, we're essentially single threaded
252 	 * from here on out.
253 	 */
254 	stop_other_cpus();
255 
256 	/*
257 	 * try and reset leaf devices.  reset_leaves() should only
258 	 * be called when there are no other threads that could be
259 	 * accessing devices
260 	 */
261 	reset_leaves();
262 
263 	watchdog_clear();
264 
265 	if (fcn == AD_HALT) {
266 		mach_set_soft_state(SIS_TRANSITION,
267 		    &SOLARIS_SOFT_STATE_HALT_MSG);
268 		halt((char *)NULL);
269 	} else if (fcn == AD_POWEROFF) {
270 		mach_set_soft_state(SIS_TRANSITION,
271 		    &SOLARIS_SOFT_STATE_POWER_MSG);
272 		power_down(NULL);
273 	} else {
274 		mach_set_soft_state(SIS_TRANSITION,
275 		    &SOLARIS_SOFT_STATE_REBOOT_MSG);
276 		reboot_machine(bootstr);
277 	}
278 	/* MAYBE REACHED */
279 }
280 
281 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
282 /*ARGSUSED*/
283 void
284 mdpreboot(int cmd, int fcn, char *bootstr)
285 {
286 }
287 
288 /*
289  * Halt the machine and then reboot with the device
290  * and arguments specified in bootstr.
291  */
292 static void
293 reboot_machine(char *bootstr)
294 {
295 	flush_windows();
296 	stop_other_cpus();		/* send stop signal to other CPUs */
297 	prom_printf("rebooting...\n");
298 	/*
299 	 * For platforms that use CPU signatures, we
300 	 * need to set the signature block to OS and
301 	 * the state to exiting for all the processors.
302 	 */
303 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
304 	prom_reboot(bootstr);
305 	/*NOTREACHED*/
306 }
307 
308 /*
309  * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
310  * Once in panic_idle() they raise spl, record their location, and spin.
311  */
312 static void
313 panic_idle(void)
314 {
315 	(void) spl7();
316 
317 	debug_flush_windows();
318 	(void) setjmp(&curthread->t_pcb);
319 
320 	CPU->cpu_m.in_prom = 1;
321 	membar_stld();
322 
323 	dumpsys_helper();
324 
325 	for (;;)
326 		;
327 }
328 
329 /*
330  * Force the other CPUs to trap into panic_idle(), and then remove them
331  * from the cpu_ready_set so they will no longer receive cross-calls.
332  */
333 /*ARGSUSED*/
334 void
335 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
336 {
337 	cpuset_t cps;
338 	int i;
339 
340 	(void) splzs();
341 	CPUSET_ALL_BUT(cps, cp->cpu_id);
342 	xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
343 
344 	for (i = 0; i < NCPU; i++) {
345 		if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
346 			int ntries = 0x10000;
347 
348 			while (!cpu[i]->cpu_m.in_prom && ntries) {
349 				DELAY(50);
350 				ntries--;
351 			}
352 
353 			if (!cpu[i]->cpu_m.in_prom)
354 				printf("panic: failed to stop cpu%d\n", i);
355 
356 			cpu[i]->cpu_flags &= ~CPU_READY;
357 			cpu[i]->cpu_flags |= CPU_QUIESCED;
358 			CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
359 		}
360 	}
361 }
362 
363 /*
364  * Platform callback following each entry to panicsys().  If we've panicked at
365  * level 14, we examine t_panic_trap to see if a fatal trap occurred.  If so,
366  * we disable further %tick_cmpr interrupts.  If not, an explicit call to panic
367  * was made and so we re-enqueue an interrupt request structure to allow
368  * further level 14 interrupts to be processed once we lower PIL.  This allows
369  * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
370  */
371 void
372 panic_enter_hw(int spl)
373 {
374 	if (!panic_tick) {
375 		panic_tick = gettick();
376 		if (mach_htraptrace_enable) {
377 			uint64_t prev_freeze;
378 
379 			/*  there are no possible error codes for this hcall */
380 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
381 			    &prev_freeze);
382 		}
383 #ifdef TRAPTRACE
384 		TRAPTRACE_FREEZE;
385 #endif
386 	}
387 
388 	mach_set_soft_state(SIS_TRANSITION, &SOLARIS_SOFT_STATE_PANIC_MSG);
389 
390 	if (spl == ipltospl(PIL_14)) {
391 		uint_t opstate = disable_vec_intr();
392 
393 		if (curthread->t_panic_trap != NULL) {
394 			tickcmpr_disable();
395 			intr_dequeue_req(PIL_14, cbe_level14_inum);
396 		} else {
397 			if (!tickcmpr_disabled())
398 				intr_enqueue_req(PIL_14, cbe_level14_inum);
399 			/*
400 			 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
401 			 * and SOFTINT<16> (STICK_INT) to indicate
402 			 * that the current level 14 has been serviced.
403 			 */
404 			wr_clr_softint((1 << PIL_14) |
405 			    TICK_INT_MASK | STICK_INT_MASK);
406 		}
407 
408 		enable_vec_intr(opstate);
409 	}
410 }
411 
412 /*
413  * Miscellaneous hardware-specific code to execute after panicstr is set
414  * by the panic code: we also print and record PTL1 panic information here.
415  */
416 /*ARGSUSED*/
417 void
418 panic_quiesce_hw(panic_data_t *pdp)
419 {
420 	extern uint_t getpstate(void);
421 	extern void setpstate(uint_t);
422 
423 	/*
424 	 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
425 	 */
426 	if (!panic_tick) {
427 		panic_tick = gettick();
428 		if (mach_htraptrace_enable) {
429 			uint64_t prev_freeze;
430 
431 			/*  there are no possible error codes for this hcall */
432 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
433 			    &prev_freeze);
434 		}
435 #ifdef TRAPTRACE
436 		TRAPTRACE_FREEZE;
437 #endif
438 	}
439 	/*
440 	 * For Platforms that use CPU signatures, we
441 	 * need to set the signature block to OS, the state to
442 	 * exiting, and the substate to panic for all the processors.
443 	 */
444 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
445 
446 	update_hvdump_buffer();
447 
448 	/*
449 	 * Disable further ECC errors from the bus nexus.
450 	 */
451 	(void) bus_func_invoke(BF_TYPE_ERRDIS);
452 
453 	/*
454 	 * Redirect all interrupts to the current CPU.
455 	 */
456 	intr_redist_all_cpus_shutdown();
457 
458 	/*
459 	 * This call exists solely to support dumps to network
460 	 * devices after sync from OBP.
461 	 *
462 	 * If we came here via the sync callback, then on some
463 	 * platforms, interrupts may have arrived while we were
464 	 * stopped in OBP.  OBP will arrange for those interrupts to
465 	 * be redelivered if you say "go", but not if you invoke a
466 	 * client callback like 'sync'.	 For some dump devices
467 	 * (network swap devices), we need interrupts to be
468 	 * delivered in order to dump, so we have to call the bus
469 	 * nexus driver to reset the interrupt state machines.
470 	 */
471 	(void) bus_func_invoke(BF_TYPE_RESINTR);
472 
473 	setpstate(getpstate() | PSTATE_IE);
474 }
475 
476 /*
477  * Platforms that use CPU signatures need to set the signature block to OS and
478  * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
479  * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
480  * reboot the machine if the dump never completes.
481  */
482 /*ARGSUSED*/
483 void
484 panic_dump_hw(int spl)
485 {
486 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
487 }
488 
489 /*
490  * for ptl1_panic
491  */
492 void
493 ptl1_init_cpu(struct cpu *cpu)
494 {
495 	ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
496 
497 	/*CONSTCOND*/
498 	if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
499 		panic("ptl1_init_cpu: not enough space left for ptl1_panic "
500 		    "stack, sizeof (struct cpu) = %lu",
501 		    (unsigned long)sizeof (struct cpu));
502 	}
503 
504 	pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
505 	cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
506 }
507 
508 void
509 ptl1_panic_handler(ptl1_state_t *pstate)
510 {
511 	static const char *ptl1_reasons[] = {
512 #ifdef	PTL1_PANIC_DEBUG
513 		"trap for debug purpose",	/* PTL1_BAD_DEBUG */
514 #else
515 		"unknown trap",			/* PTL1_BAD_DEBUG */
516 #endif
517 		"register window trap",		/* PTL1_BAD_WTRAP */
518 		"kernel MMU miss",		/* PTL1_BAD_KMISS */
519 		"kernel protection fault",	/* PTL1_BAD_KPROT_FAULT */
520 		"ISM MMU miss",			/* PTL1_BAD_ISM */
521 		"kernel MMU trap",		/* PTL1_BAD_MMUTRAP */
522 		"kernel trap handler state",	/* PTL1_BAD_TRAP */
523 		"floating point trap",		/* PTL1_BAD_FPTRAP */
524 #ifdef	DEBUG
525 		"pointer to intr_vec",		/* PTL1_BAD_INTR_VEC */
526 #else
527 		"unknown trap",			/* PTL1_BAD_INTR_VEC */
528 #endif
529 #ifdef	TRAPTRACE
530 		"TRACE_PTR state",		/* PTL1_BAD_TRACE_PTR */
531 #else
532 		"unknown trap",			/* PTL1_BAD_TRACE_PTR */
533 #endif
534 		"stack overflow",		/* PTL1_BAD_STACK */
535 		"DTrace flags",			/* PTL1_BAD_DTRACE_FLAGS */
536 		"attempt to steal locked ctx",  /* PTL1_BAD_CTX_STEAL */
537 		"CPU ECC error loop",		/* PTL1_BAD_ECC */
538 		"unexpected error from hypervisor call", /* PTL1_BAD_HCALL */
539 		"unexpected global level(%gl)", /* PTL1_BAD_GL */
540 		"Watchdog Reset", 		/* PTL1_BAD_WATCHDOG */
541 		"unexpected RED mode trap", 	/* PTL1_BAD_RED */
542 		"return value EINVAL from hcall: "\
543 		    "UNMAP_PERM_ADDR",	/* PTL1_BAD_HCALL_UNMAP_PERM_EINVAL */
544 		"return value ENOMAP from hcall: "\
545 		    "UNMAP_PERM_ADDR", /* PTL1_BAD_HCALL_UNMAP_PERM_ENOMAP */
546 		"error raising a TSB exception", /* PTL1_BAD_RAISE_TSBEXCP */
547 		"missing shared TSB"	/* PTL1_NO_SCDTSB8K */
548 	};
549 
550 	uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1;
551 	uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
552 	struct panic_trap_info ti = { 0 };
553 
554 	/*
555 	 * Use trap_info for a place holder to call panic_savetrap() and
556 	 * panic_showtrap() to save and print out ptl1_panic information.
557 	 */
558 	if (curthread->t_panic_trap == NULL)
559 		curthread->t_panic_trap = &ti;
560 
561 	if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
562 		panic("bad %s at TL %u", ptl1_reasons[reason], tl);
563 	else
564 		panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
565 }
566 
567 void
568 clear_watchdog_on_exit(void)
569 {
570 	if (watchdog_enabled && watchdog_activated) {
571 		prom_printf("Debugging requested; hardware watchdog "
572 		    "suspended.\n");
573 		(void) watchdog_suspend();
574 	}
575 }
576 
577 /*
578  * Restore the watchdog timer when returning from a debugger
579  * after a panic or L1-A and resume watchdog pat.
580  */
581 void
582 restore_watchdog_on_entry()
583 {
584 	watchdog_resume();
585 }
586 
587 int
588 kdi_watchdog_disable(void)
589 {
590 	watchdog_suspend();
591 
592 	return (0);
593 }
594 
595 void
596 kdi_watchdog_restore(void)
597 {
598 	watchdog_resume();
599 }
600 
601 void
602 mach_dump_buffer_init(void)
603 {
604 	uint64_t  ret, minsize = 0;
605 
606 	if (hvdump_buf_sz > HVDUMP_SIZE_MAX)
607 		hvdump_buf_sz = HVDUMP_SIZE_MAX;
608 
609 	hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE);
610 	if (hvdump_buf_va == NULL)
611 		return;
612 
613 	hvdump_buf_pa = va_to_pa(hvdump_buf_va);
614 
615 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
616 	    &minsize);
617 
618 	if (ret != H_EOK) {
619 		contig_mem_free(hvdump_buf_va, hvdump_buf_sz);
620 		hvdump_buf_va = NULL;
621 		cmn_err(CE_NOTE, "!Error in setting up hvstate"
622 		    "dump buffer. Error = 0x%lx, size = 0x%lx,"
623 		    "buf_pa = 0x%lx", ret, hvdump_buf_sz,
624 		    hvdump_buf_pa);
625 
626 		if (ret == H_EINVAL) {
627 			cmn_err(CE_NOTE, "!Buffer size too small."
628 			    "Available buffer size = 0x%lx,"
629 			    "Minimum buffer size required = 0x%lx",
630 			    hvdump_buf_sz, minsize);
631 		}
632 	}
633 }
634 
635 
636 static void
637 update_hvdump_buffer(void)
638 {
639 	uint64_t ret, dummy_val;
640 
641 	if (hvdump_buf_va == NULL)
642 		return;
643 
644 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
645 	    &dummy_val);
646 	if (ret != H_EOK) {
647 		cmn_err(CE_NOTE, "!Cannot update hvstate dump"
648 		    "buffer. Error = 0x%lx", ret);
649 	}
650 }
651 
652 
653 static int
654 getintprop(pnode_t node, char *name, int deflt)
655 {
656 	int	value;
657 
658 	switch (prom_getproplen(node, name)) {
659 	case 0:
660 		value = 1;	/* boolean properties */
661 		break;
662 
663 	case sizeof (int):
664 		(void) prom_getprop(node, name, (caddr_t)&value);
665 		break;
666 
667 	default:
668 		value = deflt;
669 		break;
670 	}
671 
672 	return (value);
673 }
674 
675 /*
676  * Called by setcpudelay
677  */
678 void
679 cpu_init_tick_freq(void)
680 {
681 	md_t *mdp;
682 	mde_cookie_t rootnode;
683 	int		listsz;
684 	mde_cookie_t	*listp = NULL;
685 	int	num_nodes;
686 	uint64_t stick_prop;
687 
688 	if (broken_md_flag) {
689 		sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq;
690 		return;
691 	}
692 
693 	if ((mdp = md_get_handle()) == NULL)
694 		panic("stick_frequency property not found in MD");
695 
696 	rootnode = md_root_node(mdp);
697 	ASSERT(rootnode != MDE_INVAL_ELEM_COOKIE);
698 
699 	num_nodes = md_node_count(mdp);
700 
701 	ASSERT(num_nodes > 0);
702 	listsz = num_nodes * sizeof (mde_cookie_t);
703 	listp = (mde_cookie_t *)prom_alloc((caddr_t)0, listsz, 0);
704 
705 	if (listp == NULL)
706 		panic("cannot allocate list for MD properties");
707 
708 	num_nodes = md_scan_dag(mdp, rootnode, md_find_name(mdp, "platform"),
709 	    md_find_name(mdp, "fwd"), listp);
710 
711 	ASSERT(num_nodes == 1);
712 
713 	if (md_get_prop_val(mdp, *listp, "stick-frequency", &stick_prop) != 0)
714 		panic("stick_frequency property not found in MD");
715 
716 	sys_tick_freq = stick_prop;
717 
718 	prom_free((caddr_t)listp, listsz);
719 	(void) md_fini_handle(mdp);
720 }
721 
722 int shipit(int n, uint64_t cpu_list_ra);
723 
724 #ifdef DEBUG
725 #define	SEND_MONDO_STATS	1
726 #endif
727 
728 #ifdef SEND_MONDO_STATS
729 uint32_t x_one_stimes[64];
730 uint32_t x_one_ltimes[16];
731 uint32_t x_set_stimes[64];
732 uint32_t x_set_ltimes[16];
733 uint32_t x_set_cpus[NCPU];
734 #endif
735 
736 void
737 send_one_mondo(int cpuid)
738 {
739 	int retries, stat;
740 	uint64_t starttick, endtick, tick, lasttick;
741 	struct machcpu	*mcpup = &(CPU->cpu_m);
742 
743 	CPU_STATS_ADDQ(CPU, sys, xcalls, 1);
744 	starttick = lasttick = gettick();
745 	mcpup->cpu_list[0] = (uint16_t)cpuid;
746 	stat = shipit(1, mcpup->cpu_list_ra);
747 	endtick = starttick + xc_tick_limit;
748 	retries = 0;
749 	while (stat != H_EOK) {
750 		if (stat != H_EWOULDBLOCK) {
751 			if (panic_quiesce)
752 				return;
753 			if (stat == H_ECPUERROR)
754 				cmn_err(CE_PANIC, "send_one_mondo: "
755 				    "cpuid: 0x%x has been marked in "
756 				    "error", cpuid);
757 			else
758 				cmn_err(CE_PANIC, "send_one_mondo: "
759 				    "unexpected hypervisor error 0x%x "
760 				    "while sending a mondo to cpuid: "
761 				    "0x%x", stat, cpuid);
762 		}
763 		tick = gettick();
764 		/*
765 		 * If there is a big jump between the current tick
766 		 * count and lasttick, we have probably hit a break
767 		 * point.  Adjust endtick accordingly to avoid panic.
768 		 */
769 		if (tick > (lasttick + xc_tick_jump_limit))
770 			endtick += (tick - lasttick);
771 		lasttick = tick;
772 		if (tick > endtick) {
773 			if (panic_quiesce)
774 				return;
775 			cmn_err(CE_PANIC, "send mondo timeout "
776 			    "(target 0x%x) [retries: 0x%x hvstat: 0x%x]",
777 			    cpuid, retries, stat);
778 		}
779 		drv_usecwait(1);
780 		stat = shipit(1, mcpup->cpu_list_ra);
781 		retries++;
782 	}
783 #ifdef SEND_MONDO_STATS
784 	{
785 		uint64_t n = gettick() - starttick;
786 		if (n < 8192)
787 			x_one_stimes[n >> 7]++;
788 		else if (n < 15*8192)
789 			x_one_ltimes[n >> 13]++;
790 		else
791 			x_one_ltimes[0xf]++;
792 	}
793 #endif
794 }
795 
796 void
797 send_mondo_set(cpuset_t set)
798 {
799 	uint64_t starttick, endtick, tick, lasttick;
800 	uint_t largestid, smallestid;
801 	int i, j;
802 	int ncpuids = 0;
803 	int shipped = 0;
804 	int retries = 0;
805 	struct machcpu	*mcpup = &(CPU->cpu_m);
806 
807 	ASSERT(!CPUSET_ISNULL(set));
808 	CPUSET_BOUNDS(set, smallestid, largestid);
809 	if (smallestid == CPUSET_NOTINSET) {
810 		return;
811 	}
812 
813 	starttick = lasttick = gettick();
814 	endtick = starttick + xc_tick_limit;
815 
816 	/*
817 	 * Assemble CPU list for HV argument. We already know
818 	 * smallestid and largestid are members of set.
819 	 */
820 	mcpup->cpu_list[ncpuids++] = (uint16_t)smallestid;
821 	if (largestid != smallestid) {
822 		for (i = smallestid+1; i <= largestid-1; i++) {
823 			if (CPU_IN_SET(set, i)) {
824 				mcpup->cpu_list[ncpuids++] = (uint16_t)i;
825 			}
826 		}
827 		mcpup->cpu_list[ncpuids++] = (uint16_t)largestid;
828 	}
829 
830 	do {
831 		int stat;
832 
833 		stat = shipit(ncpuids, mcpup->cpu_list_ra);
834 		if (stat == H_EOK) {
835 			shipped += ncpuids;
836 			break;
837 		}
838 
839 		/*
840 		 * Either not all CPU mondos were sent, or an
841 		 * error occurred. CPUs that were sent mondos
842 		 * have their CPU IDs overwritten in cpu_list.
843 		 * Reset cpu_list so that it only holds those
844 		 * CPU IDs that still need to be sent.
845 		 */
846 		for (i = 0, j = 0; i < ncpuids; i++) {
847 			if (mcpup->cpu_list[i] == HV_SEND_MONDO_ENTRYDONE) {
848 				shipped++;
849 			} else {
850 				mcpup->cpu_list[j++] = mcpup->cpu_list[i];
851 			}
852 		}
853 		ncpuids = j;
854 
855 		/*
856 		 * Now handle possible errors returned
857 		 * from hypervisor.
858 		 */
859 		if (stat == H_ECPUERROR) {
860 			int errorcpus;
861 
862 			if (!panic_quiesce)
863 				cmn_err(CE_CONT, "send_mondo_set: cpuid(s) ");
864 
865 			/*
866 			 * Remove any CPUs in the error state from
867 			 * cpu_list. At this point cpu_list only
868 			 * contains the CPU IDs for mondos not
869 			 * succesfully sent.
870 			 */
871 			for (i = 0, errorcpus = 0; i < ncpuids; i++) {
872 				uint64_t state = CPU_STATE_INVALID;
873 				uint16_t id = mcpup->cpu_list[i];
874 
875 				(void) hv_cpu_state(id, &state);
876 				if (state == CPU_STATE_ERROR) {
877 					if (!panic_quiesce)
878 						cmn_err(CE_CONT, "0x%x ", id);
879 					errorcpus++;
880 				} else if (errorcpus > 0) {
881 					mcpup->cpu_list[i - errorcpus] =
882 					    mcpup->cpu_list[i];
883 				}
884 			}
885 			ncpuids -= errorcpus;
886 
887 			if (!panic_quiesce) {
888 				if (errorcpus == 0) {
889 					cmn_err(CE_CONT, "<none> have been "
890 					    "marked in error\n");
891 					cmn_err(CE_PANIC, "send_mondo_set: "
892 					    "hypervisor returned "
893 					    "H_ECPUERROR but no CPU in "
894 					    "cpu_list in error state");
895 				} else {
896 					cmn_err(CE_CONT, "have been marked in "
897 					    "error\n");
898 					cmn_err(CE_PANIC, "send_mondo_set: "
899 					    "CPU(s) in error state");
900 				}
901 			}
902 		} else if (stat != H_EWOULDBLOCK) {
903 			if (panic_quiesce)
904 				return;
905 			/*
906 			 * For all other errors, panic.
907 			 */
908 			cmn_err(CE_CONT, "send_mondo_set: unexpected "
909 			    "hypervisor error 0x%x while sending a "
910 			    "mondo to cpuid(s):", stat);
911 			for (i = 0; i < ncpuids; i++) {
912 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
913 			}
914 			cmn_err(CE_CONT, "\n");
915 			cmn_err(CE_PANIC, "send_mondo_set: unexpected "
916 			    "hypervisor error");
917 		}
918 
919 		tick = gettick();
920 		/*
921 		 * If there is a big jump between the current tick
922 		 * count and lasttick, we have probably hit a break
923 		 * point.  Adjust endtick accordingly to avoid panic.
924 		 */
925 		if (tick > (lasttick + xc_tick_jump_limit))
926 			endtick += (tick - lasttick);
927 		lasttick = tick;
928 		if (tick > endtick) {
929 			if (panic_quiesce)
930 				return;
931 			cmn_err(CE_CONT, "send mondo timeout "
932 			    "[retries: 0x%x]  cpuids: ", retries);
933 			for (i = 0; i < ncpuids; i++)
934 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
935 			cmn_err(CE_CONT, "\n");
936 			cmn_err(CE_PANIC, "send_mondo_set: timeout");
937 		}
938 
939 		while (gettick() < (tick + sys_clock_mhz))
940 			;
941 		retries++;
942 	} while (ncpuids > 0);
943 
944 	CPU_STATS_ADDQ(CPU, sys, xcalls, shipped);
945 
946 #ifdef SEND_MONDO_STATS
947 	{
948 		uint64_t n = gettick() - starttick;
949 		if (n < 8192)
950 			x_set_stimes[n >> 7]++;
951 		else if (n < 15*8192)
952 			x_set_ltimes[n >> 13]++;
953 		else
954 			x_set_ltimes[0xf]++;
955 	}
956 	x_set_cpus[shipped]++;
957 #endif
958 }
959 
960 void
961 syncfpu(void)
962 {
963 }
964 
965 void
966 sticksync_slave(void)
967 {}
968 
969 void
970 sticksync_master(void)
971 {}
972 
973 void
974 cpu_init_cache_scrub(void)
975 {
976 	mach_set_soft_state(SIS_NORMAL, &SOLARIS_SOFT_STATE_RUN_MSG);
977 }
978 
979 int
980 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data)
981 {
982 	int ret, watched;
983 
984 	watched = watch_disable_addr((void *)addr, 4, S_WRITE);
985 	ret = dtrace_blksuword32(addr, data, 0);
986 	if (watched)
987 		watch_enable_addr((void *)addr, 4, S_WRITE);
988 
989 	return (ret);
990 }
991 
992 int
993 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain)
994 {
995 	if (suword32((void *)addr, *data) == -1)
996 		return (tryagain ? dtrace_blksuword32_err(addr, data) : -1);
997 	dtrace_flush_sec(addr);
998 
999 	return (0);
1000 }
1001 
1002 /*ARGSUSED*/
1003 void
1004 cpu_faulted_enter(struct cpu *cp)
1005 {
1006 }
1007 
1008 /*ARGSUSED*/
1009 void
1010 cpu_faulted_exit(struct cpu *cp)
1011 {
1012 }
1013 
1014 static int
1015 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg)
1016 {
1017 	int rc, i;
1018 
1019 	for (rc = 0, i = 0; i < NCPU; i++) {
1020 		if (CPU_IN_SET(cpu_ready_set, i))
1021 			rc += cb(i, arg);
1022 	}
1023 
1024 	return (rc);
1025 }
1026 
1027 /*
1028  * Sends a cross-call to a specified processor.  The caller assumes
1029  * responsibility for repetition of cross-calls, as appropriate (MARSA for
1030  * debugging).
1031  */
1032 static int
1033 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1,
1034     uintptr_t arg2)
1035 {
1036 	int stat;
1037 	struct machcpu	*mcpup;
1038 	uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0;
1039 
1040 	mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m);
1041 
1042 	/*
1043 	 * if (idsr_busy())
1044 	 *	return (KDI_XC_RES_ERR);
1045 	 */
1046 
1047 	init_mondo_nocheck((xcfunc_t *)func, arg1, arg2);
1048 
1049 	mcpup->cpu_list[0] = (uint16_t)cpuid;
1050 	stat = shipit(1, mcpup->cpu_list_ra);
1051 
1052 	if (stat == 0)
1053 		return (KDI_XC_RES_OK);
1054 	else
1055 		return (KDI_XC_RES_NACK);
1056 }
1057 
1058 static void
1059 kdi_tickwait(clock_t nticks)
1060 {
1061 	clock_t endtick = gettick() + nticks;
1062 
1063 	while (gettick() < endtick)
1064 		;
1065 }
1066 
1067 static void
1068 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size,
1069     int icache_linesize)
1070 {
1071 	kdi_dcache_size = dcache_size;
1072 	kdi_dcache_linesize = dcache_linesize;
1073 	kdi_icache_size = icache_size;
1074 	kdi_icache_linesize = icache_linesize;
1075 }
1076 
1077 /* used directly by kdi_read/write_phys */
1078 void
1079 kdi_flush_caches(void)
1080 {
1081 	/* Not required on sun4v architecture. */
1082 }
1083 
1084 /*ARGSUSED*/
1085 int
1086 kdi_get_stick(uint64_t *stickp)
1087 {
1088 	return (-1);
1089 }
1090 
1091 void
1092 cpu_kdi_init(kdi_t *kdi)
1093 {
1094 	kdi->kdi_flush_caches = kdi_flush_caches;
1095 	kdi->mkdi_cpu_init = kdi_cpu_init;
1096 	kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter;
1097 	kdi->mkdi_xc_one = kdi_xc_one;
1098 	kdi->mkdi_tickwait = kdi_tickwait;
1099 	kdi->mkdi_get_stick = kdi_get_stick;
1100 }
1101 
1102 uint64_t	soft_state_message_ra[SOLARIS_SOFT_STATE_MSG_CNT];
1103 static uint64_t	soft_state_saved_state = (uint64_t)-1;
1104 static int	soft_state_initialized = 0;
1105 static uint64_t soft_state_sup_minor;		/* Supported minor number */
1106 static hsvc_info_t soft_state_hsvc = {
1107 			HSVC_REV_1, NULL, HSVC_GROUP_SOFT_STATE, 1, 0, NULL };
1108 
1109 
1110 static void
1111 sun4v_system_claim(void)
1112 {
1113 	watchdog_suspend();
1114 	kldc_debug_enter();
1115 	/*
1116 	 * For "mdb -K", set soft state to debugging
1117 	 */
1118 	if (soft_state_saved_state == -1) {
1119 		mach_get_soft_state(&soft_state_saved_state,
1120 		    &SOLARIS_SOFT_STATE_SAVED_MSG);
1121 	}
1122 	/*
1123 	 * check again as the read above may or may not have worked and if
1124 	 * it didn't then soft state will still be -1
1125 	 */
1126 	if (soft_state_saved_state != -1) {
1127 		mach_set_soft_state(SIS_TRANSITION,
1128 		    &SOLARIS_SOFT_STATE_DEBUG_MSG);
1129 	}
1130 }
1131 
1132 static void
1133 sun4v_system_release(void)
1134 {
1135 	watchdog_resume();
1136 	/*
1137 	 * For "mdb -K", set soft_state state back to original state on exit
1138 	 */
1139 	if (soft_state_saved_state != -1) {
1140 		mach_set_soft_state(soft_state_saved_state,
1141 		    &SOLARIS_SOFT_STATE_SAVED_MSG);
1142 		soft_state_saved_state = -1;
1143 	}
1144 }
1145 
1146 void
1147 plat_kdi_init(kdi_t *kdi)
1148 {
1149 	kdi->pkdi_system_claim = sun4v_system_claim;
1150 	kdi->pkdi_system_release = sun4v_system_release;
1151 }
1152 
1153 /*
1154  * Routine to return memory information associated
1155  * with a physical address and syndrome.
1156  */
1157 /* ARGSUSED */
1158 int
1159 cpu_get_mem_info(uint64_t synd, uint64_t afar,
1160     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
1161     int *segsp, int *banksp, int *mcidp)
1162 {
1163 	return (ENOTSUP);
1164 }
1165 
1166 /*
1167  * This routine returns the size of the kernel's FRU name buffer.
1168  */
1169 size_t
1170 cpu_get_name_bufsize()
1171 {
1172 	return (UNUM_NAMLEN);
1173 }
1174 
1175 /*
1176  * This routine is a more generic interface to cpu_get_mem_unum(),
1177  * that may be used by other modules (e.g. mm).
1178  */
1179 /* ARGSUSED */
1180 int
1181 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
1182     char *buf, int buflen, int *lenp)
1183 {
1184 	return (ENOTSUP);
1185 }
1186 
1187 /* ARGSUSED */
1188 int
1189 cpu_get_mem_sid(char *unum, char *buf, int buflen, int *lenp)
1190 {
1191 	return (ENOTSUP);
1192 }
1193 
1194 /* ARGSUSED */
1195 int
1196 cpu_get_mem_addr(char *unum, char *sid, uint64_t offset, uint64_t *addrp)
1197 {
1198 	return (ENOTSUP);
1199 }
1200 
1201 /*
1202  * xt_sync - wait for previous x-traps to finish
1203  */
1204 void
1205 xt_sync(cpuset_t cpuset)
1206 {
1207 	union {
1208 		uint8_t volatile byte[NCPU];
1209 		uint64_t volatile xword[NCPU / 8];
1210 	} cpu_sync;
1211 	uint64_t starttick, endtick, tick, lasttick, traptrace_id;
1212 	uint_t largestid, smallestid;
1213 	int i, j;
1214 
1215 	kpreempt_disable();
1216 	CPUSET_DEL(cpuset, CPU->cpu_id);
1217 	CPUSET_AND(cpuset, cpu_ready_set);
1218 
1219 	CPUSET_BOUNDS(cpuset, smallestid, largestid);
1220 	if (smallestid == CPUSET_NOTINSET)
1221 		goto out;
1222 
1223 	/*
1224 	 * Sun4v uses a queue for receiving mondos. Successful
1225 	 * transmission of a mondo only indicates that the mondo
1226 	 * has been written into the queue.
1227 	 *
1228 	 * We use an array of bytes to let each cpu to signal back
1229 	 * to the cross trap sender that the cross trap has been
1230 	 * executed. Set the byte to 1 before sending the cross trap
1231 	 * and wait until other cpus reset it to 0.
1232 	 */
1233 	bzero((void *)&cpu_sync, NCPU);
1234 	cpu_sync.byte[smallestid] = 1;
1235 	if (largestid != smallestid) {
1236 		for (i = (smallestid + 1); i <= (largestid - 1); i++)
1237 			if (CPU_IN_SET(cpuset, i))
1238 				cpu_sync.byte[i] = 1;
1239 		cpu_sync.byte[largestid] = 1;
1240 	}
1241 
1242 	/*
1243 	 * To help debug xt_sync panic, each mondo is uniquely identified
1244 	 * by passing the tick value, traptrace_id as the second mondo
1245 	 * argument to xt_some which is logged in CPU's mondo queue,
1246 	 * traptrace buffer and the panic message.
1247 	 */
1248 	traptrace_id = gettick();
1249 	xt_some(cpuset, (xcfunc_t *)xt_sync_tl1,
1250 	    (uint64_t)cpu_sync.byte, traptrace_id);
1251 
1252 	starttick = lasttick = gettick();
1253 	endtick = starttick + xc_sync_tick_limit;
1254 
1255 	for (i = (smallestid / 8); i <= (largestid / 8); i++) {
1256 		while (cpu_sync.xword[i] != 0) {
1257 			tick = gettick();
1258 			/*
1259 			 * If there is a big jump between the current tick
1260 			 * count and lasttick, we have probably hit a break
1261 			 * point. Adjust endtick accordingly to avoid panic.
1262 			 */
1263 			if (tick > (lasttick + xc_tick_jump_limit)) {
1264 				endtick += (tick - lasttick);
1265 			}
1266 			lasttick = tick;
1267 			if (tick > endtick) {
1268 				if (panic_quiesce)
1269 					goto out;
1270 				cmn_err(CE_CONT, "Cross trap sync timeout:  "
1271 				    "at cpu_sync.xword[%d]: 0x%lx "
1272 				    "cpu_sync.byte: 0x%lx "
1273 				    "starttick: 0x%lx endtick: 0x%lx "
1274 				    "traptrace_id = 0x%lx\n",
1275 				    i, cpu_sync.xword[i],
1276 				    (uint64_t)cpu_sync.byte,
1277 				    starttick, endtick, traptrace_id);
1278 				cmn_err(CE_CONT, "CPUIDs:");
1279 				for (j = (i * 8); j <= largestid; j++) {
1280 					if (cpu_sync.byte[j] != 0)
1281 						cmn_err(CE_CONT, " 0x%x", j);
1282 				}
1283 				cmn_err(CE_PANIC, "xt_sync: timeout");
1284 			}
1285 		}
1286 	}
1287 
1288 out:
1289 	kpreempt_enable();
1290 }
1291 
1292 #define	QFACTOR		200
1293 /*
1294  * Recalculate the values of the cross-call timeout variables based
1295  * on the value of the 'inter-cpu-latency' property of the platform node.
1296  * The property sets the number of nanosec to wait for a cross-call
1297  * to be acknowledged.  Other timeout variables are derived from it.
1298  *
1299  * N.B. This implementation is aware of the internals of xc_init()
1300  * and updates many of the same variables.
1301  */
1302 void
1303 recalc_xc_timeouts(void)
1304 {
1305 	typedef union {
1306 		uint64_t whole;
1307 		struct {
1308 			uint_t high;
1309 			uint_t low;
1310 		} half;
1311 	} u_number;
1312 
1313 	/* See x_call.c for descriptions of these extern variables. */
1314 	extern uint64_t xc_tick_limit_scale;
1315 	extern uint64_t xc_mondo_time_limit;
1316 	extern uint64_t xc_func_time_limit;
1317 	extern uint64_t xc_scale;
1318 	extern uint64_t xc_mondo_multiplier;
1319 	extern uint_t   nsec_shift;
1320 
1321 	/* Temp versions of the target variables */
1322 	uint64_t tick_limit;
1323 	uint64_t tick_jump_limit;
1324 	uint64_t mondo_time_limit;
1325 	uint64_t func_time_limit;
1326 	uint64_t scale;
1327 
1328 	uint64_t latency;	/* nanoseconds */
1329 	uint64_t maxfreq;
1330 	uint64_t tick_limit_save = xc_tick_limit;
1331 	uint64_t sync_tick_limit_save = xc_sync_tick_limit;
1332 	uint_t   tick_scale;
1333 	uint64_t top;
1334 	uint64_t bottom;
1335 	u_number tk;
1336 
1337 	md_t *mdp;
1338 	int nrnode;
1339 	mde_cookie_t *platlist;
1340 
1341 	/*
1342 	 * Look up the 'inter-cpu-latency' (optional) property in the
1343 	 * platform node of the MD.  The units are nanoseconds.
1344 	 */
1345 	if ((mdp = md_get_handle()) == NULL) {
1346 		cmn_err(CE_WARN, "recalc_xc_timeouts: "
1347 		    "Unable to initialize machine description");
1348 		return;
1349 	}
1350 
1351 	nrnode = md_alloc_scan_dag(mdp,
1352 	    md_root_node(mdp), "platform", "fwd", &platlist);
1353 
1354 	ASSERT(nrnode == 1);
1355 	if (nrnode < 1) {
1356 		cmn_err(CE_WARN, "recalc_xc_timeouts: platform node missing");
1357 		goto done;
1358 	}
1359 	if (md_get_prop_val(mdp, platlist[0],
1360 	    "inter-cpu-latency", &latency) == -1)
1361 		goto done;
1362 
1363 	/*
1364 	 * clock.h defines an assembly-language macro
1365 	 * (NATIVE_TIME_TO_NSEC_SCALE) to convert from %stick
1366 	 * units to nanoseconds.  Since the inter-cpu-latency
1367 	 * units are nanoseconds and the xc_* variables require
1368 	 * %stick units, we need the inverse of that function.
1369 	 * The trick is to perform the calculation without
1370 	 * floating point, but also without integer truncation
1371 	 * or overflow.  To understand the calculation below,
1372 	 * please read the discussion of the macro in clock.h.
1373 	 * Since this new code will be invoked infrequently,
1374 	 * we can afford to implement it in C.
1375 	 *
1376 	 * tick_scale is the reciprocal of nsec_scale which is
1377 	 * calculated at startup in setcpudelay().  The calc
1378 	 * of tick_limit parallels that of NATIVE_TIME_TO_NSEC_SCALE
1379 	 * except we use tick_scale instead of nsec_scale and
1380 	 * C instead of assembler.
1381 	 */
1382 	tick_scale = (uint_t)(((u_longlong_t)sys_tick_freq
1383 	    << (32 - nsec_shift)) / NANOSEC);
1384 
1385 	tk.whole = latency;
1386 	top = ((uint64_t)tk.half.high << 4) * tick_scale;
1387 	bottom = (((uint64_t)tk.half.low << 4) * (uint64_t)tick_scale) >> 32;
1388 	tick_limit = top + bottom;
1389 
1390 	/*
1391 	 * xc_init() calculated 'maxfreq' by looking at all the cpus,
1392 	 * and used it to derive some of the timeout variables that we
1393 	 * recalculate below.  We can back into the original value by
1394 	 * using the inverse of one of those calculations.
1395 	 */
1396 	maxfreq = xc_mondo_time_limit / xc_scale;
1397 
1398 	/*
1399 	 * Don't allow the new timeout (xc_tick_limit) to fall below
1400 	 * the system tick frequency (stick).  Allowing the timeout
1401 	 * to be set more tightly than this empirically determined
1402 	 * value may cause panics.
1403 	 */
1404 	tick_limit = tick_limit < sys_tick_freq ? sys_tick_freq : tick_limit;
1405 
1406 	tick_jump_limit = tick_limit / 32;
1407 	tick_limit *= xc_tick_limit_scale;
1408 
1409 	/*
1410 	 * Recalculate xc_scale since it is used in a callback function
1411 	 * (xc_func_timeout_adj) to adjust two of the timeouts dynamically.
1412 	 * Make the change in xc_scale proportional to the change in
1413 	 * xc_tick_limit.
1414 	 */
1415 	scale = (xc_scale * tick_limit + sys_tick_freq / 2) / tick_limit_save;
1416 	if (scale == 0)
1417 		scale = 1;
1418 
1419 	mondo_time_limit = maxfreq * scale;
1420 	func_time_limit = mondo_time_limit * xc_mondo_multiplier;
1421 
1422 	/*
1423 	 * Don't modify the timeouts if nothing has changed.  Else,
1424 	 * stuff the variables with the freshly calculated (temp)
1425 	 * variables.  This minimizes the window where the set of
1426 	 * values could be inconsistent.
1427 	 */
1428 	if (tick_limit != xc_tick_limit) {
1429 		xc_tick_limit = tick_limit;
1430 		xc_tick_jump_limit = tick_jump_limit;
1431 		xc_scale = scale;
1432 		xc_mondo_time_limit = mondo_time_limit;
1433 		xc_func_time_limit = func_time_limit;
1434 	}
1435 
1436 done:
1437 	/*
1438 	 * Increase the timeout limit for xt_sync() cross calls.
1439 	 */
1440 	xc_sync_tick_limit = xc_tick_limit * (cpu_q_entries / QFACTOR);
1441 	xc_sync_tick_limit = xc_sync_tick_limit < xc_tick_limit ?
1442 	    xc_tick_limit : xc_sync_tick_limit;
1443 
1444 	/*
1445 	 * Force the new values to be used for future cross calls.
1446 	 * This is necessary only when we increase the timeouts.
1447 	 */
1448 	if ((xc_tick_limit > tick_limit_save) || (xc_sync_tick_limit >
1449 	    sync_tick_limit_save)) {
1450 		cpuset_t cpuset = cpu_ready_set;
1451 		xt_sync(cpuset);
1452 	}
1453 
1454 	if (nrnode > 0)
1455 		md_free_scan_dag(mdp, &platlist);
1456 	(void) md_fini_handle(mdp);
1457 }
1458 
1459 void
1460 mach_soft_state_init(void)
1461 {
1462 	int		i;
1463 	uint64_t	ra;
1464 
1465 	/*
1466 	 * Try to register soft_state api. If it fails, soft_state api has not
1467 	 * been implemented in the firmware, so do not bother to setup
1468 	 * soft_state in the kernel.
1469 	 */
1470 	if ((i = hsvc_register(&soft_state_hsvc, &soft_state_sup_minor)) != 0) {
1471 		return;
1472 	}
1473 	for (i = 0; i < SOLARIS_SOFT_STATE_MSG_CNT; i++) {
1474 		ASSERT(strlen((const char *)(void *)
1475 		    soft_state_message_strings + i) < SSM_SIZE);
1476 		if ((ra = va_to_pa(
1477 		    (void *)(soft_state_message_strings + i))) == -1ll) {
1478 			return;
1479 		}
1480 		soft_state_message_ra[i] = ra;
1481 	}
1482 	/*
1483 	 * Tell OBP that we are supporting Guest State
1484 	 */
1485 	prom_sun4v_soft_state_supported();
1486 	soft_state_initialized = 1;
1487 }
1488 
1489 void
1490 mach_set_soft_state(uint64_t state, uint64_t *string_ra)
1491 {
1492 	uint64_t	rc;
1493 
1494 	if (soft_state_initialized && *string_ra) {
1495 		rc = hv_soft_state_set(state, *string_ra);
1496 		if (rc != H_EOK) {
1497 			cmn_err(CE_WARN,
1498 			    "hv_soft_state_set returned %ld\n", rc);
1499 		}
1500 	}
1501 }
1502 
1503 void
1504 mach_get_soft_state(uint64_t *state, uint64_t *string_ra)
1505 {
1506 	uint64_t	rc;
1507 
1508 	if (soft_state_initialized && *string_ra) {
1509 		rc = hv_soft_state_get(*string_ra, state);
1510 		if (rc != H_EOK) {
1511 			cmn_err(CE_WARN,
1512 			    "hv_soft_state_get returned %ld\n", rc);
1513 			*state = -1;
1514 		}
1515 	}
1516 }
1517