1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #include <sys/types.h> 27 #include <sys/sysmacros.h> 28 #include <sys/ddi.h> 29 #include <sys/async.h> 30 #include <sys/sunddi.h> 31 #include <sys/ddifm.h> 32 #include <sys/fm/protocol.h> 33 #include <sys/vmem.h> 34 #include <sys/intr.h> 35 #include <sys/ivintr.h> 36 #include <sys/errno.h> 37 #include <sys/hypervisor_api.h> 38 #include <sys/hsvc.h> 39 #include <px_obj.h> 40 #include <sys/machsystm.h> 41 #include "px_lib4v.h" 42 43 #define MPS_SET 0 44 #define MPS_GET 1 45 46 static uint64_t hvio_rp_mps(devhandle_t dev_hdl, pci_device_t bdf, int32_t *mps, 47 int op); 48 49 uint64_t 50 hvio_get_rp_mps_cap(devhandle_t dev_hdl, pci_device_t bdf, int32_t *mps_cap) 51 { 52 return (hvio_rp_mps(dev_hdl, bdf, mps_cap, MPS_GET)); 53 } 54 55 uint64_t 56 hvio_set_rp_mps(devhandle_t dev_hdl, pci_device_t bdf, int32_t mps) 57 { 58 return (hvio_rp_mps(dev_hdl, bdf, &mps, MPS_SET)); 59 } 60 61 uint64_t 62 hvio_rp_mps(devhandle_t dev_hdl, pci_device_t bdf, int32_t *mps, int op) 63 { 64 uint32_t data; 65 uint32_t hdr, hdr_next_ptr, hdr_cap_id; 66 uint16_t offset = PCI_CONF_STAT; 67 int deadcount = 0; 68 pci_cfg_data_t dataw; 69 70 if ((hvio_config_get(dev_hdl, bdf, PCI_CONF_VENID, 4, 71 (pci_cfg_data_t *)&data)) != H_EOK) 72 return (H_ENOACCESS); 73 74 if ((data & 0xffff) != 0x108e) 75 return (H_ENOACCESS); 76 77 if ((hvio_config_get(dev_hdl, bdf, PCI_CONF_COMM, 4, 78 (pci_cfg_data_t *)&hdr)) != H_EOK) 79 return (H_ENOACCESS); 80 81 if (!(hdr & (PCI_STAT_CAP << 16))) 82 return (H_ENOACCESS); 83 84 (void) hvio_config_get(dev_hdl, bdf, PCI_CONF_CAP_PTR, 4, 85 (pci_cfg_data_t *)&hdr); 86 87 hdr_next_ptr = hdr & 0xFF; 88 hdr_cap_id = 0; 89 90 while ((hdr_next_ptr != PCI_CAP_NEXT_PTR_NULL) && 91 (hdr_cap_id != PCI_CAP_ID_PCI_E)) { 92 93 offset = hdr_next_ptr; 94 95 if (hdr_next_ptr < 0x40) 96 break; 97 98 (void) hvio_config_get(dev_hdl, bdf, hdr_next_ptr, 4, 99 (pci_cfg_data_t *)&hdr); 100 101 hdr_next_ptr = (hdr >> 8) & 0xFF; 102 hdr_cap_id = hdr & 0xFF; 103 104 if (deadcount++ > 100) 105 break; 106 } 107 108 if (hdr_cap_id != PCI_CAP_ID_PCI_E) 109 return (H_ENOACCESS); 110 111 if (op == MPS_SET) { 112 113 /* Write the MPS */ 114 115 (void) hvio_config_get(dev_hdl, bdf, offset + PCIE_DEVCTL, 116 4, (pci_cfg_data_t *)&data); 117 118 data = (data & 0xffffff1f) | (*mps << 5); 119 120 dataw.qw = (uint32_t)data; 121 122 (void) hvio_config_put(dev_hdl, bdf, offset + PCIE_DEVCTL, 123 4, dataw); 124 } else { 125 126 /* Read the MPS Capabilities */ 127 128 (void) hvio_config_get(dev_hdl, bdf, offset + PCIE_DEVCAP, 129 4, (pci_cfg_data_t *)&data); 130 131 *mps = data & 0x7; 132 } 133 134 return (H_EOK); 135 } 136