1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2001-2002 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _TODM5819_H 28 #define _TODM5819_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 extern char *v_rtc_addr_reg; 37 extern volatile uint8_t *v_rtc_data_reg; 38 39 #ifdef DEBUG 40 #include <sys/promif.h> 41 #define DPRINTF if (m5819_debug_flags) prom_printf 42 #else 43 #define DPRINTF 44 #endif /* DEBUG */ 45 46 #define M5819_ADDR_REG *(volatile uint8_t *)v_rtc_addr_reg 47 #define M5819_DATA_REG *(volatile uint8_t *)v_rtc_data_reg 48 49 50 /* 51 * Definitions for Real Time Clock driver (m5819 chip). 52 */ 53 54 /* 55 * Common registers between Banks 0, 1, and 2. 56 */ 57 #define RTC_SEC 0x0 /* Seconds */ 58 #define RTC_ASEC 0x1 /* Seconds Alarm */ 59 #define RTC_MIN 0x2 /* Minutes */ 60 #define RTC_AMIN 0x3 /* Minutes Alarm */ 61 #define RTC_HRS 0x4 /* Hours */ 62 #define RTC_AHRS 0x5 /* Hours Alarm */ 63 #define RTC_DOW 0x6 /* Day-of-Week */ 64 #define RTC_DOM 0x7 /* Day-of-Month */ 65 #define RTC_MON 0x8 /* Month */ 66 #define RTC_YEAR 0x9 /* Year */ 67 #define RTC_A 0xa /* Control Register A */ 68 #define RTC_B 0xb /* Control Register B */ 69 #define RTC_C 0xc /* Control Register C */ 70 #define RTC_D 0xd /* Control Register D */ 71 #define RTC_CENTURY 0x32 /* Century */ 72 73 /* 74 * Control register A definitions 75 */ 76 #define RTC_DIV0 0x10 /* Bank Select */ 77 #define RTC_DIV1 0x20 /* Oscillator enable */ 78 #define RTC_DIV2 0x40 /* Countdown chain */ 79 #define RTC_UIP 0x80 /* Update in progress bit */ 80 81 /* 82 * Control register B definitions 83 */ 84 #define RTC_DSE 0x01 /* Daylight Savings Enable */ 85 #define RTC_HM 0x02 /* Hour mode, 1 = 24 hour, 0 = 12 hour */ 86 #define RTC_DM 0x04 /* Date mode, 1 = binary, 0 = BCD */ 87 #define RTC_UIE 0x10 /* Update-ended Interrupt Enable */ 88 #define RTC_AIE 0x20 /* Alarm Interrupt Enable */ 89 #define RTC_PIE 0x40 /* Periodic Interrupt Enable */ 90 #define RTC_SET 0x80 /* Stop updates for time set */ 91 92 /* 93 * Control Register C definitions 94 */ 95 #define RTC_UF 0x10 /* UF flag bit */ 96 #define RTC_AF 0x20 /* AF flag bit */ 97 #define RTC_PF 0x40 /* PF flag bit */ 98 #define RTC_IRQF 0x80 /* IRQ flag */ 99 100 /* 101 * Control Register D definitions 102 */ 103 #define RTC_VRT 0x80 /* Valid RAM and time bit */ 104 105 106 /* 107 * Bank 2 Registers 108 */ 109 #define APC_APCR1 0x40 /* APC Control Register 1 */ 110 #define APC_APCR2 0x41 /* APC Control Register 2 */ 111 #define APC_APSR 0x42 /* APC Status Register */ 112 #define APC_WDWR 0x43 /* Wake up Day of Week */ 113 #define APC_WDMR 0x44 /* Wake up Date of Month */ 114 #define APC_WMR 0x45 /* Wake up Month */ 115 #define APC_WYR 0x46 /* Wake up Year */ 116 #define APC_WCR 0x48 /* Wake up Century */ 117 118 #define RTC_CADDR 0x51 /* Century address register */ 119 120 /* 121 * APC Control Register 1 (APCR1) definitions 122 */ 123 #define APC_FSTRC 0x40 /* Fail-safe Timer Reset Command */ 124 125 /* 126 * APC Control Register 2 (APCR2) definitions 127 */ 128 #define APC_TME 0x01 /* Timer Match Enable */ 129 130 /* 131 * The following two defintions are used in conjuction to wait 132 * for the UIP bit to clear. 133 */ 134 #define TODM5819_UIP_RETRY_THRESH 6 135 #define TODM5819_UIP_WAIT_USEC 56 136 137 138 struct rtc_t { 139 uint8_t rtc_sec; /* seconds */ 140 uint8_t rtc_asec; /* alarm seconds */ 141 uint8_t rtc_min; /* mins */ 142 uint8_t rtc_amin; /* alarm mins */ 143 uint8_t rtc_hrs; /* hours */ 144 uint8_t rtc_ahrs; /* alarm hours */ 145 uint8_t rtc_dow; /* day of the week */ 146 uint8_t rtc_dom; /* day of the month */ 147 uint8_t rtc_mon; /* month */ 148 uint8_t rtc_year; /* year */ 149 uint8_t rtc_rega; /* REG A */ 150 uint8_t rtc_regb; /* REG B */ 151 uint8_t rtc_regc; /* REG C */ 152 uint8_t rtc_regd; /* REG D */ 153 uint8_t rtc_century; /* century */ 154 uint8_t rtc_adom; /* alarm day */ 155 uint8_t rtc_amon; /* alarm mon */ 156 uint8_t apc_apcr1; /* APC Control register 1 */ 157 uint8_t apc_apcr2; /* APC Control register 2 */ 158 uint8_t apc_apsr; /* APC Status register */ 159 uint8_t apc_wdwr; /* Wakeup date of the month */ 160 uint8_t apc_wdmr; /* Wakeup day of month */ 161 uint8_t apc_wmr; /* Wakeup month register */ 162 uint8_t apc_wyr; /* Wakeup year register */ 163 uint8_t apc_wcr; /* Wakeup Century reg. */ 164 }; 165 166 167 #define RTC_GET8(offset) (M5819_ADDR_REG = (offset), M5819_DATA_REG) 168 #define RTC_PUT8(offset, value) ( \ 169 M5819_ADDR_REG = (offset), \ 170 M5819_DATA_REG = (value)) 171 172 #ifdef __cplusplus 173 } 174 #endif 175 176 #endif /* _TODM5819_H */ 177