xref: /illumos-gate/usr/src/uts/sun4u/sys/pte.h (revision 65a89a64c60f3061bbe2381edaacc81660af9a95)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _SYS_PTE_H
28 #define	_SYS_PTE_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifndef _ASM
33 #include <sys/types.h>
34 #endif /* _ASM */
35 
36 #ifdef	__cplusplus
37 extern "C" {
38 #endif
39 
40 #ifndef _ASM
41 /*
42  * The tte struct is a 64 bit data type.  Since we currently plan to
43  * use a V8 compiler all manipulations in C will be done using the bit fields
44  * or as 2 integers.  In assembly code we will deal with it as a double (using
45  * ldx and stx).  The structure is defined to force a double alignment.
46  * Note that USIIi uses bits <47:40> for diag, and <49:48> are reserved.
47  */
48 typedef union {
49 	struct tte {
50 		uint32_t	v:1;		/* 1=valid mapping */
51 		uint32_t	sz:2;		/* 0=8k 1=64k 2=512k 3=4m */
52 		uint32_t	nfo:1;		/* 1=no-fault access only */
53 
54 		uint32_t	ie:1;		/* 1=invert endianness */
55 		uint32_t	hmenum:3;	/* sw - # of hment in hme_blk */
56 
57 		uint32_t	rsv:7;		/* former rsv:1 lockcnt:6 */
58 		uint32_t	sz2:1;		/* Panther sz2[48] */
59 		uint32_t	diag:5;		/* See USII Note above. */
60 		uint32_t	pahi:11;	/* pa[42:32] */
61 		uint32_t	palo:19;	/* pa[31:13] */
62 		uint32_t	no_sync:1;	/* sw - ghost unload */
63 
64 		uint32_t	suspend:1;	/* sw bits - suspended */
65 		uint32_t	ref:1;		/* sw - reference */
66 		uint32_t	wr_perm:1;	/* sw - write permission */
67 		uint32_t	exec_synth:1;	/* sw bits - itlb synthesis */
68 
69 		uint32_t	exec_perm:1;	/* sw - execute permission */
70 		uint32_t	l:1;		/* 1=lock in tlb */
71 		uint32_t	cp:1;		/* 1=cache in ecache, icache */
72 		uint32_t	cv:1;		/* 1=cache in dcache */
73 
74 		uint32_t	e:1;		/* 1=side effect */
75 		uint32_t	p:1;		/* 1=privilege required */
76 		uint32_t	w:1;		/* 1=writes allowed */
77 		uint32_t	g:1;		/* 1=any context matches */
78 	} tte_bit;
79 	struct {
80 		int32_t		inthi;
81 		uint32_t	intlo;
82 	} tte_int;
83 	uint64_t		ll;
84 } tte_t;
85 
86 #define	tte_val 	tte_bit.v		/* use < 0 check in asm */
87 #define	tte_size	tte_bit.sz
88 #define	tte_size2	tte_bit.sz2
89 #define	tte_nfo		tte_bit.nfo
90 #define	tte_ie		tte_bit.ie		/* XXX? */
91 #define	tte_hmenum	tte_bit.hmenum
92 #define	tte_pahi	tte_bit.pahi
93 #define	tte_palo	tte_bit.palo
94 #define	tte_no_sync	tte_bit.no_sync
95 #define	tte_suspend	tte_bit.suspend
96 #define	tte_ref		tte_bit.ref
97 #define	tte_wr_perm	tte_bit.wr_perm
98 #define	tte_exec_synth	tte_bit.exec_synth
99 #define	tte_exec_perm	tte_bit.exec_perm
100 #define	tte_lock	tte_bit.l
101 #define	tte_cp		tte_bit.cp
102 #define	tte_cv		tte_bit.cv
103 #define	tte_se		tte_bit.e
104 #define	tte_priv	tte_bit.p
105 #define	tte_hwwr	tte_bit.w
106 #define	tte_glb		tte_bit.g
107 
108 #define	tte_inthi	tte_int.inthi
109 #define	tte_intlo	tte_int.intlo
110 
111 #endif /* !_ASM */
112 
113 /*
114  * Defines for valid, sz, sz2 fields in tte.
115  * The TTE_CSZ macro combines the sz and sz2 fields.
116  */
117 #define	TTE8K			0x0
118 #define	TTE64K			0x1
119 #define	TTE512K			0x2
120 #define	TTE4M			0x3
121 #define	TTE32M			0x4
122 #define	TTE256M			0x5
123 #define	TTESZ_VALID		0x4
124 
125 #define	TTE_SZ_SHFT_INT		29
126 #define	TTE_SZ_SHFT		32+29
127 #define	TTE_SZ_BITS		0x3
128 
129 #define	TTE_SZ2_SHFT_INT	14
130 #define	TTE_SZ2_SHFT		32+14
131 #define	TTE_SZ2_BITS		0x4
132 #define	TTE_CSZ_BITS		0x7
133 #define	TTE_CSZ(ttep)	(((ttep)->tte_size2 << 2) | ((ttep)->tte_size))
134 
135 /*
136  * the tte lock cnt now lives in the hme blk and is 16 bits long. See
137  * comments in hme_blk declaration.
138  */
139 #define	MAX_TTE_LCKCNT		(0x10000 - 1)
140 
141 #define	TTE_BSZS_SHIFT(sz)	((sz) * 3)
142 #define	TTEBYTES(sz)		(MMU_PAGESIZE << TTE_BSZS_SHIFT(sz))
143 #define	TTEPAGES(sz)		(1 << TTE_BSZS_SHIFT(sz))
144 #define	TTE_PAGE_SHIFT(sz)	(MMU_PAGESHIFT + TTE_BSZS_SHIFT(sz))
145 #define	TTE_PAGE_OFFSET(sz)	(TTEBYTES(sz) - 1)
146 #define	TTE_PAGEMASK(sz)	(~TTE_PAGE_OFFSET(sz))
147 #define	TTE_PFNMASK(sz)		(~(TTE_PAGE_OFFSET(sz) >> MMU_PAGESHIFT))
148 
149 #define	TTE_PA_LSHIFT		21	/* used to do sllx on tte to get pa */
150 
151 #ifndef _ASM
152 
153 #define	TTE_PASHIFT		19	/* used to manage pahi and palo */
154 #define	TTE_PALOMASK		((1 << TTE_PASHIFT) -1)
155 /* PFN is defined as bits [40-13] of the physical address */
156 #define	TTE_TO_TTEPFN(ttep)						\
157 	((((ttep)->tte_pahi << TTE_PASHIFT) | (ttep)->tte_palo) &	\
158 	TTE_PFNMASK(TTE_CSZ(ttep)))
159 /*
160  * This define adds the vaddr page offset to obtain a correct pfn
161  */
162 #define	TTE_TO_PFN(vaddr, ttep)						\
163 	(sfmmu_ttetopfn(ttep, vaddr))
164 
165 #define	PFN_TO_TTE(entry, pfn) {		\
166 	entry.tte_pahi = pfn >> TTE_PASHIFT;	\
167 	entry.tte_palo = pfn & TTE_PALOMASK;	\
168 	}
169 
170 #endif /* !_ASM */
171 
172 /*
173  * The tte defines are separated into integers because the compiler doesn't
174  * support 64bit defines.
175  */
176 /* Defines for tte using inthi */
177 #define	TTE_VALID_INT			0x80000000
178 #define	TTE_NFO_INT			0x10000000
179 #define	TTE_NFO_SHIFT			0x3	/* makes for an easy check */
180 #define	TTE_IE_INT			0x08000000
181 
182 /* Defines for tte using intlo */
183 #define	TTE_SUSPEND_SHIFT		0
184 #define	TTE_NOSYNC_INT			0x00001000
185 #define	TTE_SUSPEND			0x00000800
186 #define	TTE_REF_INT			0x00000400
187 #define	TTE_WRPRM_INT			0x00000200
188 #define	TTE_E_SYNTH_INT			0x00000100
189 #define	TTE_EXECPRM_INT			0x00000080
190 #define	TTE_LCK_INT			0x00000040
191 #define	TTE_CP_INT			0x00000020
192 #define	TTE_CV_INT			0x00000010
193 #define	TTE_SIDEFF_INT			0x00000008
194 #define	TTE_PRIV_INT			0x00000004
195 #define	TTE_HWWR_INT			0x00000002
196 #define	TTE_GLB_INT			0x00000001
197 
198 #define	TTE_PROT_INT			(TTE_WRPRM_INT | TTE_PRIV_INT)
199 
200 /*
201  * Define to clear the high-order 2 bits of the 43-bit PA in a tte.  The
202  * Spitfire tte has PFN in [40-13] and uses [42-41] as part of Diag bits.
203  */
204 #define	TTE_SPITFIRE_PFNHI_CLEAR	0x3
205 #define	TTE_SPITFIRE_PFNHI_SHIFT	32+9
206 
207 #ifndef ASM
208 
209 /* Defines to help build ttes using inthi */
210 #define	TTE_SZ_INT(sz)	\
211 	((sz & TTE_SZ_BITS) << TTE_SZ_SHFT_INT) | \
212 	((sz & TTE_SZ2_BITS) << TTE_SZ2_SHFT_INT)
213 #define	TTE_HMENUM_INT(hmenum)		((hmenum) << 24)
214 /* XXX PFN is defined as bits [40-13] of the physical address */
215 #define	TTE_PFN_INTHI(pfn)		((pfn) >> TTE_PASHIFT)
216 #define	TTE_VALID_CHECK(attr)	\
217 	(((attr) & PROT_ALL) ? TTE_VALID_INT : 0)
218 #define	TTE_IE_CHECK(attr)	\
219 	(((attr) & HAT_STRUCTURE_LE) ? TTE_IE_INT : 0)
220 #define	TTE_NFO_CHECK(attr)	\
221 	(((attr) & HAT_NOFAULT) ? TTE_NFO_INT : 0)
222 
223 /* Defines to help build ttes using intlo */
224 #define	TTE_PFN_INTLO(pfn)		(((pfn) & TTE_PALOMASK) << 13)
225 #define	TTE_WRPRM_CHECK(attr)	 \
226 	(((attr) & PROT_WRITE) ? TTE_WRPRM_INT : 0)
227 #define	TTE_EXECPRM_CHECK(attr)	 \
228 	(((attr) & PROT_EXEC) ? TTE_EXECPRM_INT : 0)
229 #define	TTE_NOSYNC_CHECK(attr)	 \
230 	(((attr) & HAT_NOSYNC) ? TTE_NOSYNC_INT : 0)
231 #define	TTE_CP_CHECK(attr)	\
232 	(((attr) & SFMMU_UNCACHEPTTE) ? 0: TTE_CP_INT)
233 #define	TTE_CV_CHECK(attr)	\
234 	(((attr) & SFMMU_UNCACHEVTTE) ? 0: TTE_CV_INT)
235 #define	TTE_SE_CHECK(attr)	\
236 	(((attr) & SFMMU_SIDEFFECT) ? TTE_SIDEFF_INT : 0)
237 #define	TTE_PRIV_CHECK(attr)	\
238 	(((attr) & PROT_USER) ? 0 : TTE_PRIV_INT)
239 
240 #define	MAKE_TTEATTR_INTHI(attr)				\
241 	(TTE_VALID_CHECK(attr) | TTE_NFO_CHECK(attr) | TTE_IE_CHECK(attr))
242 
243 #define	MAKE_TTE_INTHI(pfn, attr, sz, hmenum)			\
244 	(MAKE_TTEATTR_INTHI(attr) | TTE_SZ_INT(sz) |		\
245 	TTE_HMENUM_INT(hmenum) | TTE_PFN_INTHI(pfn))
246 
247 #define	MAKE_TTEATTR_INTLO(attr)					\
248 	(TTE_WRPRM_CHECK(attr) | TTE_NOSYNC_CHECK(attr) |		\
249 	TTE_CP_CHECK(attr) | TTE_CV_CHECK(attr) | TTE_SE_CHECK(attr) |	\
250 	TTE_PRIV_CHECK(attr) | TTE_EXECPRM_CHECK(attr))
251 
252 #define	MAKE_TTE_INTLO(pfn, attr, sz, hmenum)				\
253 	(TTE_PFN_INTLO(pfn) | TTE_REF_INT | MAKE_TTEATTR_INTLO(attr))
254 
255 #define	TTEINTHI_ATTR	(TTE_VALID_INT | TTE_IE_INT | TTE_NFO_INT)
256 
257 #define	TTEINTLO_ATTR							\
258 	(TTE_WRPRM_INT | TTE_NOSYNC_INT | TTE_CP_INT | TTE_CV_INT |	\
259 	TTE_SIDEFF_INT | TTE_PRIV_INT | TTE_EXECPRM_INT)
260 
261 #define	MAKE_TTE_MASK(ttep)			\
262 	{					\
263 		(ttep)->tte_bit.v = 1;		\
264 		(ttep)->tte_bit.sz = 3;		\
265 		(ttep)->tte_bit.nfo = 1;	\
266 		(ttep)->tte_bit.ie = 1;		\
267 		(ttep)->tte_bit.sz2 = 1;	\
268 		(ttep)->tte_bit.pahi = 0x7ff;	\
269 		(ttep)->tte_bit.palo = 0x7ffff;	\
270 		(ttep)->tte_bit.exec_perm = 1;	\
271 		(ttep)->tte_bit.l = 1;		\
272 		(ttep)->tte_bit.cp = 1;		\
273 		(ttep)->tte_bit.cv = 1;		\
274 		(ttep)->tte_bit.e = 1;		\
275 		(ttep)->tte_bit.p = 1;		\
276 		(ttep)->tte_bit.w = 1;		\
277 		(ttep)->tte_bit.g = 1;		\
278 	}
279 
280 /*
281  * Defines to check/set TTE bits.
282  */
283 #define	TTE_IS_VALID(ttep)	((ttep)->tte_inthi < 0)
284 #define	TTE_SET_INVALID(ttep)	((ttep)->tte_val = 0)
285 #define	TTE_IS_8K(ttep)		(TTE_CSZ(ttep) == TTE8K)
286 #define	TTE_IS_WRITABLE(ttep)	((ttep)->tte_wr_perm)
287 #define	TTE_IS_EXECUTABLE(ttep)	((ttep)->tte_exec_perm)
288 #define	TTE_IS_PRIVILEGED(ttep)	((ttep)->tte_priv)
289 #define	TTE_IS_NOSYNC(ttep)	((ttep)->tte_no_sync)
290 #define	TTE_IS_LOCKED(ttep)	((ttep)->tte_lock)
291 #define	TTE_IS_GLOBAL(ttep)	((ttep)->tte_glb)
292 #define	TTE_IS_SIDEFFECT(ttep)	((ttep)->tte_se)
293 #define	TTE_IS_NFO(ttep)	((ttep)->tte_nfo)
294 
295 #define	TTE_IS_REF(ttep)	((ttep)->tte_ref)
296 #define	TTE_IS_MOD(ttep)	((ttep)->tte_hwwr)
297 #define	TTE_IS_IE(ttep)		((ttep)->tte_ie)
298 #define	TTE_SET_SUSPEND(ttep)	((ttep)->tte_suspend = 1)
299 #define	TTE_CLR_SUSPEND(ttep)	((ttep)->tte_suspend = 0)
300 #define	TTE_IS_SUSPEND(ttep)	((ttep)->tte_suspend)
301 #define	TTE_SET_REF(ttep)	((ttep)->tte_ref = 1)
302 #define	TTE_CLR_REF(ttep)	((ttep)->tte_ref = 0)
303 #define	TTE_SET_LOCKED(ttep)	((ttep)->tte_lock = 1)
304 #define	TTE_CLR_LOCKED(ttep)	((ttep)->tte_lock = 0)
305 #define	TTE_SET_MOD(ttep)	((ttep)->tte_hwwr = 1)
306 #define	TTE_CLR_MOD(ttep)	((ttep)->tte_hwwr = 0)
307 #define	TTE_SET_RM(ttep)						\
308 	(((ttep)->tte_intlo) = (ttep)->tte_intlo | TTE_HWWR_INT | TTE_REF_INT)
309 #define	TTE_CLR_RM(ttep)						\
310 	(((ttep)->tte_intlo) = (ttep)->tte_intlo &			\
311 	~(TTE_HWWR_INT | TTE_REF_INT))
312 
313 #define	TTE_SET_WRT(ttep)	((ttep)->tte_wr_perm = 1)
314 #define	TTE_CLR_WRT(ttep)	((ttep)->tte_wr_perm = 0)
315 #define	TTE_SET_EXEC(ttep)	((ttep)->tte_exec_perm = 1)
316 #define	TTE_CLR_EXEC(ttep)	((ttep)->tte_exec_perm = 0)
317 #define	TTE_SET_PRIV(ttep)	((ttep)->tte_priv = 1)
318 #define	TTE_CLR_PRIV(ttep)	((ttep)->tte_priv = 0)
319 
320 #define	TTE_IS_VCACHEABLE(ttep)		((ttep)->tte_cv)
321 #define	TTE_SET_VCACHEABLE(ttep)	((ttep)->tte_cv = 1)
322 #define	TTE_CLR_VCACHEABLE(ttep)	((ttep)->tte_cv = 0)
323 #define	TTE_IS_PCACHEABLE(ttep)		((ttep)->tte_cp)
324 #define	TTE_SET_PCACHEABLE(ttep)	((ttep)->tte_cp = 1)
325 #define	TTE_CLR_PCACHEABLE(ttep)	((ttep)->tte_cp = 0)
326 
327 
328 #define	KPM_TTE_VCACHED(tte64, pfn, tte_sz)				\
329 	tte64 = (((uint64_t)(TTE_VALID_INT |				\
330 	    (tte_sz) << TTE_SZ_SHFT_INT)) << 32) |			\
331 	    (((pfn) >> TTE_BSZS_SHIFT(tte_sz)) <<			\
332 	    (TTE_BSZS_SHIFT(tte_sz) + MMU_PAGESHIFT)) |			\
333 	    (TTE_CP_INT | TTE_CV_INT | TTE_PRIV_INT | TTE_HWWR_INT)
334 
335 #define	KPM_TTE_VUNCACHED(tte64, pfn, tte_sz)				\
336 	tte64 = (((uint64_t)(TTE_VALID_INT |				\
337 	    (tte_sz) << TTE_SZ_SHFT_INT)) << 32) |			\
338 	    (((pfn) >> TTE_BSZS_SHIFT(tte_sz)) <<			\
339 	    (TTE_BSZS_SHIFT(tte_sz) + MMU_PAGESHIFT)) |			\
340 	    (TTE_CP_INT | TTE_PRIV_INT | TTE_HWWR_INT)
341 
342 /*
343  * This define provides a generic method to set and clear multiple tte flags.
344  * A bitmask of all flags to be affected is passed in "flags" and a bitmask
345  * of the new values is passed in "newflags".
346  */
347 #define	TTE_SET_LOFLAGS(ttep, flags, newflags)				\
348 	((ttep)->tte_intlo = ((ttep)->tte_intlo & ~(flags)) | (newflags))
349 
350 #define	TTE_GET_LOFLAGS(ttep, flags)	((ttep)->tte_intlo & flags)
351 
352 #endif /* !_ASM */
353 
354 #ifdef	__cplusplus
355 }
356 #endif
357 
358 #endif /* !_SYS_PTE_H */
359