17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*a616a11eSLida.Horn * Common Development and Distribution License (the "License"). 6*a616a11eSLida.Horn * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 22*a616a11eSLida.Horn * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 26*a616a11eSLida.Horn 277c478bd9Sstevel@tonic-gate #ifndef _SYS_PX_REGS_H 287c478bd9Sstevel@tonic-gate #define _SYS_PX_REGS_H 297c478bd9Sstevel@tonic-gate 307c478bd9Sstevel@tonic-gate 317c478bd9Sstevel@tonic-gate #ifdef __cplusplus 327c478bd9Sstevel@tonic-gate extern "C" { 337c478bd9Sstevel@tonic-gate #endif 347c478bd9Sstevel@tonic-gate 357c478bd9Sstevel@tonic-gate /* Register tools history */ 367c478bd9Sstevel@tonic-gate #pragma ident "@(#)hdgen 1.3 03/11/10" 377c478bd9Sstevel@tonic-gate #pragma ident "@(#)firedefiner.pl 1.7 03/11/19" 387c478bd9Sstevel@tonic-gate 397c478bd9Sstevel@tonic-gate /* jcs.csr JCS module defines */ 407c478bd9Sstevel@tonic-gate 417c478bd9Sstevel@tonic-gate #define JCS_CSR_BASE 0x000000 427c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID 0x0 437c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_COOKIE 56 447c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_COOKIE_MASK 0xff 457c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_JVPORT 27 467c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_JVPORT_MASK 0x7f 477c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_JPID_4 21 487c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_JPID_3_0 17 497c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_JPID_3_0_MASK 0xf 507c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_M_S 16 517c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_MID 10 527c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_MID_MASK 0x3f 537c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_MT 4 547c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_MT_MASK 0x3f 557c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_MR 0 567c478bd9Sstevel@tonic-gate #define JBUS_DEVICE_ID_MR_MASK 0xf 577c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_BASE 0x400020 587c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_BASE_V 63 597c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_BASE_BASE 24 607c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_BASE_BASE_MASK 0xfff 617c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_MASK 0x400028 627c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_MASK_MASK_HI 36 637c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_MASK_MASK_HI_MASK 0x7f 647c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_MASK_MASK 24 657c478bd9Sstevel@tonic-gate #define EBUS_OFFSET_MASK_MASK_MASK 0xfff 667c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_BASE 0x400040 677c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_BASE_V 63 687c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_BASE_BASE 24 697c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_BASE_BASE_MASK 0xfff 707c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_MASK 0x400048 717c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_MASK_MASK_HI 36 727c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_MASK_MASK_HI_MASK 0x7f 737c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_MASK_MASK 24 747c478bd9Sstevel@tonic-gate #define PCIE_A_MEM32_OFFSET_MASK_MASK_MASK 0xfff 757c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_BASE 0x400050 767c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_BASE_V 63 777c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_BASE_BASE 24 787c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_BASE_BASE_MASK 0xfff 797c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_MASK 0x400058 807c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_MASK_MASK_HI 36 817c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_MASK_MASK_HI_MASK 0x7f 827c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_MASK_MASK 24 837c478bd9Sstevel@tonic-gate #define PCIE_A_CFG_IO_OFFSET_MASK_MASK_MASK 0xfff 847c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_BASE 0x400060 857c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_BASE_V 63 867c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_BASE_BASE 24 877c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_BASE_BASE_MASK 0xfff 887c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_MASK 0x400068 897c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_MASK_MASK_HI 36 907c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_MASK_MASK_HI_MASK 0x7f 917c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_MASK_MASK 24 927c478bd9Sstevel@tonic-gate #define PCIE_B_MEM32_OFFSET_MASK_MASK_MASK 0xfff 937c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_BASE 0x400070 947c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_BASE_V 63 957c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_BASE_BASE 24 967c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_BASE_BASE_MASK 0xfff 977c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_MASK 0x400078 987c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_MASK_MASK_HI 36 997c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_MASK_MASK_HI_MASK 0x7f 1007c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_MASK_MASK 24 1017c478bd9Sstevel@tonic-gate #define PCIE_B_CFG_IO_OFFSET_MASK_MASK_MASK 0xfff 1027c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_BASE 0x400080 1037c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_BASE_V 63 1047c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_BASE_BASE 24 1057c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_BASE_BASE_MASK 0xfff 1067c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_MASK 0x400088 1077c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_MASK_MASK_HI 36 1087c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_MASK_MASK_HI_MASK 0x7f 1097c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_MASK_MASK 24 1107c478bd9Sstevel@tonic-gate #define PCIE_A_MEM64_OFFSET_MASK_MASK_MASK 0xfff 1117c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_BASE 0x400090 1127c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_BASE_V 63 1137c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_BASE_BASE 24 1147c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_BASE_BASE_MASK 0xfff 1157c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_MASK 0x400098 1167c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_MASK_MASK_HI 36 1177c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_MASK_MASK_HI_MASK 0x7f 1187c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_MASK_MASK 24 1197c478bd9Sstevel@tonic-gate #define PCIE_B_MEM64_OFFSET_MASK_MASK_MASK 0xfff 1207c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS 0x410000 1217c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_CONTROL_LOAD_4 63 1227c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_CONTROL_LOAD_3 62 1237c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_CONTROL_LOAD_2 61 1247c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_CONTROL_LOAD_1 60 1257c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_CONTROL_LOAD_0 59 1267c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_CONTROL 54 1277c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_CONTROL_MASK 0x1f 1287c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_STATUS 49 1297c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_SPARE_STATUS_MASK 0x1f 1307c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_PAR_DELAY 44 1317c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_PAR_EN 43 1327c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_JPACK_DELAY 36 1337c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_JPACK_DELAY_MASK 0x7f 1347c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_DTL_MODE 34 1357c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_DTL_MODE_MASK 0x3 1367c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_JTO 32 1377c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_JTO_MASK 0x3 1387c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_ARB_MODE 27 1397c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_ARB_MODE_MASK 0x3 1407c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_UE_PROP_MODE 26 1417c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_JPID_4 25 1427c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_JPID_3_0 21 1437c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_JPID_3_0_MASK 0xf 1447c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_AOK_THRESH 17 1457c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_AOK_THRESH_MASK 0xf 1467c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_DOK_THRESH 13 1477c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_DOK_THRESH_MASK 0xf 1487c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_NIAGARA_MODE 12 1497c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_PDQ 10 1507c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_PDQ_MASK 0x3 1517c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_J_AD4_DIAG 9 1527c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_LPDQ 0 1537c478bd9Sstevel@tonic-gate #define FIRE_CONTROL_STATUS_LPDQ_MASK 0x1ff 1547c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL 0x410050 1557c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_50 55 1567c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_50_MASK 0x1f 1577c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_25 50 1587c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_25_MASK 0x1f 1597c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_50 45 1607c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_50_MASK 0x1f 1617c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_25 40 1627c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_25_MASK 0x1f 1637c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_DTL_TST2_SCHEME 39 1647c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_50_O 32 1657c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_50_O_MASK 0x7f 1667c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_25_O 24 1677c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EP_25_O_MASK 0x7f 1687c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_50_O 16 1697c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_50_O_MASK 0x7f 1707c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_25_O 8 1717c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_EN_25_O_MASK 0x7f 1727c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_DTL_TST2_MODE 6 1737c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_DTL_TST2_MODE_MASK 0x3 1747c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_PLL_LOCK 5 1757c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_DTL_CHAR 4 1767c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_JITLMT 2 1777c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_JITLMT_MASK 0x3 1787c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_CNTLMT 0 1797c478bd9Sstevel@tonic-gate #define JBUS_PLL_CONTROL_AND_DTL_CONTROL_CNTLMT_MASK 0x3 1807c478bd9Sstevel@tonic-gate #define JBUS_ENERGY_STAR_CONTROL 0x410058 1817c478bd9Sstevel@tonic-gate #define JBUS_ENERGY_STAR_CONTROL_S1_32 5 1827c478bd9Sstevel@tonic-gate #define JBUS_ENERGY_STAR_CONTROL_S1_2 1 1837c478bd9Sstevel@tonic-gate #define JBUS_ENERGY_STAR_CONTROL_FULL 0 1847c478bd9Sstevel@tonic-gate #define JBUS_CHANGE_INITIATION_CONTROL 0x410060 1857c478bd9Sstevel@tonic-gate #define JBUS_CHANGE_INITIATION_CONTROL_CINIT 3 1867c478bd9Sstevel@tonic-gate #define JBUS_CHANGE_INITIATION_CONTROL_CINIT_MASK 0x3 1877c478bd9Sstevel@tonic-gate #define JBUS_CHANGE_INITIATION_CONTROL_CDELAY 0 1887c478bd9Sstevel@tonic-gate #define JBUS_CHANGE_INITIATION_CONTROL_CDELAY_MASK 0x7 1897c478bd9Sstevel@tonic-gate #define RESET_GENERATION 0x417010 1907c478bd9Sstevel@tonic-gate #define RESET_GENERATION_PU_RST 2 1917c478bd9Sstevel@tonic-gate #define RESET_GENERATION_XIR 1 1927c478bd9Sstevel@tonic-gate #define RESET_GENERATION_PO_RST 0 1937c478bd9Sstevel@tonic-gate #define RESET_SOURCE 0x417018 1947c478bd9Sstevel@tonic-gate #define RESET_SOURCE_FATAL 6 1957c478bd9Sstevel@tonic-gate #define RESET_SOURCE_PB_XIR 5 1967c478bd9Sstevel@tonic-gate #define RESET_SOURCE_PB_RST 4 1977c478bd9Sstevel@tonic-gate #define RESET_SOURCE_PU 3 1987c478bd9Sstevel@tonic-gate #define RESET_SOURCE_PU_RST 2 1997c478bd9Sstevel@tonic-gate #define RESET_SOURCE_XIR 1 2007c478bd9Sstevel@tonic-gate #define RESET_SOURCE_PO_RST 0 2017c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_0_DATA 0x460000 2027c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_0_DATA_DATA 0 2037c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_1_DATA 0x460008 2047c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_1_DATA_DATA 0 2057c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_2_DATA 0x460010 2067c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_2_DATA_DATA 0 2077c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_3_DATA 0x460018 2087c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_PIN_3_DATA_DATA 0 2097c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_DATA 0x460020 2107c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_DATA_DATA_3 3 2117c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_DATA_DATA_2 2 2127c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_DATA_DATA_1 1 2137c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_DATA_DATA_0 0 2147c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_CONTROL 0x460028 2157c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_CONTROL_DIR_3 3 2167c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_CONTROL_DIR_2 2 2177c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_CONTROL_DIR_1 1 2187c478bd9Sstevel@tonic-gate #define GPIO_PORT_0_CONTROL_DIR_0 0 2197c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_0_DATA 0x462000 2207c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_0_DATA_DATA 0 2217c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_1_DATA 0x462008 2227c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_1_DATA_DATA 0 2237c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_2_DATA 0x462010 2247c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_2_DATA_DATA 0 2257c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_3_DATA 0x462018 2267c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_PIN_3_DATA_DATA 0 2277c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_DATA 0x462020 2287c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_DATA_DATA_3 3 2297c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_DATA_DATA_2 2 2307c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_DATA_DATA_1 1 2317c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_DATA_DATA_0 0 2327c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_CONTROL 0x462028 2337c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_CONTROL_DIR_3 3 2347c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_CONTROL_DIR_2 2 2357c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_CONTROL_DIR_1 1 2367c478bd9Sstevel@tonic-gate #define GPIO_PORT_1_CONTROL_DIR_0 0 2377c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL 0x464000 2387c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_ENABLE 61 2397c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_READY_COUNT 40 2407c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_READY_COUNT_MASK 0x1fffff 2417c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_PROTOCOL_COUNT 32 2427c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_PROTOCOL_COUNT_MASK 0xff 2437c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_STROBE_COUNT 24 2447c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_STROBE_COUNT_MASK 0xff 2457c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_RECOVERY_COUNT 16 2467c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_RECOVERY_COUNT_MASK 0xff 2477c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_HOLD_COUNT 8 2487c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_HOLD_COUNT_MASK 0xff 2497c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_SETUP_COUNT 0 2507c478bd9Sstevel@tonic-gate #define EBUS_EPROM_TIMING_CONTROL_SETUP_COUNT_MASK 0xff 2517c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL 0x464008 2527c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_READY_COUNT 40 2537c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_READY_COUNT_MASK 0x1fffff 2547c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_PROTOCOL_COUNT 32 2557c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_PROTOCOL_COUNT_MASK 0xff 2567c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_STROBE_COUNT 24 2577c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_STROBE_COUNT_MASK 0xff 2587c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_RECOVERY_COUNT 16 2597c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_RECOVERY_COUNT_MASK 0xff 2607c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_HOLD_COUNT 8 2617c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_HOLD_COUNT_MASK 0xff 2627c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_SETUP_COUNT 0 2637c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_1_TIMING_CONTROL_SETUP_COUNT_MASK 0xff 2647c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL 0x464010 2657c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_READY_COUNT 40 2667c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_READY_COUNT_MASK 0x1fffff 2677c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_PROTOCOL_COUNT 32 2687c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_PROTOCOL_COUNT_MASK 0xff 2697c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_STROBE_COUNT 24 2707c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_STROBE_COUNT_MASK 0xff 2717c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_RECOVERY_COUNT 16 2727c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_RECOVERY_COUNT_MASK 0xff 2737c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_HOLD_COUNT 8 2747c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_HOLD_COUNT_MASK 0xff 2757c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_SETUP_COUNT 0 2767c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_2_TIMING_CONTROL_SETUP_COUNT_MASK 0xff 2777c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL 0x464018 2787c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_READY_COUNT 40 2797c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_READY_COUNT_MASK 0x1fffff 2807c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_PROTOCOL_COUNT 32 2817c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_PROTOCOL_COUNT_MASK 0xff 2827c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_STROBE_COUNT 24 2837c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_STROBE_COUNT_MASK 0xff 2847c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_RECOVERY_COUNT 16 2857c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_RECOVERY_COUNT_MASK 0xff 2867c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_HOLD_COUNT 8 2877c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_HOLD_COUNT_MASK 0xff 2887c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_SETUP_COUNT 0 2897c478bd9Sstevel@tonic-gate #define EBUS_CHIP_SELECT_3_TIMING_CONTROL_SETUP_COUNT_MASK 0xff 2907c478bd9Sstevel@tonic-gate #define I2C_0_INPUT_MONITOR 0x466000 2917c478bd9Sstevel@tonic-gate #define I2C_0_INPUT_MONITOR_SDC 1 2927c478bd9Sstevel@tonic-gate #define I2C_0_INPUT_MONITOR_SDA 0 2937c478bd9Sstevel@tonic-gate #define I2C_0_DATA_DRIVE 0x466008 2947c478bd9Sstevel@tonic-gate #define I2C_0_DATA_DRIVE_SDA 0 2957c478bd9Sstevel@tonic-gate #define I2C_0_CLOCK_DRIVE 0x466010 2967c478bd9Sstevel@tonic-gate #define I2C_0_CLOCK_DRIVE_SCL 0 2977c478bd9Sstevel@tonic-gate #define I2C_1_INPUT_MONITOR 0x468000 2987c478bd9Sstevel@tonic-gate #define I2C_1_INPUT_MONITOR_SDC 1 2997c478bd9Sstevel@tonic-gate #define I2C_1_INPUT_MONITOR_SDA 0 3007c478bd9Sstevel@tonic-gate #define I2C_1_DATA_DRIVE 0x468008 3017c478bd9Sstevel@tonic-gate #define I2C_1_DATA_DRIVE_SDA 0 3027c478bd9Sstevel@tonic-gate #define I2C_1_CLOCK_DRIVE 0x468010 3037c478bd9Sstevel@tonic-gate #define I2C_1_CLOCK_DRIVE_SCL 0 3047c478bd9Sstevel@tonic-gate #define PCIE_A_LEAF_CSR_RING_SLOW_ONLY_ACCESS 0x470000 3057c478bd9Sstevel@tonic-gate #define PCIE_A_LEAF_CSR_RING_SLOW_ONLY_ACCESS_SLOW_ONLY 0 3067c478bd9Sstevel@tonic-gate #define PCIE_B_LEAF_CSR_RING_SLOW_ONLY_ACCESS 0x470008 3077c478bd9Sstevel@tonic-gate #define PCIE_B_LEAF_CSR_RING_SLOW_ONLY_ACCESS_SLOW_ONLY 0 3087c478bd9Sstevel@tonic-gate #define JBUS_PARITY_CONTROL 0x470010 3097c478bd9Sstevel@tonic-gate #define JBUS_PARITY_CONTROL_P_EN 63 3107c478bd9Sstevel@tonic-gate #define JBUS_PARITY_CONTROL_INVERT_PAR 2 3117c478bd9Sstevel@tonic-gate #define JBUS_PARITY_CONTROL_INVERT_PAR_MASK 0xf 3127c478bd9Sstevel@tonic-gate #define JBUS_PARITY_CONTROL_NEXT_DATA 1 3137c478bd9Sstevel@tonic-gate #define JBUS_PARITY_CONTROL_NEXT_ADDR 0 3147c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_1 0x470018 3157c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_1_DATA 0 3167c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_1_DATA_MASK 0xffffffffffffffff 3177c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_2 0x470020 3187c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_2_DATA 0 3197c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_2_DATA_MASK 0xffffffffffffffff 3207c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR 0x470028 3217c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_SPARE_S_INT_EN 61 3227c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_SPARE_S_INT_EN_MASK 0x7 3237c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_UNMAP_RD_S_INT_EN 60 3247c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_ACC_RD_S_INT_EN 59 3257c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_EBUS_TO_S_LOG_EN 58 3267c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_MB_PEA_S_INT_EN 57 3277c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_MB_PER_S_INT_EN 56 3287c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_MB_PEW_S_INT_EN 55 3297c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_UE_ASYN_S_INT_EN 54 3307c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_CE_ASYN_S_INT_EN 53 3317c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTE_S_INT_EN 52 3327c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JBE_S_INT_EN 51 3337c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JUE_S_INT_EN 50 3347c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_IJP_S_INT_EN 49 3357c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ICISE_S_INT_EN 48 3367c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_CPE_S_INT_EN 47 3377c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_APE_S_INT_EN 46 3387c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_WR_DPE_S_INT_EN 45 3397c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_RD_DPE_S_INT_EN 44 3407c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_BMW_S_INT_EN 43 3417c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_BMR_S_INT_EN 42 3427c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_BJC_S_INT_EN 41 3437c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_UNMAP_S_INT_EN 40 3447c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_DPE_S_INT_EN 39 3457c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_CPE_S_INT_EN 38 3467c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_ACC_S_INT_EN 37 3477c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_UNSOL_RD_S_INT_EN 36 3487c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_UNSOL_INTR_S_INT_EN 35 3497c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTCEEW_S_INT_EN 34 3507c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTCEEI_S_INT_EN 33 3517c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTCEER_S_INT_EN 32 3527c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_SPARE_P_INT_EN 29 3537c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_SPARE_P_INT_EN_MASK 0x7 3547c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_UNMAP_RD_P_INT_EN 28 3557c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_ACC_RD_P_INT_EN 27 3567c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_EBUS_TO_P_LOG_EN 26 3577c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_MB_PEA_P_INT_EN 25 3587c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_MB_PER_P_INT_EN 24 3597c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_MB_PEW_P_INT_EN 23 3607c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_UE_ASYN_P_INT_EN 22 3617c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_CE_ASYN_P_INT_EN 21 3627c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTE_P_INT_EN 20 3637c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JBE_P_INT_EN 19 3647c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JUE_P_INT_EN 18 3657c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_IJP_P_INT_EN 17 3667c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ICISE_P_INT_EN 16 3677c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_CPE_P_INT_EN 15 3687c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_APE_P_INT_EN 14 3697c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_WR_DPE_P_INT_EN 13 3707c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_RD_DPE_P_INT_EN 12 3717c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_BMW_P_INT_EN 11 3727c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_BMR_P_INT_EN 10 3737c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_BJC_P_INT_EN 9 3747c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_UNMAP_P_INT_EN 8 3757c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_DPE_P_INT_EN 7 3767c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_PIO_CPE_P_INT_EN 6 3777c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_ILL_ACC_P_INT_EN 5 3787c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_UNSOL_RD_P_INT_EN 4 3797c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_UNSOL_INTR_P_INT_EN 3 3807c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTCEEW_P_INT_EN 2 3817c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTCEEI_P_INT_EN 1 3827c478bd9Sstevel@tonic-gate #define JBC_ERR_LG_ANLYZ_TRIG_ENB_FOR_J_ERR_JTCEER_P_INT_EN 0 3837c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_PERSISTENT 0x470030 3847c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_PERSISTENT_DATA 0 3857c478bd9Sstevel@tonic-gate #define JBUS_SCRATCH_PERSISTENT_DATA_MASK 0xffffffffffffffff 3867c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE 0x471000 3877c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_SPARE_LOG_EN 29 3887c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_SPARE_LOG_EN_MASK 0x7 3897c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_PIO_UNMAP_RD_LOG_EN 28 3907c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_ILL_ACC_RD_LOG_EN 27 3917c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_EBUS_TO_LOG_EN 26 3927c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_MB_PEA_LOG_EN 25 3937c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_MB_PER_LOG_EN 24 3947c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_MB_PEW_LOG_EN 23 3957c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_UE_ASYN_LOG_EN 22 3967c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_CE_ASYN_LOG_EN 21 3977c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_JTE_LOG_EN 20 3987c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_JBE_LOG_EN 19 3997c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_JUE_LOG_EN 18 4007c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_IJP_LOG_EN 17 4017c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_ICISE_LOG_EN 16 4027c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_CPE_LOG_EN 15 4037c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_APE_LOG_EN 14 4047c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_WR_DPE_LOG_EN 13 4057c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_RD_DPE_LOG_EN 12 4067c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_ILL_BMW_LOG_EN 11 4077c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_ILL_BMR_LOG_EN 10 4087c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_BJC_LOG_EN 9 4097c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_PIO_UNMAP_LOG_EN 8 4107c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_PIO_DPE_LOG_EN 7 4117c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_PIO_CPE_LOG_EN 6 4127c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_ILL_ACC_LOG_EN 5 4137c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_UNSOL_RD_LOG_EN 4 4147c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_UNSOL_INTR_LOG_EN 3 4157c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_JTCEEW_LOG_EN 2 4167c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_JTCEEI_LOG_EN 1 4177c478bd9Sstevel@tonic-gate #define JBC_ERROR_LOG_ENABLE_JTCEER_LOG_EN 0 4187c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE 0x471008 4197c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_SPARE_S_INT_EN 61 4207c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_SPARE_S_INT_EN_MASK 0x7 4217c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_UNMAP_RD_S_INT_EN 60 4227c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_ACC_RD_S_INT_EN 59 4237c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_EBUS_TO_S_LOG_EN 58 4247c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_MB_PEA_S_INT_EN 57 4257c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_MB_PER_S_INT_EN 56 4267c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_MB_PEW_S_INT_EN 55 4277c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_UE_ASYN_S_INT_EN 54 4287c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_CE_ASYN_S_INT_EN 53 4297c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTE_S_INT_EN 52 4307c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JBE_S_INT_EN 51 4317c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JUE_S_INT_EN 50 4327c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_IJP_S_INT_EN 49 4337c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ICISE_S_INT_EN 48 4347c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_CPE_S_INT_EN 47 4357c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_APE_S_INT_EN 46 4367c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_WR_DPE_S_INT_EN 45 4377c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_RD_DPE_S_INT_EN 44 4387c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_BMW_S_INT_EN 43 4397c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_BMR_S_INT_EN 42 4407c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_BJC_S_INT_EN 41 4417c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_UNMAP_S_INT_EN 40 4427c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_DPE_S_INT_EN 39 4437c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_CPE_S_INT_EN 38 4447c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_ACC_S_INT_EN 37 4457c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_UNSOL_RD_S_INT_EN 36 4467c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_UNSOL_INTR_S_INT_EN 35 4477c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTCEEW_S_INT_EN 34 4487c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTCEEI_S_INT_EN 33 4497c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTCEER_S_INT_EN 32 4507c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_SPARE_P_INT_EN 29 4517c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_SPARE_P_INT_EN_MASK 0x7 4527c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_UNMAP_RD_P_INT_EN 28 4537c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_ACC_RD_P_INT_EN 27 4547c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_EBUS_TO_P_LOG_EN 26 4557c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_MB_PEA_P_INT_EN 25 4567c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_MB_PER_P_INT_EN 24 4577c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_MB_PEW_P_INT_EN 23 4587c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_UE_ASYN_P_INT_EN 22 4597c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_CE_ASYN_P_INT_EN 21 4607c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTE_P_INT_EN 20 4617c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JBE_P_INT_EN 19 4627c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JUE_P_INT_EN 18 4637c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_IJP_P_INT_EN 17 4647c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ICISE_P_INT_EN 16 4657c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_CPE_P_INT_EN 15 4667c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_APE_P_INT_EN 14 4677c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_WR_DPE_P_INT_EN 13 4687c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_RD_DPE_P_INT_EN 12 4697c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_BMW_P_INT_EN 11 4707c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_BMR_P_INT_EN 10 4717c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_BJC_P_INT_EN 9 4727c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_UNMAP_P_INT_EN 8 4737c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_DPE_P_INT_EN 7 4747c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_PIO_CPE_P_INT_EN 6 4757c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_ILL_ACC_P_INT_EN 5 4767c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_UNSOL_RD_P_INT_EN 4 4777c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_UNSOL_INTR_P_INT_EN 3 4787c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTCEEW_P_INT_EN 2 4797c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTCEEI_P_INT_EN 1 4807c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_ENABLE_JTCEER_P_INT_EN 0 4817c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS 0x471010 4827c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_SPARE_S 61 4837c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_SPARE_S_MASK 0x7 4847c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_UNMAP_RD_S 60 4857c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_ACC_RD_S 59 4867c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_EBUS_TO_S 58 4877c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_MB_PEA_S 57 4887c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_MB_PER_S 56 4897c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_MB_PEW_S 55 4907c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_UE_ASYN_S 54 4917c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_CE_ASYN_S 53 4927c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTE_S 52 4937c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JBE_S 51 4947c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JUE_S 50 4957c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_IJP_S 49 4967c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ICISE_S 48 4977c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_CPE_S 47 4987c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_APE_S 46 4997c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_WR_DPE_S 45 5007c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_RD_DPE_S 44 5017c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_BMW_S 43 5027c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_BMR_S 42 5037c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_BJC_S 41 5047c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_UNMAP_S 40 5057c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_DPE_S 39 5067c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_CPE_S 38 5077c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_ACC_S 37 5087c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_UNSOL_RD_S 36 5097c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_UNSOL_INTR_S 35 5107c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTCEEW_S 34 5117c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTCEEI_S 33 5127c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTCEER_S 32 5137c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_SPARE_P 29 5147c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_SPARE_P_MASK 0x7 5157c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_UNMAP_RD_P 28 5167c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_ACC_RD_P 27 5177c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_EBUS_TO_P 26 5187c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_MB_PEA_P 25 5197c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_MB_PER_P 24 5207c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_MB_PEW_P 23 5217c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_UE_ASYN_P 22 5227c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_CE_ASYN_P 21 5237c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTE_P 20 5247c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JBE_P 19 5257c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JUE_P 18 5267c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_IJP_P 17 5277c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ICISE_P 16 5287c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_CPE_P 15 5297c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_APE_P 14 5307c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_WR_DPE_P 13 5317c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_RD_DPE_P 12 5327c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_BMW_P 11 5337c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_BMR_P 10 5347c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_BJC_P 9 5357c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_UNMAP_P 8 5367c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_DPE_P 7 5377c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_PIO_CPE_P 6 5387c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_ILL_ACC_P 5 5397c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_UNSOL_RD_P 4 5407c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_UNSOL_INTR_P 3 5417c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTCEEW_P 2 5427c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTCEEI_P 1 5437c478bd9Sstevel@tonic-gate #define JBC_INTERRUPT_STATUS_JTCEER_P 0 5447c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR 0x471018 5457c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_SPARE_S 61 5467c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_SPARE_S_MASK 0x7 5477c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_UNMAP_RD_S 60 5487c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_ACC_RD_S 59 5497c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_EBUS_TO_S 58 5507c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_MB_PEA_S 57 5517c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_MB_PER_S 56 5527c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_MB_PEW_S 55 5537c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_UE_ASYN_S 54 5547c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_CE_ASYN_S 53 5557c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTE_S 52 5567c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JBE_S 51 5577c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JUE_S 50 5587c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_IJP_S 49 5597c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ICISE_S 48 5607c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_CPE_S 47 5617c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_APE_S 46 5627c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_WR_DPE_S 45 5637c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_RD_DPE_S 44 5647c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_BMW_S 43 5657c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_BMR_S 42 5667c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_BJC_S 41 5677c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_UNMAP_S 40 5687c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_DPE_S 39 5697c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_CPE_S 38 5707c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_ACC_S 37 5717c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_UNSOL_RD_S 36 5727c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_UNSOL_INTR_S 35 5737c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTCEEW_S 34 5747c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTCEEI_S 33 5757c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTCEER_S 32 5767c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_SPARE_P 29 5777c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_SPARE_P_MASK 0x7 5787c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_UNMAP_RD_P 28 5797c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_ACC_RD_P 27 5807c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_EBUS_TO_P 26 5817c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_MB_PEA_P 25 5827c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_MB_PER_P 24 5837c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_MB_PEW_P 23 5847c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_UE_ASYN_P 22 5857c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_CE_ASYN_P 21 5867c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTE_P 20 5877c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JBE_P 19 5887c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JUE_P 18 5897c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_IJP_P 17 5907c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ICISE_P 16 5917c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_CPE_P 15 5927c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_APE_P 14 5937c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_WR_DPE_P 13 5947c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_RD_DPE_P 12 5957c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_BMW_P 11 5967c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_BMR_P 10 5977c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_BJC_P 9 5987c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_UNMAP_P 8 5997c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_DPE_P 7 6007c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_PIO_CPE_P 6 6017c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_ILL_ACC_P 5 6027c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_UNSOL_RD_P 4 6037c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_UNSOL_INTR_P 3 6047c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTCEEW_P 2 6057c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTCEEI_P 1 6067c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_CLEAR_JTCEER_P 0 6077c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET 0x471020 6087c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_SPARE_S 61 6097c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_SPARE_S_MASK 0xfc 6107c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_UNMAP_RD_S 60 6117c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_ACC_RD_S 59 6127c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_EBUS_TO_S 58 6137c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_MB_PEA_S 57 6147c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_MB_PER_S 56 6157c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_MB_PEW_S 55 6167c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_UE_ASYN_S 54 6177c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_CE_ASYN_S 53 6187c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTE_S 52 6197c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JBE_S 51 6207c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JUE_S 50 6217c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_IJP_S 49 6227c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ICISE_S 48 6237c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_CPE_S 47 6247c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_APE_S 46 6257c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_WR_DPE_S 45 6267c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_RD_DPE_S 44 6277c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_BMW_S 43 6287c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_BMR_S 42 6297c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_BJC_S 41 6307c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_UNMAP_S 40 6317c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_DPE_S 39 6327c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_CPE_S 38 6337c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_ACC_S 37 6347c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_UNSOL_RD_S 36 6357c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_UNSOL_INTR_S 35 6367c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTCEEW_S 34 6377c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTCEEI_S 33 6387c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTCEER_S 32 6397c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_SPARE_P 29 6407c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_SPARE_P_MASK 0xfc 6417c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_UNMAP_RD_P 28 6427c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_ACC_RD_P 27 6437c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_EBUS_TO_P 26 6447c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_MB_PEA_P 25 6457c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_MB_PER_P 24 6467c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_MB_PEW_P 23 6477c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_UE_ASYN_P 22 6487c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_CE_ASYN_P 21 6497c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTE_P 20 6507c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JBE_P 19 6517c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JUE_P 18 6527c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_IJP_P 17 6537c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ICISE_P 16 6547c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_CPE_P 15 6557c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_APE_P 14 6567c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_WR_DPE_P 13 6577c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_RD_DPE_P 12 6587c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_BMW_P 11 6597c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_BMR_P 10 6607c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_BJC_P 9 6617c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_UNMAP_P 8 6627c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_DPE_P 7 6637c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_PIO_CPE_P 6 6647c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_ILL_ACC_P 5 6657c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_UNSOL_RD_P 4 6667c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_UNSOL_INTR_P 3 6677c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTCEEW_P 2 6687c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTCEEI_P 1 6697c478bd9Sstevel@tonic-gate #define JBC_ERROR_STATUS_SET_JTCEER_P 0 6707c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE 0x471028 6717c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_SPARE_P_INT_EN 26 6727c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_SPARE_P_INT_EN_MASK 0x3 6737c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_MB_PEA_P_INT_EN 25 6747c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_CPE_P_INT_EN 15 6757c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_APE_P_INT_EN 14 6767c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_PIO_CPE_INT_EN 6 6777c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_JTCEEW_P_INT_EN 2 6787c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_JTCEEI_P_INT_EN 1 6797c478bd9Sstevel@tonic-gate #define JBC_FATAL_RESET_ENABLE_JTCEER_P_INT_EN 0 6807c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG 0x471030 6817c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_Q_WORD 54 6827c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_Q_WORD_MASK 0x3 6837c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_TRANSID 48 6847c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_TRANSID_MASK 0x3f 6857c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_ADDRESS 0 6867c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_ADDRESS_MASK 0x7ffffffffff 6877c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_2 0x471038 6887c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_2_ARB_WIN 28 6897c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_2_ARB_WIN_MASK 0xffffff 6907c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_2_J_REQ 21 6917c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_2_J_REQ_MASK 0x7f 6927c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_2_J_PACK 0 6937c478bd9Sstevel@tonic-gate #define JBCINT_IN_TRANSACTION_ERROR_LOG_2_J_PACK_MASK 0x1fffff 6947c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG 0x471040 6957c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_TRANSID 48 6967c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_TRANSID_MASK 0x3f 6977c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_ADDRESS 0 6987c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_ADDRESS_MASK 0x7ffffffffff 6997c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_2 0x471048 7007c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_2_ARB_WIN 28 7017c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_2_ARB_WIN_MASK 0xffffff 7027c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_2_J_REQ 21 7037c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_2_J_REQ_MASK 0x7f 7047c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_2_J_PACK 0 7057c478bd9Sstevel@tonic-gate #define JBCINT_OUT_TRANSACTION_ERROR_LOG_2_J_PACK_MASK 0x1fffff 7067c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_1 0x471050 7077c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_1_DATA 0 7087c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_1_DATA_MASK 0xffffffffffffffff 7097c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_2 0x471058 7107c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_2_ARB_WIN 28 7117c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_2_ARB_WIN_MASK 0xffffff 7127c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_2_J_REQ 21 7137c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_2_J_REQ_MASK 0x7f 7147c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_2_J_PACK 0 7157c478bd9Sstevel@tonic-gate #define FATAL_ERROR_LOG_2_J_PACK_MASK 0x1fffff 7167c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG 0x471060 7177c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_Q_WORD 54 7187c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_Q_WORD_MASK 0x3 7197c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_TRANSID 48 7207c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_TRANSID_MASK 0x3f 7217c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_JBC_TAG 43 7227c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_JBC_TAG_MASK 0x1f 7237c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_ADDRESS 0 7247c478bd9Sstevel@tonic-gate #define MERGE_TRANSACTION_ERROR_LOG_ADDRESS_MASK 0x7ffffffffff 7257c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG 0x471068 7267c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_TRANS_ID 52 7277c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_TRANS_ID_MASK 0x3 7287c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_AID 48 7297c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_AID_MASK 0xf 7307c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_TRANS_TYPE 43 7317c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_TRANS_TYPE_MASK 0x1f 7327c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_ADDRESS 0 7337c478bd9Sstevel@tonic-gate #define DMCINT_ODCD_ERROR_LOG_ADDRESS_MASK 0x7ffffffffff 7347c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG 0x471070 7357c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_DMC_CTAG 16 7367c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_DMC_CTAG_MASK 0xfff 7377c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_TRANSID 14 7387c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_TRANSID_MASK 0x3 7397c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_AGNTID 10 7407c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_AGNTID_MASK 0xf 7417c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_SRCID 5 7427c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_SRCID_MASK 0x1f 7437c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_TARGID 0 7447c478bd9Sstevel@tonic-gate #define DMCINT_IDC_ERROR_LOG_TARGID_MASK 0x1f 7457c478bd9Sstevel@tonic-gate #define CSR_ERROR_LOG 0x471078 7467c478bd9Sstevel@tonic-gate #define CSR_ERROR_LOG_WRITE 42 7477c478bd9Sstevel@tonic-gate #define CSR_ERROR_LOG_BMASK 26 7487c478bd9Sstevel@tonic-gate #define CSR_ERROR_LOG_BMASK_MASK 0xffff 7497c478bd9Sstevel@tonic-gate #define CSR_ERROR_LOG_ADDRESS 0 7507c478bd9Sstevel@tonic-gate #define CSR_ERROR_LOG_ADDRESS_MASK 0x3ffffff 7517c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE 0x471800 7527c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE_JBC 63 7537c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE_CSR 3 7547c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE_MERGE 2 7557c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE_JBCINT 1 7567c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE_DMCINT 0 7577c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_ERROR_STATUS 0x471808 7587c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_ERROR_STATUS_CSR 3 7597c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_ERROR_STATUS_MERGE 2 7607c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_ERROR_STATUS_JBCINT 1 7617c478bd9Sstevel@tonic-gate #define JBC_CORE_AND_BLOCK_ERROR_STATUS_DMCINT 0 7627c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_SELECT 0x472000 7637c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_SELECT_SEL1 8 7647c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_SELECT_SEL1_MASK 0xff 7657c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_SELECT_SEL0 0 7667c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_SELECT_SEL0_MASK 0xff 7677c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_ZERO 0x472008 7687c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_ZERO_CNT 0 7697c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_ZERO_CNT_MASK 0xffffffffffffffff 7707c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_ONE 0x472010 7717c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_ONE_CNT 0 7727c478bd9Sstevel@tonic-gate #define JBC_PERFORMANCE_COUNTER_ONE_CNT_MASK 0xffffffffffffffff 7737c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A 0x473000 7747c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_CORE_SEL 10 7757c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_CORE_SEL_MASK 0x3 7767c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_BLOCK_SEL 6 7777c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_BLOCK_SEL_MASK 0x7 7787c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_SUB_SEL 3 7797c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_SUB_SEL_MASK 0x7 7807c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_SIGNAL_SEL 0 7817c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_A_SIGNAL_SEL_MASK 0x7 7827c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B 0x473008 7837c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_CORE_SEL 10 7847c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_CORE_SEL_MASK 0x3 7857c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_BLOCK_SEL 6 7867c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_BLOCK_SEL_MASK 0x7 7877c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_SUB_SEL 3 7887c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_SUB_SEL_MASK 0x7 7897c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_SIGNAL_SEL 0 7907c478bd9Sstevel@tonic-gate #define FIRE_AND_JBC_DEBUG_SELECT_B_SIGNAL_SEL_MASK 0x7 7917c478bd9Sstevel@tonic-gate 7927c478bd9Sstevel@tonic-gate /* iss.csr ISS module defines */ 7937c478bd9Sstevel@tonic-gate 7947c478bd9Sstevel@tonic-gate #define ISS_CSR_BASE 0x600000 7957c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING 0x1000 7967c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING_ENTRIES 64 7977c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING_ENTRIES_MDO_MODE 63 7987c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING_ENTRIES_V 31 7997c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING_ENTRIES_T_JPID 26 8007c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING_ENTRIES_T_JPID_MASK 0x1f 8017c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING_ENTRIES_INT_CNTRL_NUM 6 8027c478bd9Sstevel@tonic-gate #define INTERRUPT_MAPPING_ENTRIES_INT_CNTRL_NUM_MASK 0xf 8037c478bd9Sstevel@tonic-gate 8047c478bd9Sstevel@tonic-gate /* Reserved 0x1200 - 0x13f8 */ 8057c478bd9Sstevel@tonic-gate 8067c478bd9Sstevel@tonic-gate #define INTERRUPT_CLEAR 0x1400 8077c478bd9Sstevel@tonic-gate #define INTERRUPT_CLEAR_ENTRIES 64 8087c478bd9Sstevel@tonic-gate #define INTERRUPT_CLEAR_ENTRIES_INT_STATE 0 8097c478bd9Sstevel@tonic-gate #define INTERRUPT_CLEAR_ENTRIES_INT_STATE_MASK 0x3 8107c478bd9Sstevel@tonic-gate 8117c478bd9Sstevel@tonic-gate /* Reserved 0x1600 - 0x17f8 */ 8127c478bd9Sstevel@tonic-gate 8137c478bd9Sstevel@tonic-gate 8147c478bd9Sstevel@tonic-gate /* Reserved 0x1808 - 0x19f8 */ 8157c478bd9Sstevel@tonic-gate 8167c478bd9Sstevel@tonic-gate #define INTERRUPT_RETRY_TIMER 0x1a00 8177c478bd9Sstevel@tonic-gate #define INTERRUPT_RETRY_TIMER_LIMIT 0 8187c478bd9Sstevel@tonic-gate #define INTERRUPT_RETRY_TIMER_LIMIT_MASK 0x1ffffff 8197c478bd9Sstevel@tonic-gate 8207c478bd9Sstevel@tonic-gate /* Reserved 0x1a08 - 0x1a08 */ 8217c478bd9Sstevel@tonic-gate 8227c478bd9Sstevel@tonic-gate #define INTERRUPT_STATE_STATUS_1 0x1a10 8237c478bd9Sstevel@tonic-gate #define INTERRUPT_STATE_STATUS_1_STATE 0 8247c478bd9Sstevel@tonic-gate #define INTERRUPT_STATE_STATUS_1_STATE_MASK 0xffffffffffffffff 8257c478bd9Sstevel@tonic-gate #define INTERRUPT_STATE_STATUS_2 0x1a18 8267c478bd9Sstevel@tonic-gate #define INTERRUPT_STATE_STATUS_2_STATE 0 8277c478bd9Sstevel@tonic-gate #define INTERRUPT_STATE_STATUS_2_STATE_MASK 0xffffffffffffffff 8287c478bd9Sstevel@tonic-gate 8297c478bd9Sstevel@tonic-gate /* intx.csr INTX module defines */ 8307c478bd9Sstevel@tonic-gate 8317c478bd9Sstevel@tonic-gate #define INTX_CSR_BASE 0x600000 8327c478bd9Sstevel@tonic-gate #define INTX_STATUS 0xb000 8337c478bd9Sstevel@tonic-gate #define INTX_STATUS_INT_A 3 8347c478bd9Sstevel@tonic-gate #define INTX_STATUS_INT_B 2 8357c478bd9Sstevel@tonic-gate #define INTX_STATUS_INT_C 1 8367c478bd9Sstevel@tonic-gate #define INTX_STATUS_INT_D 0 8377c478bd9Sstevel@tonic-gate #define INT_A_CLEAR 0xb008 8387c478bd9Sstevel@tonic-gate #define INT_A_CLEAR_CLR 0 8397c478bd9Sstevel@tonic-gate #define INT_B_CLEAR 0xb010 8407c478bd9Sstevel@tonic-gate #define INT_B_CLEAR_CLR 0 8417c478bd9Sstevel@tonic-gate #define INT_C_CLEAR 0xb018 8427c478bd9Sstevel@tonic-gate #define INT_C_CLEAR_CLR 0 8437c478bd9Sstevel@tonic-gate #define INT_D_CLEAR 0xb020 8447c478bd9Sstevel@tonic-gate #define INT_D_CLEAR_CLR 0 8457c478bd9Sstevel@tonic-gate 8467c478bd9Sstevel@tonic-gate /* eqs.csr EQS module defines */ 8477c478bd9Sstevel@tonic-gate 8487c478bd9Sstevel@tonic-gate #define EQS_CSR_BASE 0x600000 8497c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_BASE_ADDRESS 0x10000 8507c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_BASE_ADDRESS_ADDRESS 19 8517c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_BASE_ADDRESS_ADDRESS_MASK 0x1fffffffffff 8527c478bd9Sstevel@tonic-gate 8537c478bd9Sstevel@tonic-gate /* Reserved 0x10008 - 0x10ff8 */ 8547c478bd9Sstevel@tonic-gate 8557c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_SET 0x11000 8567c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_SET_ENTRIES 36 8577c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_SET_ENTRIES_ENOVERR 57 8587c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_SET_ENTRIES_EN 44 8597c478bd9Sstevel@tonic-gate 8607c478bd9Sstevel@tonic-gate /* Reserved 0x11120 - 0x111f8 */ 8617c478bd9Sstevel@tonic-gate 8627c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_CLEAR 0x11200 8637c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_CLEAR_ENTRIES 36 8647c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_CLEAR_ENTRIES_COVERR 57 8657c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_CLEAR_ENTRIES_E2I 47 8667c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_CONTROL_CLEAR_ENTRIES_DIS 44 8677c478bd9Sstevel@tonic-gate 8687c478bd9Sstevel@tonic-gate /* Reserved 0x11320 - 0x113f8 */ 8697c478bd9Sstevel@tonic-gate 8707c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_STATE 0x11400 8717c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_STATE_ENTRIES 36 8727c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_STATE_ENTRIES_STATE 0 8737c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_STATE_ENTRIES_STATE_MASK 0x7 8747c478bd9Sstevel@tonic-gate 8757c478bd9Sstevel@tonic-gate /* Reserved 0x11520 - 0x115f8 */ 8767c478bd9Sstevel@tonic-gate 8777c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_TAIL 0x11600 8787c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_TAIL_ENTRIES 36 8797c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_TAIL_ENTRIES_OVERR 57 8807c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_TAIL_ENTRIES_TAIL 0 8817c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_TAIL_ENTRIES_TAIL_MASK 0x7f 8827c478bd9Sstevel@tonic-gate 8837c478bd9Sstevel@tonic-gate /* Reserved 0x11720 - 0x117f8 */ 8847c478bd9Sstevel@tonic-gate 8857c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_HEAD 0x11800 8867c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_HEAD_ENTRIES 36 8877c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_HEAD_ENTRIES_HEAD 0 8887c478bd9Sstevel@tonic-gate #define EVENT_QUEUE_HEAD_ENTRIES_HEAD_MASK 0x7f 8897c478bd9Sstevel@tonic-gate 8907c478bd9Sstevel@tonic-gate /* msi.csr MSI module defines */ 8917c478bd9Sstevel@tonic-gate 8927c478bd9Sstevel@tonic-gate #define MSI_CSR_BASE 0x600000 8937c478bd9Sstevel@tonic-gate #define MSI_MAPPING 0x20000 8947c478bd9Sstevel@tonic-gate #define MSI_MAPPING_ENTRIES 256 8957c478bd9Sstevel@tonic-gate #define MSI_MAPPING_ENTRIES_V 63 8967c478bd9Sstevel@tonic-gate #define MSI_MAPPING_ENTRIES_EQWR_N 62 8977c478bd9Sstevel@tonic-gate #define MSI_MAPPING_ENTRIES_EQNUM 0 8987c478bd9Sstevel@tonic-gate #define MSI_MAPPING_ENTRIES_EQNUM_MASK 0x3f 8997c478bd9Sstevel@tonic-gate 9007c478bd9Sstevel@tonic-gate /* Reserved 0x20800 - 0x27ff8 */ 9017c478bd9Sstevel@tonic-gate 9027c478bd9Sstevel@tonic-gate #define MSI_CLEAR 0x28000 9037c478bd9Sstevel@tonic-gate #define MSI_CLEAR_ENTRIES 256 9047c478bd9Sstevel@tonic-gate #define MSI_CLEAR_ENTRIES_EQWR_N 62 9057c478bd9Sstevel@tonic-gate 9067c478bd9Sstevel@tonic-gate /* Reserved 0x28800 - 0x2bff8 */ 9077c478bd9Sstevel@tonic-gate 9087c478bd9Sstevel@tonic-gate #define INTERRUPT_MONDO_DATA_0 0x2c000 9097c478bd9Sstevel@tonic-gate #define INTERRUPT_MONDO_DATA_0_DATA 6 9107c478bd9Sstevel@tonic-gate #define INTERRUPT_MONDO_DATA_0_DATA_MASK 0x3ffffffffffffff 9117c478bd9Sstevel@tonic-gate #define INTERRUPT_MONDO_DATA_1 0x2c008 9127c478bd9Sstevel@tonic-gate #define INTERRUPT_MONDO_DATA_1_DATA 0 9137c478bd9Sstevel@tonic-gate #define INTERRUPT_MONDO_DATA_1_DATA_MASK 0xffffffffffffffff 9147c478bd9Sstevel@tonic-gate 9157c478bd9Sstevel@tonic-gate /* mess.csr MESS module defines */ 9167c478bd9Sstevel@tonic-gate 9177c478bd9Sstevel@tonic-gate #define MESS_CSR_BASE 0x600000 9187c478bd9Sstevel@tonic-gate #define ERR_COR_MAPPING 0x30000 9197c478bd9Sstevel@tonic-gate #define ERR_COR_MAPPING_V 63 9207c478bd9Sstevel@tonic-gate #define ERR_COR_MAPPING_EQNUM 0 9217c478bd9Sstevel@tonic-gate #define ERR_COR_MAPPING_EQNUM_MASK 0x3f 9227c478bd9Sstevel@tonic-gate #define ERR_NONFATAL_MAPPING 0x30008 9237c478bd9Sstevel@tonic-gate #define ERR_NONFATAL_MAPPING_V 63 9247c478bd9Sstevel@tonic-gate #define ERR_NONFATAL_MAPPING_EQNUM 0 9257c478bd9Sstevel@tonic-gate #define ERR_NONFATAL_MAPPING_EQNUM_MASK 0x3f 9267c478bd9Sstevel@tonic-gate #define ERR_FATAL_MAPPING 0x30010 9277c478bd9Sstevel@tonic-gate #define ERR_FATAL_MAPPING_V 63 9287c478bd9Sstevel@tonic-gate #define ERR_FATAL_MAPPING_EQNUM 0 9297c478bd9Sstevel@tonic-gate #define ERR_FATAL_MAPPING_EQNUM_MASK 0x3f 9307c478bd9Sstevel@tonic-gate #define PM_PME_MAPPING 0x30018 9317c478bd9Sstevel@tonic-gate #define PM_PME_MAPPING_V 63 9327c478bd9Sstevel@tonic-gate #define PM_PME_MAPPING_EQNUM 0 9337c478bd9Sstevel@tonic-gate #define PM_PME_MAPPING_EQNUM_MASK 0x3f 9347c478bd9Sstevel@tonic-gate #define PME_TO_ACK_MAPPING 0x30020 9357c478bd9Sstevel@tonic-gate #define PME_TO_ACK_MAPPING_V 63 9367c478bd9Sstevel@tonic-gate #define PME_TO_ACK_MAPPING_EQNUM 0 9377c478bd9Sstevel@tonic-gate #define PME_TO_ACK_MAPPING_EQNUM_MASK 0x3f 9387c478bd9Sstevel@tonic-gate 9397c478bd9Sstevel@tonic-gate /* ics.csr ICS module defines */ 9407c478bd9Sstevel@tonic-gate 9417c478bd9Sstevel@tonic-gate #define ICS_CSR_BASE 0x600000 9427c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE 0x31000 9437c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_SPARE_LOG_EN 10 9447c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_SPARE_LOG_EN_MASK 0x1f 9457c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_EQ_OVER_LOG_EN 9 9467c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_EQ_NOT_EN_LOG_EN 8 9477c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_MSI_MAL_ERR_LOG_EN 7 9487c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_MSI_PAR_ERR_LOG_EN 6 9497c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_PMEACK_MES_NOT_EN_LOG_EN 5 9507c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_PMPME_MES_NOT_EN_LOG_EN 4 9517c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_FATAL_MES_NOT_EN_LOG_EN 3 9527c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_NONFATAL_MES_NOT_EN_LOG_EN 2 9537c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_COR_MES_NOT_EN_LOG_EN 1 9547c478bd9Sstevel@tonic-gate #define IMU_ERROR_LOG_ENABLE_MSI_NOT_EN_LOG_EN 0 9557c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE 0x31008 9567c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_SPARE_S_INT_EN 42 9577c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_SPARE_S_INT_EN_MASK 0x1f 9587c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_EQ_OVER_S_INT_EN 41 9597c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_EQ_NOT_EN_S_INT_EN 40 9607c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_MSI_MAL_ERR_S_INT_EN 39 9617c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_MSI_PAR_ERR_S_INT_EN 38 9627c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_PMEACK_MES_NOT_EN_S_INT_EN 37 9637c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_PMPME_MES_NOT_EN_S_INT_EN 36 9647c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_FATAL_MES_NOT_EN_S_INT_EN 35 9657c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_NONFATAL_MES_NOT_EN_S_INT_EN 34 9667c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_COR_MES_NOT_EN_S_INT_EN 33 9677c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_MSI_NOT_EN_S_INT_EN 32 9687c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_SPARE_P_INT_EN 10 9697c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_SPARE_P_INT_EN_MASK 0x1f 9707c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_EQ_OVER_P_INT_EN 9 9717c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_EQ_NOT_EN_P_INT_EN 8 9727c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_MSI_MAL_ERR_P_INT_EN 7 9737c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_MSI_PAR_ERR_P_INT_EN 6 9747c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_PMEACK_MES_NOT_EN_P_INT_EN 5 9757c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_PMPME_MES_NOT_EN_P_INT_EN 4 9767c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_FATAL_MES_NOT_EN_P_INT_EN 3 9777c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_NONFATAL_MES_NOT_EN_P_INT_EN 2 9787c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_COR_MES_NOT_EN_P_INT_EN 1 9797c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_ENABLE_MSI_NOT_EN_P_INT_EN 0 9807c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS 0x31010 9817c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_SPARE_S 42 9827c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_SPARE_S_MASK 0x1f 9837c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_EQ_OVER_S 41 9847c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_EQ_NOT_EN_S 40 9857c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_MSI_MAL_ERR_S 39 9867c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_MSI_PAR_ERR_S 38 9877c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_PMEACK_MES_NOT_EN_S 37 9887c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_PMPME_MES_NOT_EN_S 36 9897c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_FATAL_MES_NOT_EN_S 35 9907c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_NONFATAL_MES_NOT_EN_S 34 9917c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_COR_MES_NOT_EN_S 33 9927c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_MSI_NOT_EN_S 32 9937c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_SPARE_P 10 9947c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_SPARE_P_MASK 0x1f 9957c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_EQ_OVER_P 9 9967c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_EQ_NOT_EN_P 8 9977c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_MSI_MAL_ERR_P 7 9987c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_MSI_PAR_ERR_P 6 9997c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_PMEACK_MES_NOT_EN_P 5 10007c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_PMPME_MES_NOT_EN_P 4 10017c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_FATAL_MES_NOT_EN_P 3 10027c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_NONFATAL_MES_NOT_EN_P 2 10037c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_COR_MES_NOT_EN_P 1 10047c478bd9Sstevel@tonic-gate #define IMU_INTERRUPT_STATUS_MSI_NOT_EN_P 0 10057c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR 0x31018 10067c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_SPARE_S 42 10077c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_SPARE_S_MASK 0x1f 10087c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_EQ_OVER_S 41 10097c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_EQ_NOT_EN_S 40 10107c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_MSI_MAL_ERR_S 39 10117c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_MSI_PAR_ERR_S 38 10127c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_PMEACK_MES_NOT_EN_S 37 10137c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_PMPME_MES_NOT_EN_S 36 10147c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_FATAL_MES_NOT_EN_S 35 10157c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_NONFATAL_MES_NOT_EN_S 34 10167c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_COR_MES_NOT_EN_S 33 10177c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_MSI_NOT_EN_S 32 10187c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_SPARE_P 10 10197c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_SPARE_P_MASK 0x1f 10207c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_EQ_OVER_P 9 10217c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_EQ_NOT_EN_P 8 10227c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_MSI_MAL_ERR_P 7 10237c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_MSI_PAR_ERR_P 6 10247c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_PMEACK_MES_NOT_EN_P 5 10257c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_PMPME_MES_NOT_EN_P 4 10267c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_FATAL_MES_NOT_EN_P 3 10277c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_NONFATAL_MES_NOT_EN_P 2 10287c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_COR_MES_NOT_EN_P 1 10297c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_CLEAR_MSI_NOT_EN_P 0 10307c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET 0x31020 10317c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_SPARE_S 42 10327c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_SPARE_S_MASK 0xfa 10337c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_EQ_OVER_S 41 10347c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_EQ_NOT_EN_S 40 10357c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_MSI_MAL_ERR_S 39 10367c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_MSI_PAR_ERR_S 38 10377c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_PMEACK_MES_NOT_EN_S 37 10387c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_PMPME_MES_NOT_EN_S 36 10397c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_FATAL_MES_NOT_EN_S 35 10407c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_NONFATAL_MES_NOT_EN_S 34 10417c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_COR_MES_NOT_EN_S 33 10427c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_MSI_NOT_EN_S 32 10437c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_SPARE_P 10 10447c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_SPARE_P_MASK 0xfa 10457c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_EQ_OVER_P 9 10467c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_EQ_NOT_EN_P 8 10477c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_MSI_MAL_ERR_P 7 10487c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_MSI_PAR_ERR_P 6 10497c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_PMEACK_MES_NOT_EN_P 5 10507c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_PMPME_MES_NOT_EN_P 4 10517c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_FATAL_MES_NOT_EN_P 3 10527c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_NONFATAL_MES_NOT_EN_P 2 10537c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_COR_MES_NOT_EN_P 1 10547c478bd9Sstevel@tonic-gate #define IMU_ERROR_STATUS_SET_MSI_NOT_EN_P 0 10557c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG 0x31028 10567c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_TYPE 58 10577c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_TYPE_MASK 0x3f 10587c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_LENGTH 48 10597c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_LENGTH_MASK 0x3ff 10607c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_REQ_ID 32 10617c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_REQ_ID_MASK 0xffff 10627c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_TLP_TAG 24 10637c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_TLP_TAG_MASK 0xff 10647c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_BE_MESS_CODE 16 10657c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_BE_MESS_CODE_MASK 0xff 10667c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_MSI_DATA 0 10677c478bd9Sstevel@tonic-gate #define IMU_RDS_ERROR_LOG_MSI_DATA_MASK 0xffff 10687c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG 0x31030 10697c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_TYPE 58 10707c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_TYPE_MASK 0x3f 10717c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_LENGTH 48 10727c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_LENGTH_MASK 0x3ff 10737c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_REQ_ID 32 10747c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_REQ_ID_MASK 0xffff 10757c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_TLP_TAG 24 10767c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_TLP_TAG_MASK 0xff 10777c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_BE_MESS_CODE 16 10787c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_BE_MESS_CODE_MASK 0xff 10797c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_EQ_NUM 0 10807c478bd9Sstevel@tonic-gate #define IMU_SCS_ERROR_LOG_EQ_NUM_MASK 0x3f 10817c478bd9Sstevel@tonic-gate #define IMU_EQS_ERROR_LOG 0x31038 10827c478bd9Sstevel@tonic-gate #define IMU_EQS_ERROR_LOG_EQ_NUM 0 10837c478bd9Sstevel@tonic-gate #define IMU_EQS_ERROR_LOG_EQ_NUM_MASK 0x3f 10847c478bd9Sstevel@tonic-gate 10857c478bd9Sstevel@tonic-gate /* Reserved 0x31040 - 0x317f8 */ 10867c478bd9Sstevel@tonic-gate 10877c478bd9Sstevel@tonic-gate #define DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE 0x31800 10887c478bd9Sstevel@tonic-gate #define DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE_DMC 63 10897c478bd9Sstevel@tonic-gate #define DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE_MMU 1 10907c478bd9Sstevel@tonic-gate #define DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE_IMU 0 10917c478bd9Sstevel@tonic-gate #define DMC_CORE_AND_BLOCK_ERROR_STATUS 0x31808 10927c478bd9Sstevel@tonic-gate #define DMC_CORE_AND_BLOCK_ERROR_STATUS_MMU 1 10937c478bd9Sstevel@tonic-gate #define DMC_CORE_AND_BLOCK_ERROR_STATUS_IMU 0 10947c478bd9Sstevel@tonic-gate #define MULTI_CORE_ERROR_STATUS 0x31810 10957c478bd9Sstevel@tonic-gate #define MULTI_CORE_ERROR_STATUS_PEC 1 10967c478bd9Sstevel@tonic-gate #define MULTI_CORE_ERROR_STATUS_DMC 0 10977c478bd9Sstevel@tonic-gate 10987c478bd9Sstevel@tonic-gate /* Reserved 0x31818 - 0x31ff8 */ 10997c478bd9Sstevel@tonic-gate 11007c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_SELECT 0x32000 11017c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_SELECT_SEL1 8 11027c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_SELECT_SEL1_MASK 0xff 11037c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_SELECT_SEL0 0 11047c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_SELECT_SEL0_MASK 0xff 11057c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_ZERO 0x32008 11067c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_ZERO_CNT 0 11077c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_ZERO_CNT_MASK 0xffffffffffffffff 11087c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_ONE 0x32010 11097c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_ONE_CNT 0 11107c478bd9Sstevel@tonic-gate #define IMU_PERFORMANCE_COUNTER_ONE_CNT_MASK 0xffffffffffffffff 11117c478bd9Sstevel@tonic-gate 11127c478bd9Sstevel@tonic-gate /* Reserved 0x32018 - 0x33ff8 */ 11137c478bd9Sstevel@tonic-gate 11147c478bd9Sstevel@tonic-gate #define MSI_32_BIT_ADDRESS 0x34000 11157c478bd9Sstevel@tonic-gate #define MSI_32_BIT_ADDRESS_ADDR 16 11167c478bd9Sstevel@tonic-gate #define MSI_32_BIT_ADDRESS_ADDR_MASK 0xffff 11177c478bd9Sstevel@tonic-gate #define MSI_64_BIT_ADDRESS 0x34008 11187c478bd9Sstevel@tonic-gate #define MSI_64_BIT_ADDRESS_ADDR 16 11197c478bd9Sstevel@tonic-gate #define MSI_64_BIT_ADDRESS_ADDR_MASK 0xffffffffffff 11207c478bd9Sstevel@tonic-gate 11217c478bd9Sstevel@tonic-gate /* Reserved 0x34010 - 0x34010 */ 11227c478bd9Sstevel@tonic-gate 11237c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET 0x34018 11247c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_ADDR 24 11257c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_ADDR_MASK 0xffffffffff 11267c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_7 23 11277c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_6 22 11287c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_5 21 11297c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_4 20 11307c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_3 19 11317c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_2 18 11327c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_1 17 11337c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_LOAD_0 16 11347c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL 8 11357c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_CONTROL_MASK 0xff 11367c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_STATUS 0 11377c478bd9Sstevel@tonic-gate #define MEM_64_PCIE_OFFSET_SPARE_STATUS_MASK 0xff 11387c478bd9Sstevel@tonic-gate 11397c478bd9Sstevel@tonic-gate /* csr.csr CSR module defines */ 11407c478bd9Sstevel@tonic-gate 11417c478bd9Sstevel@tonic-gate #define CSR_CSR_BASE 0x600000 11427c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS 0x40000 11437c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_SPARES 48 11447c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_SPARES_MASK 0xf 11457c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_PAQ 45 11467c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_VAQ 44 11477c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_TPL 43 11487c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_TIP 42 11497c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_TCM 40 11507c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_TCM_MASK 0x3 1151*a616a11eSLida.Horn #define MMU_CONTROL_AND_STATUS_ROE 16 1152*a616a11eSLida.Horn #define MMU_CONTROL_AND_STATUS_ROE_MASK 0x7 1153*a616a11eSLida.Horn #define MMU_CONTROL_AND_STATUS_ROE_BIT63_ENABLE (1 << 2) 1154*a616a11eSLida.Horn #define MMU_CONTROL_AND_STATUS_ROE_BIT43_ENABLE (1 << 1) 1155*a616a11eSLida.Horn #define MMU_CONTROL_AND_STATUS_ROE_BIT35_ENABLE (1 << 0) 11567c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_PD 12 11577c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_SE 10 11587c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_CM 8 11597c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_CM_MASK 0x3 11607c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_BE 1 11617c478bd9Sstevel@tonic-gate #define MMU_CONTROL_AND_STATUS_TE 0 11627c478bd9Sstevel@tonic-gate #define MMU_TSB_CONTROL 0x40008 11637c478bd9Sstevel@tonic-gate #define MMU_TSB_CONTROL_TB 13 11647c478bd9Sstevel@tonic-gate #define MMU_TSB_CONTROL_TB_MASK 0x3fffffff 11657c478bd9Sstevel@tonic-gate #define MMU_TSB_CONTROL_PS 8 11667c478bd9Sstevel@tonic-gate #define MMU_TSB_CONTROL_TS 0 11677c478bd9Sstevel@tonic-gate #define MMU_TSB_CONTROL_TS_MASK 0xf 11687c478bd9Sstevel@tonic-gate 11697c478bd9Sstevel@tonic-gate /* Reserved 0x40010 - 0x400f8 */ 11707c478bd9Sstevel@tonic-gate 11717c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_FLUSH_ADDRESS 0x40100 11727c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_FLUSH_ADDRESS_FLSH_ADDR 6 11737c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_FLUSH_ADDRESS_FLSH_ADDR_MASK 0x1fffffffff 11747c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_INVALIDATE 0x40108 11757c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_INVALIDATE_FLSH_TTE 0 11767c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_INVALIDATE_FLSH_TTE_MASK 0xffffffffffffffff 11777c478bd9Sstevel@tonic-gate 11787c478bd9Sstevel@tonic-gate /* Reserved 0x40110 - 0x40ff8 */ 11797c478bd9Sstevel@tonic-gate 11807c478bd9Sstevel@tonic-gate #define MMU_ERROR_LOG_ENABLE 0x41000 11817c478bd9Sstevel@tonic-gate #define MMU_ERROR_LOG_ENABLE_EN 0 11827c478bd9Sstevel@tonic-gate #define MMU_ERROR_LOG_ENABLE_EN_MASK 0xffff 11837c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_ENABLE 0x41008 11847c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_ENABLE_EN_S 32 11857c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_ENABLE_EN_S_MASK 0xffff 11867c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_ENABLE_EN_P 0 11877c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_ENABLE_EN_P_MASK 0xffff 11887c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_STATUS 0x41010 11897c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_STATUS_ERR_S 32 11907c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_STATUS_ERR_S_MASK 0xffff 11917c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_STATUS_ERR_P 0 11927c478bd9Sstevel@tonic-gate #define MMU_INTERRUPT_STATUS_ERR_P_MASK 0xffff 1193f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_DPE_S 47 1194f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_ERR_S 46 1195f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_UDE_S 45 1196f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_DME_S 44 1197f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE3_S 43 1198f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE2_S 42 1199f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTC_CAE_S 41 1200f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTC_DPE_S 40 1201f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTE_PRT_S 39 1202f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTE_INV_S 38 1203f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TRN_OOR_S 37 1204f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TRN_ERR_S 36 1205f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE1_S 35 1206f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE0_S 34 1207f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_BYP_OOR_S 33 1208f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_BYP_ERR_S 32 1209f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_DPE_P 15 1210f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_ERR_P 14 1211f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_UDE_P 13 1212f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TBW_DME_P 12 1213f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE3_P 11 1214f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE2_P 10 1215f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTC_CAE_P 9 1216f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTC_DPE_P 8 1217f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTE_PRT_P 7 1218f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TTE_INV_P 6 1219f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TRN_OOR_P 5 1220f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_TRN_ERR_P 4 1221f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE1_P 3 1222f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_SPARE0_P 2 1223f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_BYP_OOR_P 1 1224f8d2de6bSjchu #define MMU_INTERRUPT_STATUS_BYP_ERR_P 0 12257c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR 0x41018 12267c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_DPE_S 47 12277c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_ERR_S 46 12287c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_UDE_S 45 12297c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_DME_S 44 12307c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE3_S 43 12317c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE2_S 42 12327c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTC_CAE_S 41 12337c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTC_DPE_S 40 12347c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTE_PRT_S 39 12357c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTE_INV_S 38 12367c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TRN_OOR_S 37 12377c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TRN_ERR_S 36 12387c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE1_S 35 12397c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE0_S 34 12407c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_BYP_OOR_S 33 12417c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_BYP_ERR_S 32 12427c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_DPE_P 15 12437c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_ERR_P 14 12447c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_UDE_P 13 12457c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TBW_DME_P 12 12467c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE3_P 11 12477c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE2_P 10 12487c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTC_CAE_P 9 12497c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTC_DPE_P 8 12507c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTE_PRT_P 7 12517c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TTE_INV_P 6 12527c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TRN_OOR_P 5 12537c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_TRN_ERR_P 4 12547c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE1_P 3 12557c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_SPARE0_P 2 12567c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_BYP_OOR_P 1 12577c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_CLEAR_BYP_ERR_P 0 12587c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET 0x41020 12597c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_DPE_S 47 12607c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_ERR_S 46 12617c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_UDE_S 45 12627c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_DME_S 44 12637c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE3_S 43 12647c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE2_S 42 12657c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTC_CAE_S 41 12667c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTC_DPE_S 40 12677c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTE_PRT_S 39 12687c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTE_INV_S 38 12697c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TRN_OOR_S 37 12707c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TRN_ERR_S 36 12717c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE1_S 35 12727c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE0_S 34 12737c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_BYP_OOR_S 33 12747c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_BYP_ERR_S 32 12757c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_DPE_P 15 12767c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_ERR_P 14 12777c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_UDE_P 13 12787c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TBW_DME_P 12 12797c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE3_P 11 12807c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE2_P 10 12817c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTC_CAE_P 9 12827c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTC_DPE_P 8 12837c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTE_PRT_P 7 12847c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TTE_INV_P 6 12857c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TRN_OOR_P 5 12867c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_TRN_ERR_P 4 12877c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE1_P 3 12887c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_SPARE0_P 2 12897c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_BYP_OOR_P 1 12907c478bd9Sstevel@tonic-gate #define MMU_ERROR_STATUS_SET_BYP_ERR_P 0 12917c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_ADDRESS 0x41028 12927c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_ADDRESS_VA 2 12937c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_ADDRESS_VA_MASK 0x3fffffffffffffff 12947c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_STATUS 0x41030 12957c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_STATUS_ENTRY 32 12967c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_STATUS_ENTRY_MASK 0x1ff 12977c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_STATUS_TYPE 16 12987c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_STATUS_TYPE_MASK 0x7f 12997c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_STATUS_ID 0 13007c478bd9Sstevel@tonic-gate #define MMU_TRANSLATION_FAULT_STATUS_ID_MASK 0xffff 13017c478bd9Sstevel@tonic-gate 13027c478bd9Sstevel@tonic-gate /* Reserved 0x41038 - 0x41ff8 */ 13037c478bd9Sstevel@tonic-gate 13047c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_SELECT 0x42000 13057c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_SELECT_SEL1 8 13067c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_SELECT_SEL1_MASK 0xff 13077c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_SELECT_SEL0 0 13087c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_SELECT_SEL0_MASK 0xff 13097c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_ZERO 0x42008 13107c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_ZERO_CNT 0 13117c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_ZERO_CNT_MASK 0xffffffffffffffff 13127c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_ONE 0x42010 13137c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_ONE_CNT 0 13147c478bd9Sstevel@tonic-gate #define MMU_PERFORMANCE_COUNTER_ONE_CNT_MASK 0xffffffffffffffff 13157c478bd9Sstevel@tonic-gate 13167c478bd9Sstevel@tonic-gate /* Reserved 0x42018 - 0x43ff8 */ 13177c478bd9Sstevel@tonic-gate 13187c478bd9Sstevel@tonic-gate 13197c478bd9Sstevel@tonic-gate /* Reserved 0x44008 - 0x45ff8 */ 13207c478bd9Sstevel@tonic-gate 13217c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_VIRTUAL_TAG 0x46000 13227c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_VIRTUAL_TAG_ENTRIES 64 13237c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_VIRTUAL_TAG_ENTRIES_CNT 32 13247c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_VIRTUAL_TAG_ENTRIES_CNT_MASK 0xfff 13257c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_VIRTUAL_TAG_ENTRIES_TAG 16 13267c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_VIRTUAL_TAG_ENTRIES_TAG_MASK 0xffff 13277c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_VIRTUAL_TAG_ENTRIES_VLD 0 13287c478bd9Sstevel@tonic-gate 13297c478bd9Sstevel@tonic-gate /* Reserved 0x46200 - 0x46ff8 */ 13307c478bd9Sstevel@tonic-gate 13317c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_PHYSICAL_TAG 0x47000 13327c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_PHYSICAL_TAG_ENTRIES 64 13337c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_PHYSICAL_TAG_ENTRIES_TAG 6 13347c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_PHYSICAL_TAG_ENTRIES_TAG_MASK 0x1fffffffff 13357c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_PHYSICAL_TAG_ENTRIES_VLD 0 13367c478bd9Sstevel@tonic-gate 13377c478bd9Sstevel@tonic-gate /* Reserved 0x47200 - 0x47ff8 */ 13387c478bd9Sstevel@tonic-gate 13397c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA 0x48000 13407c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA_ENTRIES 512 13417c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA_ENTRIES_PAR 60 13427c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA_ENTRIES_PAR_MASK 0xf 13437c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA_ENTRIES_PPN 13 13447c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA_ENTRIES_PPN_MASK 0x3fffffff 13457c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA_ENTRIES_WRT 1 13467c478bd9Sstevel@tonic-gate #define MMU_TTE_CACHE_DATA_ENTRIES_VLD 0 13477c478bd9Sstevel@tonic-gate 13487c478bd9Sstevel@tonic-gate /* cib.csr CIB module defines */ 13497c478bd9Sstevel@tonic-gate 13507c478bd9Sstevel@tonic-gate #define CIB_CSR_BASE 0x600000 13517c478bd9Sstevel@tonic-gate 13527c478bd9Sstevel@tonic-gate /* Reserved 0x50008 - 0x50ff8 */ 13537c478bd9Sstevel@tonic-gate 13547c478bd9Sstevel@tonic-gate #define ILU_ERROR_LOG_ENABLE 0x51000 13557c478bd9Sstevel@tonic-gate #define ILU_ERROR_LOG_ENABLE_SPARE3 7 13567c478bd9Sstevel@tonic-gate #define ILU_ERROR_LOG_ENABLE_SPARE2 6 13577c478bd9Sstevel@tonic-gate #define ILU_ERROR_LOG_ENABLE_SPARE1 5 13587c478bd9Sstevel@tonic-gate #define ILU_ERROR_LOG_ENABLE_IHB_PE 4 13597c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE 0x51008 13607c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_SPARE3_S 39 13617c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_SPARE2_S 38 13627c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_SPARE1_S 37 13637c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_IHB_PE_S 36 13647c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_SPARE3_P 7 13657c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_SPARE2_P 6 13667c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_SPARE1_P 5 13677c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_ENABLE_IHB_PE_P 4 13687c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS 0x51010 13697c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_SPARE3_S 39 13707c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_SPARE2_S 38 13717c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_SPARE1_S 37 13727c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_IHB_PE_S 36 13737c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_SPARE3_P 7 13747c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_SPARE2_P 6 13757c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_SPARE1_P 5 13767c478bd9Sstevel@tonic-gate #define ILU_INTERRUPT_STATUS_IHB_PE_P 4 13777c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR 0x51018 13787c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_SPARE3_S 39 13797c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_SPARE2_S 38 13807c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_SPARE1_S 37 13817c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_IHB_PE_S 36 13827c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_SPARE3_P 7 13837c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_SPARE2_P 6 13847c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_SPARE1_P 5 13857c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_CLEAR_IHB_PE_P 4 13867c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET 0x51020 13877c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_SPARE3_S 39 13887c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_SPARE2_S 38 13897c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_SPARE1_S 37 13907c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_IHB_PE_S 36 13917c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_SPARE3_P 7 13927c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_SPARE2_P 6 13937c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_SPARE1_P 5 13947c478bd9Sstevel@tonic-gate #define ILU_ERROR_STATUS_SET_IHB_PE_P 4 13957c478bd9Sstevel@tonic-gate 13967c478bd9Sstevel@tonic-gate /* Reserved 0x51028 - 0x517f8 */ 13977c478bd9Sstevel@tonic-gate 13987c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_ENABLE 0x51800 13997c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_ENABLE_PEC 63 14007c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_ENABLE_PEC_ILU 3 14017c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_ENABLE_PEC_UE 2 14027c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_ENABLE_PEC_CE 1 14037c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_ENABLE_PEC_OE 0 14047c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_STATUS 0x51808 14057c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_STATUS_ILU 3 14067c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_STATUS_UE 2 14077c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_STATUS_CE 1 14087c478bd9Sstevel@tonic-gate #define PEC_CORE_AND_BLOCK_INTERRUPT_STATUS_OE 0 14097c478bd9Sstevel@tonic-gate 14107c478bd9Sstevel@tonic-gate /* Reserved 0x51810 - 0x51ff8 */ 14117c478bd9Sstevel@tonic-gate 14127c478bd9Sstevel@tonic-gate #define ILU_DEVICE_CAPABILITIES 0x52000 14137c478bd9Sstevel@tonic-gate #define ILU_DEVICE_CAPABILITIES_ESTAR 0 14147c478bd9Sstevel@tonic-gate 14157c478bd9Sstevel@tonic-gate /* cru.csr CRU module defines */ 14167c478bd9Sstevel@tonic-gate 14177c478bd9Sstevel@tonic-gate #define CRU_CSR_BASE 0x600000 14187c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_A 0x53000 14197c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_A_BLOCK_SEL 6 14207c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_A_BLOCK_SEL_MASK 0xf 14217c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_A_SUB_SEL 3 14227c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_A_SUB_SEL_MASK 0x7 14237c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_A_SIGNAL_SEL 0 14247c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_A_SIGNAL_SEL_MASK 0x7 14257c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_B 0x53008 14267c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_B_BLOCK_SEL 6 14277c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_B_BLOCK_SEL_MASK 0xf 14287c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_B_SUB_SEL 3 14297c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_B_SUB_SEL_MASK 0x7 14307c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_B_SIGNAL_SEL 0 14317c478bd9Sstevel@tonic-gate #define DMC_DEBUG_SELECT_FOR_PORT_B_SIGNAL_SEL_MASK 0x7 14327c478bd9Sstevel@tonic-gate 14337c478bd9Sstevel@tonic-gate /* Reserved 0x53010 - 0x530f8 */ 14347c478bd9Sstevel@tonic-gate 14357c478bd9Sstevel@tonic-gate #define DMC_PCI_EXPRESS_CONFIGURATION 0x53100 14367c478bd9Sstevel@tonic-gate #define DMC_PCI_EXPRESS_CONFIGURATION_BUS_NUM 24 14377c478bd9Sstevel@tonic-gate #define DMC_PCI_EXPRESS_CONFIGURATION_BUS_NUM_MASK 0xff 14387c478bd9Sstevel@tonic-gate #define DMC_PCI_EXPRESS_CONFIGURATION_REQ_ID 0 14397c478bd9Sstevel@tonic-gate #define DMC_PCI_EXPRESS_CONFIGURATION_REQ_ID_MASK 0xffff 14407c478bd9Sstevel@tonic-gate 14417c478bd9Sstevel@tonic-gate /* psb.csr PSB module defines */ 14427c478bd9Sstevel@tonic-gate 14437c478bd9Sstevel@tonic-gate #define PSB_CSR_BASE 0x600000 14447c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_DMA_SET 0x60000 14457c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_DMA_SET_ENTRIES 32 14467c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_DMA_SET_ENTRIES_ENTRY 0 14477c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_DMA_SET_ENTRIES_ENTRY_MASK 0x1ffffffffff 14487c478bd9Sstevel@tonic-gate 14497c478bd9Sstevel@tonic-gate /* Reserved 0x60100 - 0x63ff8 */ 14507c478bd9Sstevel@tonic-gate 14517c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_PIO_SET 0x64000 14527c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_PIO_SET_ENTRIES 16 14537c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_PIO_SET_ENTRIES_ENTRY 0 14547c478bd9Sstevel@tonic-gate #define PACKET_SCOREBOARD_PIO_SET_ENTRIES_ENTRY_MASK 0x3f 14557c478bd9Sstevel@tonic-gate 14567c478bd9Sstevel@tonic-gate /* tsb.csr TSB module defines */ 14577c478bd9Sstevel@tonic-gate 14587c478bd9Sstevel@tonic-gate #define TSB_CSR_BASE 0x600000 14597c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_SET 0x70000 14607c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_SET_ENTRIES 32 14617c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_SET_ENTRIES_ENTRY 0 14627c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_SET_ENTRIES_ENTRY_MASK 0xffffffffffff 14637c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_STATUS 0x70100 14647c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_STATUS_FULL 7 14657c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_STATUS_NUM_PND_DMA 1 14667c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_STATUS_NUM_PND_DMA_MASK 0x3f 14677c478bd9Sstevel@tonic-gate #define TRANSACTION_SCOREBOARD_STATUS_EMPTY 0 14687c478bd9Sstevel@tonic-gate 14697c478bd9Sstevel@tonic-gate /* tlr.csr TLR module defines */ 14707c478bd9Sstevel@tonic-gate 14717c478bd9Sstevel@tonic-gate #define TLR_CSR_BASE 0x600000 14727c478bd9Sstevel@tonic-gate #define TLU_CONTROL 0x80000 14737c478bd9Sstevel@tonic-gate #define TLU_CONTROL_L0S_TIM 24 14747c478bd9Sstevel@tonic-gate #define TLU_CONTROL_L0S_TIM_MASK 0xff 14757c478bd9Sstevel@tonic-gate #define TLU_CONTROL_NPWR_EN 20 14767c478bd9Sstevel@tonic-gate #define TLU_CONTROL_CTO_SEL 16 14777c478bd9Sstevel@tonic-gate #define TLU_CONTROL_CTO_SEL_MASK 0x7 14787c478bd9Sstevel@tonic-gate #define TLU_CONTROL_CONFIG 0 14797c478bd9Sstevel@tonic-gate #define TLU_CONTROL_CONFIG_MASK 0xffff 14807c478bd9Sstevel@tonic-gate #define TLU_STATUS 0x80008 14817c478bd9Sstevel@tonic-gate #define TLU_STATUS_DRAIN 8 14827c478bd9Sstevel@tonic-gate #define TLU_STATUS_STATUS 0 14837c478bd9Sstevel@tonic-gate #define TLU_STATUS_STATUS_MASK 0xff 14847c478bd9Sstevel@tonic-gate #define TLU_PME_TURN_OFF_GENERATE 0x80010 14857c478bd9Sstevel@tonic-gate #define TLU_PME_TURN_OFF_GENERATE_PTO 0 14867c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL 0x80018 14877c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_CHC 52 14887c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_CHC_MASK 0xff 14897c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_CDC 40 14907c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_CDC_MASK 0xfff 14917c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_NHC 32 14927c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_NHC_MASK 0xff 14937c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_NDC 20 14947c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_NDC_MASK 0xfff 14957c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_PHC 12 14967c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_PHC_MASK 0xff 14977c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_PDC 0 14987c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_INITIAL_PDC_MASK 0xfff 14997c478bd9Sstevel@tonic-gate 15007c478bd9Sstevel@tonic-gate /* Reserved 0x80020 - 0x800f8 */ 15017c478bd9Sstevel@tonic-gate 15027c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC 0x80100 15037c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_LNK_MAX 48 15047c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_LNK_MAX_MASK 0x3f 15057c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_CHK_DIS 32 15067c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_CHK_DIS_MASK 0xffff 15077c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_EPI_PAR 16 15087c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_EPI_PAR_MASK 0xff 15097c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_IDI_PAR 12 15107c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_IDI_PAR_MASK 0xf 15117c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_IHI_PAR 8 15127c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_IHI_PAR_MASK 0xf 15137c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_EPI_TRG 7 15147c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_IDI_TRG 6 15157c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_IHI_TRG 5 15167c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_MRC_TRG 4 15177c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_EPP_DIS 1 15187c478bd9Sstevel@tonic-gate #define TLU_DIAGNOSTIC_IFC_DIS 0 15197c478bd9Sstevel@tonic-gate 15207c478bd9Sstevel@tonic-gate /* Reserved 0x80108 - 0x801f8 */ 15217c478bd9Sstevel@tonic-gate 15227c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED 0x80200 15237c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_CHI 62 15247c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_NHI 61 15257c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_PHI 60 15267c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_CHC 52 15277c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_CHC_MASK 0xff 15287c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_CDC 40 15297c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_CDC_MASK 0xfff 15307c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_NHC 32 15317c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_NHC_MASK 0xff 15327c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_NDC 20 15337c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_NDC_MASK 0xfff 15347c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_PHC 12 15357c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_PHC_MASK 0xff 15367c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_PDC 0 15377c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDITS_CONSUMED_PDC_MASK 0xfff 15387c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT 0x80208 15397c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_CDI 62 15407c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_NDI 61 15417c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_PDI 60 15427c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_CHC 52 15437c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_CHC_MASK 0xff 15447c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_CDC 40 15457c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_CDC_MASK 0xfff 15467c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_NHC 32 15477c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_NHC_MASK 0xff 15487c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_NDC 20 15497c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_NDC_MASK 0xfff 15507c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_PHC 12 15517c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_PHC_MASK 0xff 15527c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_PDC 0 15537c478bd9Sstevel@tonic-gate #define TLU_EGRESS_CREDIT_LIMIT_PDC_MASK 0xfff 15547c478bd9Sstevel@tonic-gate #define TLU_EGRESS_RETRY_BUFFER 0x80210 15557c478bd9Sstevel@tonic-gate #define TLU_EGRESS_RETRY_BUFFER_CC 32 15567c478bd9Sstevel@tonic-gate #define TLU_EGRESS_RETRY_BUFFER_CC_MASK 0xffff 15577c478bd9Sstevel@tonic-gate #define TLU_EGRESS_RETRY_BUFFER_CL 0 15587c478bd9Sstevel@tonic-gate #define TLU_EGRESS_RETRY_BUFFER_CL_MASK 0xffff 15597c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED 0x80218 15607c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_CHC 52 15617c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_CHC_MASK 0xff 15627c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_CDC 40 15637c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_CDC_MASK 0xfff 15647c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_NHC 32 15657c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_NHC_MASK 0xff 15667c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_NDC 20 15677c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_NDC_MASK 0xfff 15687c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_PHC 12 15697c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_PHC_MASK 0xff 15707c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_PDC 0 15717c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_ALLOCATED_PDC_MASK 0xfff 15727c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED 0x80220 15737c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_CHC 52 15747c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_CHC_MASK 0xff 15757c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_CDC 40 15767c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_CDC_MASK 0xfff 15777c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_NHC 32 15787c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_NHC_MASK 0xff 15797c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_NDC 20 15807c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_NDC_MASK 0xfff 15817c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_PHC 12 15827c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_PHC_MASK 0xff 15837c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_PDC 0 15847c478bd9Sstevel@tonic-gate #define TLU_INGRESS_CREDITS_RECEIVED_PDC_MASK 0xfff 15857c478bd9Sstevel@tonic-gate 15867c478bd9Sstevel@tonic-gate /* Reserved 0x80228 - 0x80ff8 */ 15877c478bd9Sstevel@tonic-gate 15887c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_LOG_ENABLE 0x81000 15897c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_LOG_ENABLE_EN 0 15907c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_LOG_ENABLE_EN_MASK 0xffffff 15917c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_ENABLE 0x81008 15927c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_ENABLE_EN_S 32 15937c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_ENABLE_EN_S_MASK 0xffffff 15947c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_ENABLE_EN_P 0 15957c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_ENABLE_EN_P_MASK 0xffffff 15967c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_STATUS 0x81010 15977c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_STATUS_ERR_S 32 15987c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_STATUS_ERR_S_MASK 0xffffff 15997c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_STATUS_ERR_P 0 16007c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_INTERRUPT_STATUS_ERR_P_MASK 0xffffff 16017c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR 0x81018 16027c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_SPARE_S 55 16037c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_MFC_S 54 16047c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_CTO_S 53 16057c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_NFP_S 52 16067c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LWC_S 51 16077c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_MRC_S 50 16087c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_WUC_S 49 16097c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_RUC_S 48 16107c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_CRS_S 47 16117c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_IIP_S 46 16127c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EDP_S 45 16137c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EHP_S 44 16147c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LIN_S 43 16157c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LRS_S 42 16167c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LDN_S 41 16177c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LUP_S 40 16187c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LPU_S 38 16197c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LPU_S_MASK 0x3 16207c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_ERU_S 37 16217c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_ERO_S 36 16227c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EMP_S 35 16237c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EPE_S 34 16247c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_ERP_S 33 16257c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EIP_S 32 16267c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_SPARE_P 23 16277c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_MFC_P 22 16287c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_CTO_P 21 16297c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_NFP_P 20 16307c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LWC_P 19 16317c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_MRC_P 18 16327c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_WUC_P 17 16337c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_RUC_P 16 16347c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_CRS_P 15 16357c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_IIP_P 14 16367c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EDP_P 13 16377c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EHP_P 12 16387c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LIN_P 11 16397c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LRS_P 10 16407c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LDN_P 9 16417c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LUP_P 8 16427c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LPU_P 6 16437c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_LPU_P_MASK 0x3 16447c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_ERU_P 5 16457c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_ERO_P 4 16467c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EMP_P 3 16477c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EPE_P 2 16487c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_ERP_P 1 16497c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_CLEAR_EIP_P 0 16507c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET 0x81020 16517c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_SPARE_S 55 16527c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_MFC_S 54 16537c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_CTO_S 53 16547c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_NFP_S 52 16557c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LWC_S 51 16567c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_MRC_S 50 16577c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_WUC_S 49 16587c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_RUC_S 48 16597c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_CRS_S 47 16607c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_IIP_S 46 16617c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EDP_S 45 16627c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EHP_S 44 16637c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LIN_S 43 16647c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LRS_S 42 16657c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LDN_S 41 16667c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LUP_S 40 16677c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LPU_S 38 16687c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LPU_S_MASK 0xfd 16697c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_ERU_S 37 16707c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_ERO_S 36 16717c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EMP_S 35 16727c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EPE_S 34 16737c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_ERP_S 33 16747c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EIP_S 32 16757c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_SPARE_P 23 16767c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_MFC_P 22 16777c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_CTO_P 21 16787c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_NFP_P 20 16797c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LWC_P 19 16807c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_MRC_P 18 16817c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_WUC_P 17 16827c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_RUC_P 16 16837c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_CRS_P 15 16847c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_IIP_P 14 16857c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EDP_P 13 16867c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EHP_P 12 16877c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LIN_P 11 16887c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LRS_P 10 16897c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LDN_P 9 16907c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LUP_P 8 16917c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LPU_P 6 16927c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_LPU_P_MASK 0xfd 16937c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_ERU_P 5 16947c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_ERO_P 4 16957c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EMP_P 3 16967c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EPE_P 2 16977c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_ERP_P 1 16987c478bd9Sstevel@tonic-gate #define TLU_OTHER_EVENT_STATUS_SET_EIP_P 0 16997c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_OTHER_EVENT_HEADER1_LOG 0x81028 17007c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_OTHER_EVENT_HEADER1_LOG_HDR 0 17017c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_OTHER_EVENT_HEADER1_LOG_HDR_MASK 0xffffffffffffffff 17027c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_OTHER_EVENT_HEADER2_LOG 0x81030 17037c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_OTHER_EVENT_HEADER2_LOG_HDR 0 17047c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_OTHER_EVENT_HEADER2_LOG_HDR_MASK 0xffffffffffffffff 17057c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_OTHER_EVENT_HEADER1_LOG 0x81038 17067c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_OTHER_EVENT_HEADER1_LOG_HDR 0 17077c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_OTHER_EVENT_HEADER1_LOG_HDR_MASK 0xffffffffffffffff 17087c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_OTHER_EVENT_HEADER2_LOG 0x81040 17097c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_OTHER_EVENT_HEADER2_LOG_HDR 0 17107c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_OTHER_EVENT_HEADER2_LOG_HDR_MASK 0xffffffffffffffff 17117c478bd9Sstevel@tonic-gate 17127c478bd9Sstevel@tonic-gate /* Reserved 0x81048 - 0x81ff8 */ 17137c478bd9Sstevel@tonic-gate 17147c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_SELECT 0x82000 17157c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_SELECT_SEL2 16 17167c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_SELECT_SEL2_MASK 0x3 17177c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_SELECT_SEL1 8 17187c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_SELECT_SEL1_MASK 0xff 17197c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_SELECT_SEL0 0 17207c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_SELECT_SEL0_MASK 0xff 17217c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_ZERO 0x82008 17227c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_ZERO_CNT 0 17237c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_ZERO_CNT_MASK 0xffffffffffffffff 17247c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_ONE 0x82010 17257c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_ONE_CNT 0 17267c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_ONE_CNT_MASK 0xffffffffffffffff 17277c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_TWO 0x82018 17287c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_TWO_CNT 0 17297c478bd9Sstevel@tonic-gate #define TLU_PERFORMANCE_COUNTER_TWO_CNT_MASK 0xffffffff 17307c478bd9Sstevel@tonic-gate 17317c478bd9Sstevel@tonic-gate /* Reserved 0x82020 - 0x82ff8 */ 17327c478bd9Sstevel@tonic-gate 17337c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_A 0x83000 17347c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_A_BLOCK 6 17357c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_A_BLOCK_MASK 0x7 17367c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_A_MODULE 3 17377c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_A_MODULE_MASK 0x7 17387c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_A_SIGNAL 0 17397c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_A_SIGNAL_MASK 0x7 17407c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_B 0x83008 17417c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_B_BLOCK 6 17427c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_B_BLOCK_MASK 0x7 17437c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_B_MODULE 3 17447c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_B_MODULE_MASK 0x7 17457c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_B_SIGNAL 0 17467c478bd9Sstevel@tonic-gate #define TLU_DEBUG_SELECT_B_SIGNAL_MASK 0x7 17477c478bd9Sstevel@tonic-gate 17487c478bd9Sstevel@tonic-gate /* Reserved 0x83010 - 0x8fff8 */ 17497c478bd9Sstevel@tonic-gate 17507c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CAPABILITIES 0x90000 17517c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CAPABILITIES_L1 9 17527c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CAPABILITIES_L1_MASK 0x7 17537c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CAPABILITIES_L0S 6 17547c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CAPABILITIES_L0S_MASK 0x7 17557c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CAPABILITIES_MPS 0 17567c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CAPABILITIES_MPS_MASK 0x7 17577c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CONTROL 0x90008 17587c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CONTROL_MRRS 12 17597c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CONTROL_MRRS_MASK 0x7 17607c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CONTROL_MPS 5 17617c478bd9Sstevel@tonic-gate #define TLU_DEVICE_CONTROL_MPS_MASK 0x7 17627c478bd9Sstevel@tonic-gate #define TLU_DEVICE_STATUS 0x90010 17637c478bd9Sstevel@tonic-gate #define TLU_DEVICE_STATUS_TP 5 17647c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES 0x90018 17657c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_PORT 24 17667c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_PORT_MASK 0xff 17677c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_L1 15 17687c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_L1_MASK 0x7 17697c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_L0S 12 17707c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_L0S_MASK 0x7 17717c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_ASPM 10 17727c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_ASPM_MASK 0x3 17737c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_WIDTH 4 17747c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_WIDTH_MASK 0x3f 17757c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_SPEED 0 17767c478bd9Sstevel@tonic-gate #define TLU_LINK_CAPABILITIES_SPEED_MASK 0xf 17777c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL 0x90020 17787c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL_EXTSYNC 7 17797c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL_CLOCK 6 17807c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL_RETRAIN 5 17817c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL_DISABLE 4 17827c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL_RCB 3 17837c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL_ASPM 0 17847c478bd9Sstevel@tonic-gate #define TLU_LINK_CONTROL_ASPM_MASK 0x3 17857c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS 0x90028 17867c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS_CLOCK 12 17877c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS_TRAIN 11 17887c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS_ERROR 10 17897c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS_WIDTH 4 17907c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS_WIDTH_MASK 0x3f 17917c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS_SPEED 0 17927c478bd9Sstevel@tonic-gate #define TLU_LINK_STATUS_SPEED_MASK 0xf 17937c478bd9Sstevel@tonic-gate #define TLU_SLOT_CAPABILITIES 0x90030 17947c478bd9Sstevel@tonic-gate #define TLU_SLOT_CAPABILITIES_SPLS 15 17957c478bd9Sstevel@tonic-gate #define TLU_SLOT_CAPABILITIES_SPLS_MASK 0x3 17967c478bd9Sstevel@tonic-gate #define TLU_SLOT_CAPABILITIES_SPLV 7 17977c478bd9Sstevel@tonic-gate #define TLU_SLOT_CAPABILITIES_SPLV_MASK 0xff 17987c478bd9Sstevel@tonic-gate 17997c478bd9Sstevel@tonic-gate /* Reserved 0x90038 - 0x90ff8 */ 18007c478bd9Sstevel@tonic-gate 18017c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_LOG_ENABLE 0x91000 18027c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_LOG_ENABLE_EN 0 18037c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_LOG_ENABLE_EN_MASK 0x1fffff 18047c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_ENABLE 0x91008 18057c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_S 32 18067c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_S_MASK 0x1fffff 18077c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_P 0 18087c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_P_MASK 0x1fffff 18097c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_STATUS 0x91010 18107c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_S 32 18117c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_S_MASK 0x1fffff 18127c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_P 0 18137c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_P_MASK 0x1fffff 1814f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_UR_S 52 1815f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_MFP_S 50 1816f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_ROF_S 49 1817f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_UC_S 48 1818f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_CA_S 47 1819f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_CTO_S 46 1820f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_FCP_S 45 1821f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_PP_S 44 1822f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_DLP_S 36 1823f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_TE_S 32 1824f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_UR_P 20 1825f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_MFP_P 18 1826f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_ROF_P 17 1827f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_UC_P 16 1828f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_CA_P 15 1829f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_CTO_P 14 1830f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_FCP_P 13 1831f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_PP_P 12 1832f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_DLP_P 4 1833f8d2de6bSjchu #define TLU_UNCORRECTABLE_INTERRUPT_STATUS_TE_P 0 18347c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR 0x91018 18357c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_UR_S 52 18367c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_MFP_S 50 18377c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_ROF_S 49 18387c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_UC_S 48 18397c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_CA_S 47 18407c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_CTO_S 46 18417c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_FCP_S 45 18427c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_PP_S 44 18437c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_DLP_S 36 18447c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_TE_S 32 18457c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_UR_P 20 18467c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_MFP_P 18 18477c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_ROF_P 17 18487c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_UC_P 16 18497c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_CA_P 15 18507c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_CTO_P 14 18517c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_FCP_P 13 18527c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_PP_P 12 18537c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_DLP_P 4 18547c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_TE_P 0 18557c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET 0x91020 18567c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_UR_S 52 18577c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_MFP_S 50 18587c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_ROF_S 49 18597c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_UC_S 48 18607c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_CA_S 47 18617c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_CTO_S 46 18627c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_FCP_S 45 18637c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_PP_S 44 18647c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_DLP_S 36 18657c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_TE_S 32 18667c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_UR_P 20 18677c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_MFP_P 18 18687c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_ROF_P 17 18697c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_UC_P 16 18707c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_CA_P 15 18717c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_CTO_P 14 18727c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_FCP_P 13 18737c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_PP_P 12 18747c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_DLP_P 4 18757c478bd9Sstevel@tonic-gate #define TLU_UNCORRECTABLE_ERROR_STATUS_SET_TE_P 0 18767c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_UNCORRECTABLE_ERROR_HEADER1_LOG 0x91028 18777c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_UNCORRECTABLE_ERROR_HEADER1_LOG_HDR 0 18787c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_UNCORRECTABLE_ERROR_HEADER1_LOG_HDR_MASK \ 18797c478bd9Sstevel@tonic-gate 0xffffffffffffffff 18807c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_UNCORRECTABLE_ERROR_HEADER2_LOG 0x91030 18817c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_UNCORRECTABLE_ERROR_HEADER2_LOG_HDR 0 18827c478bd9Sstevel@tonic-gate #define TLU_RECEIVE_UNCORRECTABLE_ERROR_HEADER2_LOG_HDR_MASK \ 18837c478bd9Sstevel@tonic-gate 0xffffffffffffffff 18847c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_UNCORRECTABLE_ERROR_HEADER1_LOG 0x91038 18857c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_UNCORRECTABLE_ERROR_HEADER1_LOG_HDR 0 18867c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_UNCORRECTABLE_ERROR_HEADER1_LOG_HDR_MASK \ 18877c478bd9Sstevel@tonic-gate 0xffffffffffffffff 18887c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_UNCORRECTABLE_ERROR_HEADER2_LOG 0x91040 18897c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_UNCORRECTABLE_ERROR_HEADER2_LOG_HDR 0 18907c478bd9Sstevel@tonic-gate #define TLU_TRANSMIT_UNCORRECTABLE_ERROR_HEADER2_LOG_HDR_MASK \ 18917c478bd9Sstevel@tonic-gate 0xffffffffffffffff 18927c478bd9Sstevel@tonic-gate 18937c478bd9Sstevel@tonic-gate /* Reserved 0x91048 - 0x9fff8 */ 18947c478bd9Sstevel@tonic-gate 18957c478bd9Sstevel@tonic-gate 18967c478bd9Sstevel@tonic-gate /* Reserved 0xa0008 - 0xa0ff8 */ 18977c478bd9Sstevel@tonic-gate 18987c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_LOG_ENABLE 0xa1000 18997c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_LOG_ENABLE_EN 0 19007c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_LOG_ENABLE_EN_MASK 0x1fff 19017c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_ENABLE 0xa1008 19027c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_S 32 19037c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_S_MASK 0x1fff 19047c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_P 0 19057c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_ENABLE_EN_P_MASK 0x1fff 19067c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_STATUS 0xa1010 19077c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_S 32 19087c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_S_MASK 0x1fff 19097c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_P 0 19107c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_INTERRUPT_STATUS_ERR_P_MASK 0x1fff 19117c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR 0xa1018 19127c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_RTO_S 44 19137c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_RNR_S 40 19147c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_BDP_S 39 19157c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_BTP_S 38 19167c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_RE_S 32 19177c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_RTO_P 12 19187c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_RNR_P 8 19197c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_BDP_P 7 19207c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_BTP_P 6 19217c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_CLEAR_RE_P 0 19227c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET 0xa1020 19237c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_RTO_S 44 19247c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_RNR_S 40 19257c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_BDP_S 39 19267c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_BTP_S 38 19277c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_RE_S 32 19287c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_RTO_P 12 19297c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_RNR_P 8 19307c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_BDP_P 7 19317c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_BTP_P 6 19327c478bd9Sstevel@tonic-gate #define TLU_CORRECTABLE_ERROR_STATUS_SET_RE_P 0 19337c478bd9Sstevel@tonic-gate 19347c478bd9Sstevel@tonic-gate /* lpr.csr LPR module defines */ 19357c478bd9Sstevel@tonic-gate 19367c478bd9Sstevel@tonic-gate #define LPR_CSR_BASE 0x600000 19377c478bd9Sstevel@tonic-gate 19387c478bd9Sstevel@tonic-gate /* Reserved 0xe0008 - 0xe1ff8 */ 19397c478bd9Sstevel@tonic-gate 19407c478bd9Sstevel@tonic-gate #define LPU_ID 0xe2000 19417c478bd9Sstevel@tonic-gate #define LPU_ID_LTBWDTH 20 19427c478bd9Sstevel@tonic-gate #define LPU_ID_LTBWDTH_MASK 0xf 19437c478bd9Sstevel@tonic-gate #define LPU_ID_PTLWDTH 16 19447c478bd9Sstevel@tonic-gate #define LPU_ID_PTLWDTH_MASK 0xf 19457c478bd9Sstevel@tonic-gate #define LPU_ID_TRID 12 19467c478bd9Sstevel@tonic-gate #define LPU_ID_TRID_MASK 0xf 19477c478bd9Sstevel@tonic-gate #define LPU_ID_LNKID 8 19487c478bd9Sstevel@tonic-gate #define LPU_ID_LNKID_MASK 0xf 19497c478bd9Sstevel@tonic-gate #define LPU_ID_PHYID 4 19507c478bd9Sstevel@tonic-gate #define LPU_ID_PHYID_MASK 0xf 19517c478bd9Sstevel@tonic-gate #define LPU_ID_GBID 0 19527c478bd9Sstevel@tonic-gate #define LPU_ID_GBID_MASK 0xf 19537c478bd9Sstevel@tonic-gate #define LPU_RESET 0xe2008 19547c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTWE 31 19557c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTUNUSED 9 19567c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTUNUSED_MASK 0x7 19577c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTERROR 8 19587c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTTXLINK 7 19597c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTRXLINK 6 19607c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTSMLINK 5 19617c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTLTSSM 4 19627c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTTXPHY 3 19637c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTRXPHY 2 19647c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTTXPCS 1 19657c478bd9Sstevel@tonic-gate #define LPU_RESET_RSTRXPCS 0 19667c478bd9Sstevel@tonic-gate #define LPU_DEBUG_STATUS 0xe2010 19677c478bd9Sstevel@tonic-gate #define LPU_DEBUG_STATUS_DEBUGB 8 19687c478bd9Sstevel@tonic-gate #define LPU_DEBUG_STATUS_DEBUGB_MASK 0xff 19697c478bd9Sstevel@tonic-gate #define LPU_DEBUG_STATUS_DEBUGA 0 19707c478bd9Sstevel@tonic-gate #define LPU_DEBUG_STATUS_DEBUGA_MASK 0xff 19717c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG 0xe2018 19727c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGB_BLK_SEL 24 19737c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGB_BLK_SEL_MASK 0xff 19747c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGB_SIG_SEL 16 19757c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGB_SIG_SEL_MASK 0xff 19767c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGA_BLK_SEL 8 19777c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGA_BLK_SEL_MASK 0xff 19787c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGA_SIG_SEL 0 19797c478bd9Sstevel@tonic-gate #define LPU_DEBUG_CONFIG_DBUGA_SIG_SEL_MASK 0xff 19807c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL 0xe2020 19817c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_WR_ENABLE 31 19827c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_RCOVER_TO_CONFIG 11 19837c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_L0_TO_RECOVER 10 19847c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_UNUSED_0 9 19857c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_GO_TO_DETECT 8 19867c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_UNUSED_1 4 19877c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_UNUSED_1_MASK 0xf 19887c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_DISABLE_SCRAMBLING 3 19897c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_LINK_LOOPBK_REQ 2 19907c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_LINK_DISABLE_REQ 1 19917c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONTROL_HOT_RESET 0 19927c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS 0xe2028 19937c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS_SLOT_CLK_CONFG_PIN 12 19947c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS_LINK_TRAINING 11 19957c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS_LINK_TRAINING_ERR 10 19967c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS_NEGOTIATED_WIDTH 4 19977c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS_NEGOTIATED_WIDTH_MASK 0x3f 19987c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS_LINK_SPEED 0 19997c478bd9Sstevel@tonic-gate #define LPU_LINK_STATUS_LINK_SPEED_MASK 0xf 20007c478bd9Sstevel@tonic-gate 20017c478bd9Sstevel@tonic-gate /* Reserved 0xe2030 - 0xe2038 */ 20027c478bd9Sstevel@tonic-gate 20037c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS 0xe2040 20047c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INTERRUPT 31 20057c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_PERF_CNTR_2_OVFLW 7 20067c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_PERF_CNTR_1_OVFLW 6 20077c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_LINK_LAYER 5 20087c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_PHY_ERROR 4 20097c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_LTSSM 3 20107c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_PHY_TX 2 20117c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_PHY_RX 1 20127c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_STATUS_INT_PHY_GB 0 20137c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK 0xe2048 20147c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_INTERRUPT_EN 31 20157c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_PERF_CNTR_2_OVFLW 7 20167c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_PERF_CNTR_1_OVFLW 6 20177c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_LINK_LAYER 5 20187c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_PHY_ERROR 4 20197c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_LTSSM 3 20207c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_PHY_TX 2 20217c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_PHY_RX 1 20227c478bd9Sstevel@tonic-gate #define LPU_INTERRUPT_MASK_MSK_PHY_GB 0 20237c478bd9Sstevel@tonic-gate 20247c478bd9Sstevel@tonic-gate /* Reserved 0xe2050 - 0xe20f8 */ 20257c478bd9Sstevel@tonic-gate 20267c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_SELECT 0xe2100 20277c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_SELECT_PERF_CNTR2_SELECT 16 20287c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_SELECT_PERF_CNTR2_SELECT_MASK 0xffff 20297c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_SELECT_PERF_CNTR1_SELECT 0 20307c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_SELECT_PERF_CNTR1_SELECT_MASK 0xffff 20317c478bd9Sstevel@tonic-gate 20327c478bd9Sstevel@tonic-gate /* Reserved 0xe2108 - 0xe2108 */ 20337c478bd9Sstevel@tonic-gate 20347c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_CONTROL 0xe2110 20357c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_CONTROL_SET_PERF_CNTR2_OVERFLOW 6 20367c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_CONTROL_SET_PERF_CNTR1_OVERFLOW 5 20377c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_CONTROL_RST_PERF_CNTR2_OVERFLOW 3 20387c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_CONTROL_RST_PERF_CNTR2 2 20397c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_CONTROL_RST_PERF_CNTR1_OVERFLOW 1 20407c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER_CONTROL_RST_PERF_CNTR1 0 20417c478bd9Sstevel@tonic-gate 20427c478bd9Sstevel@tonic-gate /* Reserved 0xe2118 - 0xe2118 */ 20437c478bd9Sstevel@tonic-gate 20447c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER1 0xe2120 20457c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER1_PERF_CNTR1 0 20467c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER1_PERF_CNTR1_MASK 0xffffffff 20477c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER1_TEST 0xe2128 20487c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER1_TEST_PERF_CNTR1_TEST 0 20497c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER1_TEST_PERF_CNTR1_TEST_MASK 0xffffffff 20507c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER2 0xe2130 20517c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER2_PERF_CNTR2 0 20527c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER2_PERF_CNTR2_MASK 0xffffffff 20537c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER2_TEST 0xe2138 20547c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER2_TEST_PERF_CNTR2_TEST 0 20557c478bd9Sstevel@tonic-gate #define LPU_LINK_PERFORMANCE_COUNTER2_TEST_PERF_CNTR2_TEST_MASK 0xffffffff 20567c478bd9Sstevel@tonic-gate 20577c478bd9Sstevel@tonic-gate /* Reserved 0xe2140 - 0xe21f8 */ 20587c478bd9Sstevel@tonic-gate 20597c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG 0xe2200 20607c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_AUTO_UPDATE_DIS 19 20617c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_FREQ_NAK_EN 18 20627c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_REPLAY_AFTER_REC 17 20637c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_LAT_THRES_WR_EN 16 20647c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_VC0_EN 8 20657c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_UNUSED 5 20667c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_UNUSED_MASK 0x7 20677c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_L0S_ADJ_FAC_EN 4 20687c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_TLP_XMIT_FC_EN 3 20697c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_FREQ_ACK_ENABLE 2 20707c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_CONFIG_RETRY_DISABLE 1 20717c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS 0xe2208 20727c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS_INIT_FC_SM_WE 9 20737c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS_LNK_ST_DLUP_WE 8 20747c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS_INIT_FC_SM_STS 4 20757c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS_INIT_FC_SM_STS_MASK 0x3 20767c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS_DLUP_STS 3 20777c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS_LNK_STATE_MACH_STS 0 20787c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_STATUS_LNK_STATE_MACH_STS_MASK 0x7 20797c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS 0xe2210 20807c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_LINK_ERR_ACT 31 20817c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_UNSPRTD_DLLP 22 20827c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_DLLP_RCV_ERR 21 20837c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_BAD_DLLP 20 20847c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_TLP_RCV_ERR 18 20857c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_SRC_ERR_TLP 17 20867c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_BAD_TLP 16 20877c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_RTRY_BUF_UDF_ERR 9 20887c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_RTRY_BUF_OVF_ERR 8 20897c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_EG_TLP_MIN_ERR 7 20907c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_EG_TRNC_FRM_ERR 6 20917c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_RTRY_BUF_PE 5 20927c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_EGRESS_PE 4 20937c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_RPLAY_TMR_TO 2 20947c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_RPLAY_NUM_RO 1 20957c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_DLNK_PES 0 20967c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST 0xe2218 20977c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_UNSPRTD_DLLP 22 20987c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_DLLP_RCV_ERR 21 20997c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_BAD_DLLP 20 21007c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_TLP_RCV_ERR 18 21017c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_SRC_ERR_TLP 17 21027c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_BAD_TLP 16 21037c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_RTRY_BUF_UDF_ERR 9 21047c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_RTRY_BUF_OVF 8 21057c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_EG_TLP_MIN_ERR 7 21067c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_EG_TRNC_FRM_ERR 6 21077c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_RTRY_BUF_PE 5 21087c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_EGRESS_PE 4 21097c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_RPLAY_TMR_TO 2 21107c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_RPLAY_NUM_RO 1 21117c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_AND_STATUS_TEST_TST_DLNK_PES 0 21127c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK 0xe2220 21137c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_LINK_ERR_ACT 31 21147c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_UNSPRTD_DLLP 22 21157c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_DLLP_RCV_ERR 21 21167c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_BAD_DLLP 20 21177c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_UNUSED_2 19 21187c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_TLP_RCV_ERR 18 21197c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_SRC_ERR_TLP 17 21207c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_BAD_TLP 16 21217c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_UNUSED_1 10 21227c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_UNUSED_1_MASK 0x3f 21237c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_RTRY_UNF_OVF 9 21247c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_RTRY_BUF_OVF 8 21257c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_EG_TLP_MIN_ERR 7 21267c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_EG_TRNC_FRM_ERR 6 21277c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_RTRY_BUF_PE 5 21287c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_EGRESS_PE 4 21297c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_UNUSED_0 3 21307c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_RPLAY_TMR_TO 2 21317c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_RPLAY_NUM_RO 1 21327c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_INTERRUPT_MASK_MSK_DLNK_PES 0 21337c478bd9Sstevel@tonic-gate 21347c478bd9Sstevel@tonic-gate /* Reserved 0xe2228 - 0xe2238 */ 21357c478bd9Sstevel@tonic-gate 21367c478bd9Sstevel@tonic-gate #define LPU_FLOW_CONTROL_UPDATE_CONTROL 0xe2240 21377c478bd9Sstevel@tonic-gate #define LPU_FLOW_CONTROL_UPDATE_CONTROL_FC0_U_C_EN 2 21387c478bd9Sstevel@tonic-gate #define LPU_FLOW_CONTROL_UPDATE_CONTROL_FC0_U_NP_EN 1 21397c478bd9Sstevel@tonic-gate #define LPU_FLOW_CONTROL_UPDATE_CONTROL_FC0_U_P_EN 0 21407c478bd9Sstevel@tonic-gate 21417c478bd9Sstevel@tonic-gate /* Reserved 0xe2248 - 0xe2258 */ 21427c478bd9Sstevel@tonic-gate 21437c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_FLOW_CONTROL_UPDATE_TIMEOUT_VALUE 0xe2260 21447c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_FLOW_CONTROL_UPDATE_TIMEOUT_VALUE_FC_UPDATE_TO 0 21457c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_FLOW_CONTROL_UPDATE_TIMEOUT_VALUE_FC_UPDATE_TO_MASK \ 21467c478bd9Sstevel@tonic-gate 0x7fff 21477c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER0 0xe2268 21487c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER0_VC0_FC_UP_TMR_NP 16 21497c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER0_VC0_FC_UP_TMR_NP_MASK \ 21507c478bd9Sstevel@tonic-gate 0x7fff 21517c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER0_VC0_FC_UP_TMR_P 0 21527c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER0_VC0_FC_UP_TMR_P_MASK \ 21537c478bd9Sstevel@tonic-gate 0x7fff 21547c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER1 0xe2270 21557c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER1_VC0_FC_UP_TMR_CPL 0 21567c478bd9Sstevel@tonic-gate #define LPU_LINK_LAYER_VC0_FLOW_CONTROL_UPDATE_TIMER1_VC0_FC_UP_TMR_CPL_MASK \ 21577c478bd9Sstevel@tonic-gate 0x7fff 21587c478bd9Sstevel@tonic-gate 21597c478bd9Sstevel@tonic-gate /* Reserved 0xe2278 - 0xe23f8 */ 21607c478bd9Sstevel@tonic-gate 21617c478bd9Sstevel@tonic-gate #define LPU_TXLINK_FREQUENT_NAK_LATENCY_TIMER_THRESHOLD 0xe2400 21627c478bd9Sstevel@tonic-gate #define LPU_TXLINK_FREQUENT_NAK_LATENCY_TIMER_THRESHOLD_ACK_NAK_THR 0 21637c478bd9Sstevel@tonic-gate #define LPU_TXLINK_FREQUENT_NAK_LATENCY_TIMER_THRESHOLD_ACK_NAK_THR_MASK \ 21647c478bd9Sstevel@tonic-gate 0xffff 21657c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACKNAK_LATENCY_TIMER 0xe2408 21667c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACKNAK_LATENCY_TIMER_ACK_NAK_TMR 0 21677c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACKNAK_LATENCY_TIMER_ACK_NAK_TMR_MASK 0xffff 21687c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_TIMER_THRESHOLD 0xe2410 21697c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_TIMER_THRESHOLD_RPLAY_TMR_THR 0 21707c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_TIMER_THRESHOLD_RPLAY_TMR_THR_MASK 0xfffff 21717c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_TIMER 0xe2418 21727c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_TIMER_RPLAY_TMR 0 21737c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_TIMER_RPLAY_TMR_MASK 0xfffff 21747c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_NUMBER_STATUS 0xe2420 21757c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_NUMBER_STATUS_WE 31 21767c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_NUMBER_STATUS_RPLAY_NUM_CNTR 0 21777c478bd9Sstevel@tonic-gate #define LPU_TXLINK_REPLAY_NUMBER_STATUS_RPLAY_NUM_CNTR_MASK 0x3 21787c478bd9Sstevel@tonic-gate #define LPU_REPLAY_BUFFER_MAX_ADDRESS 0xe2428 21797c478bd9Sstevel@tonic-gate #define LPU_REPLAY_BUFFER_MAX_ADDRESS_RTRY_BUFF_MAX_ADDR 0 21807c478bd9Sstevel@tonic-gate #define LPU_REPLAY_BUFFER_MAX_ADDRESS_RTRY_BUFF_MAX_ADDR_MASK 0xffff 21817c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_POINTER 0xe2430 21827c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_POINTER_RTRY_FIFO_TLPTR 16 21837c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_POINTER_RTRY_FIFO_TLPTR_MASK 0xffff 21847c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_POINTER_RTRY_FIFO_HDPTR 0 21857c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_POINTER_RTRY_FIFO_HDPTR_MASK 0xffff 21867c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_R_W_POINTER 0xe2438 21877c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_R_W_POINTER_RTRY_BFFR_WRPTR 16 21887c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_R_W_POINTER_RTRY_BFFR_WRPTR_MASK 0xffff 21897c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_R_W_POINTER_RTRY_BFFR_RDPTR 0 21907c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_R_W_POINTER_RTRY_BFFR_RDPTR_MASK 0xffff 21917c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_CREDIT 0xe2440 21927c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_CREDIT_RTRY_FIFO_CRDT 0 21937c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_FIFO_CREDIT_RTRY_FIFO_CRDT_MASK 0xffff 21947c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNTER 0xe2448 21957c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNTER_WE 31 21967c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNTER_ACK_SEQ_WE 30 21977c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNTER_ACK_SEQ_CNTR 16 21987c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNTER_ACK_SEQ_CNTR_MASK 0xfff 21997c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNTER_NXT_TX_SEQ_CNTR 0 22007c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNTER_NXT_TX_SEQ_CNTR_MASK 0xfff 22017c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACK_SENT_SEQUENCE_NUMBER 0xe2450 22027c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACK_SENT_SEQUENCE_NUMBER_SEQ_NUM 0 22037c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACK_SENT_SEQUENCE_NUMBER_SEQ_NUM_MASK 0xfff 22047c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_MAX_ADDR 0xe2458 22057c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_MAX_ADDR_SEQ_CNT_MAX_ADDR 0 22067c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_MAX_ADDR_SEQ_CNT_MAX_ADDR_MASK 0xfff 22077c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_POINTERS 0xe2460 22087c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_POINTERS_SEQ_CNT_TLPTR 16 22097c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_POINTERS_SEQ_CNT_TLPTR_MASK 0xfff 22107c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_POINTERS_SEQ_CNT_HDPTR 0 22117c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_FIFO_POINTERS_SEQ_CNT_HDPTR_MASK 0xfff 22127c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_R_W_POINTERS 0xe2468 22137c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_R_W_POINTERS_SEQ_CNT_WRPTR 16 22147c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_R_W_POINTERS_SEQ_CNT_WRPTR_MASK 0xfff 22157c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_R_W_POINTERS_SEQ_CNT_RDPTR 0 22167c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_COUNT_R_W_POINTERS_SEQ_CNT_RDPTR_MASK 0xfff 22177c478bd9Sstevel@tonic-gate #define LPU_TXLINK_TEST_CONTROL 0xe2470 22187c478bd9Sstevel@tonic-gate #define LPU_TXLINK_TEST_CONTROL_DIS_ACK 3 22197c478bd9Sstevel@tonic-gate #define LPU_TXLINK_TEST_CONTROL_FORCE_NAK 2 22207c478bd9Sstevel@tonic-gate #define LPU_TXLINK_TEST_CONTROL_FORCE_BAD_TLP_CRC 1 22217c478bd9Sstevel@tonic-gate #define LPU_TXLINK_TEST_CONTROL_FORCE_RTX_TLP 0 22227c478bd9Sstevel@tonic-gate 22237c478bd9Sstevel@tonic-gate /* Reserved 0xe2478 - 0xe2478 */ 22247c478bd9Sstevel@tonic-gate 22257c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_ADDRESS_CONTROL 0xe2480 22267c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_ADDRESS_CONTROL_DONE 31 22277c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_ADDRESS_CONTROL_GO_BIT 30 22287c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_ADDRESS_CONTROL_RD_WR_SEL 29 22297c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_ADDRESS_CONTROL_FIFO_SEL 28 22307c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_ADDRESS_CONTROL_MEM_ADDR 0 22317c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_ADDRESS_CONTROL_MEM_ADDR_MASK 0xffff 22327c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD0 0xe2488 22337c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD0_MEM_RD_WR_DATA0 0 22347c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD0_MEM_RD_WR_DATA0_MASK 0xffffffff 22357c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD1 0xe2490 22367c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD1_MEM_RD_WR_DATA1 0 22377c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD1_MEM_RD_WR_DATA1_MASK 0xffffffff 22387c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD2 0xe2498 22397c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD3 0xe24a0 22407c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD4 0xe24a8 22417c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD4_MEM_RD_WR_DATA4 0 22427c478bd9Sstevel@tonic-gate #define LPU_TXLINK_MEMORY_DATA_LOAD4_MEM_RD_WR_DATA4_MASK 0xff 22437c478bd9Sstevel@tonic-gate 22447c478bd9Sstevel@tonic-gate /* Reserved 0xe24b0 - 0xe24b8 */ 22457c478bd9Sstevel@tonic-gate 22467c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_DATA_COUNT 0xe24c0 22477c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_DATA_COUNT_RTRY_DATA_CNT 0 22487c478bd9Sstevel@tonic-gate #define LPU_TXLINK_RETRY_DATA_COUNT_RTRY_DATA_CNT_MASK 0xffff 22497c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_COUNT 0xe24c8 22507c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_COUNT_SEQ_BUFF_CNT 0 22517c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_COUNT_SEQ_BUFF_CNT_MASK 0xfff 22527c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA 0xe24d0 22537c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA_SBUF_BDATA_PAR 30 22547c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA_SBDATA_SEQ_NUM 18 22557c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA_SBDATA_SEQ_NUM_MASK 0xfff 22567c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA_SBDATA_RTRY_PTR 2 22577c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA_SBDATA_RTRY_PTR_MASK 0xffff 22587c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA_SBDATA_EOP_POS 0 22597c478bd9Sstevel@tonic-gate #define LPU_TXLINK_SEQUENCE_BUFFER_BOTTOM_DATA_SBDATA_EOP_POS_MASK 0x3 22607c478bd9Sstevel@tonic-gate 22617c478bd9Sstevel@tonic-gate /* Reserved 0xe24d8 - 0xe24d8 */ 22627c478bd9Sstevel@tonic-gate 22637c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACK_LATENCY_TIMER_THRESHOLD 0xe24e0 22647c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACK_LATENCY_TIMER_THRESHOLD_ACK_LAT_THHOLD 0 22657c478bd9Sstevel@tonic-gate #define LPU_TXLINK_ACK_LATENCY_TIMER_THRESHOLD_ACK_LAT_THHOLD_MASK 0xffff 22667c478bd9Sstevel@tonic-gate 22677c478bd9Sstevel@tonic-gate /* Reserved 0xe24e8 - 0xe24f8 */ 22687c478bd9Sstevel@tonic-gate 22697c478bd9Sstevel@tonic-gate #define LPU_RXLINK_NEXT_RECEIVE_SEQUENCE_1_COUNTER 0xe2500 22707c478bd9Sstevel@tonic-gate #define LPU_RXLINK_NEXT_RECEIVE_SEQUENCE_1_COUNTER_NXT_RX_SEQ_CNTR 0 22717c478bd9Sstevel@tonic-gate #define LPU_RXLINK_NEXT_RECEIVE_SEQUENCE_1_COUNTER_NXT_RX_SEQ_CNTR_MASK \ 22727c478bd9Sstevel@tonic-gate 0xfff 22737c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED 0xe2508 22747c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE3 24 22757c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE3_MASK 0xff 22767c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE2 16 22777c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE2_MASK 0xff 22787c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE1 8 22797c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE1_MASK 0xff 22807c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE0 0 22817c478bd9Sstevel@tonic-gate #define LPU_RXLINK_UNSUPPORTED_DLLP_RECEIVED_BYTE0_MASK 0xff 22827c478bd9Sstevel@tonic-gate #define LPU_RXLINK_TEST_CONTROL 0xe2510 22837c478bd9Sstevel@tonic-gate #define LPU_RXLINK_TEST_CONTROL_FORCE_SEND_INIT_FC_DLLP 1 22847c478bd9Sstevel@tonic-gate #define LPU_RXLINK_TEST_CONTROL_FORCE_PAR_ERR_DLLP 0 22857c478bd9Sstevel@tonic-gate 22867c478bd9Sstevel@tonic-gate /* Reserved 0xe2518 - 0xe25f8 */ 22877c478bd9Sstevel@tonic-gate 22887c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION 0xe2600 22897c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_PHY_TST_EN 31 22907c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_FAST_SIM 30 22917c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_UNUSED 29 22927c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_FRCE_EXTEN_SYNC 28 22937c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_EIDLE_POST_EN 11 22947c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_OS_POST_VAL 8 22957c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_OS_POST_VAL_MASK 0x7 22967c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_OS_BYTE_SEL 7 22977c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_OS_PREAM_VAL 4 22987c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_OS_PREAM_VAL_MASK 0x7 22997c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_RDET_BYP_MODE 3 23007c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_RDET_SAFE_MODE 2 23017c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_UNUSED 1 23027c478bd9Sstevel@tonic-gate #define LPU_PHYSICAL_LAYER_CONFIGURATION_TX_PAR_ERR 0 23037c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_STATUS 0xe2608 23047c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS 0xe2610 23057c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_PHY_LAYER_ERR 31 23067c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_KCHAR_DLLP_ERR 11 23077c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_ILL_END_POS_ERR 10 23087c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_LNK_ERR 9 23097c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_TRN_ERR 8 23107c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_EDB_DET 7 23117c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_SDP_END 6 23127c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_STP_END_EDB 5 23137c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_INVLD_CHAR_ERR 4 23147c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_MULTI_SDP 3 23157c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_MULTI_STP 2 23167c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_ILL_SDP_POS 1 23177c478bd9Sstevel@tonic-gate #define LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_ILL_STP_POS 0 23187c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST 0xe2618 23197c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_KCHAR_DLLP_ERR 11 23207c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_ILL_END_POS_ERR 10 23217c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_LNK_ERR 9 23227c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_TRN_ERR 8 23237c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_EDB_DET 7 23247c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_SDP_END 6 23257c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_STP_END_EDB 5 23267c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_INVLD_CHAR_ERR 4 23277c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_MULTI_SDP 3 23287c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_MULTI_STP 2 23297c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_ILL_SDP_POS 1 23307c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_AND_STATUS_TEST_TST_ILL_STP_POS 0 23317c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK 0xe2620 23327c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_PHY_LAYER_ERR 31 23337c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_KCHAR_DLLP_ERR 11 23347c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_ILL_END_POS_ERR 10 23357c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_LNK_ERR 9 23367c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_TRN_ERR 8 23377c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_EDB_DET 7 23387c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_SDP_END 6 23397c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_STP_END_EDB 5 23407c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_INVLD_CHAR_ERR 4 23417c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_MULTI_SDP 3 23427c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_MULTI_STP 2 23437c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_ILL_SDP_POS 1 23447c478bd9Sstevel@tonic-gate #define LPU_PHY_INTERRUPT_MASK_MSK_ILL_STP_POS 0 23457c478bd9Sstevel@tonic-gate 23467c478bd9Sstevel@tonic-gate /* Reserved 0xe2628 - 0xe2678 */ 23477c478bd9Sstevel@tonic-gate 23487c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG 0xe2680 23497c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_RX_PHY_TST 31 23507c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_UNUSED_0 18 23517c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_UNUSED_0_MASK 0x1fff 23527c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_WM_SEL_FIFO 16 23537c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_WM_SEL_FIFO_MASK 0x3 23547c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_UNUSED_1 8 23557c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_UNUSED_1_MASK 0xff 23567c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_RST_RCV_LANE 0 23577c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_CONFIG_RST_RCV_LANE_MASK 0xff 23587c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS1 0xe2688 23597c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS1_ALIGN_STS 16 23607c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS1_RX_PHY_STS 0 23617c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS1_RX_PHY_STS_MASK 0xffff 23627c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2 0xe2690 23637c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_DIS_SCRAM 27 23647c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_EN_LOOPBACK 26 23657c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_DIS_LINK 25 23667c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_HOT_RST 24 23677c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_DATA_RATE 16 23687c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_DATA_RATE_MASK 0xff 23697c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_FTS_NUM 8 23707c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_FTS_NUM_MASK 0xff 23717c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_LINK_NUM 0 23727c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS2_RCV_LINK_NUM_MASK 0xff 23737c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS3 0xe2698 23747c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS3_POL_REV_STS 16 23757c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS3_POL_REV_STS_MASK 0xff 23767c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS3_BYTE_SYNC_STS 0 23777c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_STATUS3_BYTE_SYNC_STS_MASK 0xff 23787c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS 0xe26a0 23797c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_INT_RCV_PHY 31 23807c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_INT_UNUSED 3 23817c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_INT_UNUSED_MASK 0x1ff 23827c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_INT_ALIGN_ERR 2 23837c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_INT_ELSTC_FIFO_OVRFLW 1 23847c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_INT_ELSTC_FIFO_UNDRFLW 0 23857c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_TEST 0xe26a8 23867c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_TEST_TST_UNUSED 3 23877c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_TEST_TST_UNUSED_MASK 0x1ff 23887c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_TEST_TST_ALIGN_ERR 2 23897c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_TEST_TST_ELSTC_FIFO_OVRFLW 1 23907c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_TEST_TST_ELSTC_FIFO_UNDRFLW 0 23917c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_MASK 0xe26b0 23927c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_MASK_MSK_RCV_PHY_INT 31 23937c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_MASK_MSK_UNUSED 3 23947c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_MASK_MSK_UNUSED_MASK 0x1ff 23957c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_MASK_MSK_ALIGN_ERR 2 23967c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_MASK_MSK_ELSTC_FIFO_OVRFLW 1 23977c478bd9Sstevel@tonic-gate #define LPU_RECEIVE_PHY_INTERRUPT_MASK_MSK_ELSTC_FIFO_UNDRFLW 0 23987c478bd9Sstevel@tonic-gate 23997c478bd9Sstevel@tonic-gate /* Reserved 0xe26b8 - 0xe26f8 */ 24007c478bd9Sstevel@tonic-gate 24017c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_CONFIG 0xe2700 24027c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_CONFIG_FRCE_RCVR_DET 16 24037c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_CONFIG_FRCE_RCVR_DET_MASK 0xffff 24047c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_CONFIG_FRCE_ELEC_IDLE 0 24057c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_CONFIG_FRCE_ELEC_IDLE_MASK 0xffff 24067c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS 0xe2708 24077c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_NEG_LANE_WDTH 28 24087c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_NEG_LANE_WDTH_MASK 0xf 24097c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_TXPHY_SCRAM_EN 27 24107c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_TX_LANE_REV 26 24117c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_TX_LANE_PAD 25 24127c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_TX_LINK_PAD 24 24137c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_TX_PHY_SMS 0 24147c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_TX_PHY_SMS_MASK 0x7fffff 24157c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS 0xe2710 24167c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_UNMSK 31 24177c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_RCV_IDLE 11 24187c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_RCV_TS2 10 24197c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_RCV_TS1 9 24207c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_SKP_ERR 8 24217c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_SKP_DONE_BK2BK 7 24227c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_SKP_ACK_DECR 6 24237c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_SKP_DONE_DECR 5 24247c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_SKP_TRIG 4 24257c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_UNUSED_2 2 24267c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_UNUSED_2_MASK 0x3 24277c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_RCVR_DET_VALID 1 24287c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_TX_PAR_ERR 0 24297c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_TEST 0xe2718 24307c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_TEST_TST_TX_PHY_INT 0 24317c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_TEST_TST_TX_PHY_INT_MASK 0xfff 24327c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_MASK 0xe2720 24337c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_MASK_MSK_GLOBL_INT 31 24347c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_MASK_MSK_IMPLEM_INT 0 24357c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_INTERRUPT_MASK_MSK_IMPLEM_INT_MASK 0xfff 24367c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_2 0xe2728 24377c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_2_RECV_DET_STS 16 24387c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_2_RECV_DET_STS_MASK 0xffff 24397c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_2_RECV_DET_RAW_STS 0 24407c478bd9Sstevel@tonic-gate #define LPU_TRANSMIT_PHY_STATUS_2_RECV_DET_RAW_STS_MASK 0xffff 24417c478bd9Sstevel@tonic-gate 24427c478bd9Sstevel@tonic-gate /* Reserved 0xe2730 - 0xe2778 */ 24437c478bd9Sstevel@tonic-gate 24447c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1 0xe2780 24457c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_LTSSM_TST 31 24467c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_CFG_UNUSED 18 24477c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_CFG_UNUSED_MASK 0x1fff 24487c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_LPBK_MSTR 17 24497c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_HI_DATA_SUP 16 24507c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_LTSSM_8_TO 8 24517c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_LTSSM_8_TO_MASK 0xff 24527c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_LTSSM_20_TO 0 24537c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG1_LTSSM_20_TO_MASK 0xff 24547c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG2 0xe2788 24557c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG2_LTSSM_12_TO 0 24567c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG2_LTSSM_12_TO_MASK 0xffffffff 24577c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG3 0xe2790 24587c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG3_LTSSM_2_TO 0 24597c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG3_LTSSM_2_TO_MASK 0xffffffff 24607c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4 0xe2798 24617c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_TRN_CNTRL 24 24627c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_TRN_CNTRL_MASK 0xff 24637c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_DATA_RATE 16 24647c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_DATA_RATE_MASK 0xff 24657c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_N_FTS 8 24667c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_N_FTS_MASK 0xff 24677c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_LNK_NUM 0 24687c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG4_LNK_NUM_MASK 0xff 24697c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5 0xe27a0 24707c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_CFG_UNUSED_0 13 24717c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_CFG_UNUSED_0_MASK 0x7ffff 24727c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_RCV_DET_TST_MODE 12 24737c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_POLL_CMPLNC_DIS 11 24747c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_TX_IDLE_TX_FTS 10 24757c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_RX_FTS_RVR_LK 9 24767c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_CFG_UNUSED_1 7 24777c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_CFG_UNUSED_1_MASK 0x3 24787c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_LPBK_ENTRY_ACTIVE 6 24797c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_LPBK_ENTRY_EXIT 5 24807c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_LPBK_ACTIVE_EXIT 4 24817c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_L1_IDLE_RCVRY_LK 3 24827c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_L0_TRN_CNTRL_RST 2 24837c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_L0_LPBK 1 24847c478bd9Sstevel@tonic-gate #define LPU_LTSSM_CONFIG5_CFG_UNUSED_2 0 24857c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1 0xe27a8 24867c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_RX_LN_EN_MSK 16 24877c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_RX_LN_EN_MSK_MASK 0xffff 24887c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_RX_ALGN_CMD 15 24897c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_MSTR_LN_SEL 14 24907c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_LNK_OT_RX 13 24917c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_LNK_OT_TX 12 24927c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_LN_RVRSD 11 24937c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_LNK_UP_DWN_STS 10 24947c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_LTSSM_STATE 4 24957c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_LTSSM_STATE_MASK 0x3f 24967c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_CNFG_LNK_WDTH 0 24977c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS1_CNFG_LNK_WDTH_MASK 0xf 24987c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS2 0xe27b0 24997c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS2_TX_CMD_TX_PHY 16 25007c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS2_TX_CMD_TX_PHY_MASK 0xffff 25017c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS2_RX_CMD_RX_PHY 0 25027c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS2_RX_CMD_RX_PHY_MASK 0xffff 25037c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS 0xe27b8 25047c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_ANY 31 25057c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_SKIP_OS 15 25067c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_FTS 14 25077c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TS2_RECOV 13 25087c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_8IDLE_DATA 12 25097c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_IDLE_DATA 11 25107c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TSX_POLL 10 25117c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TSX_INV 9 25127c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_EIDLE_EXIT 8 25137c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TSX_COMP 7 25147c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TSX_LB 6 25157c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TSX_DIS 5 25167c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TSX_RST 4 25177c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_EIDLE 3 25187c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TS2 2 25197c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_TS1 1 25207c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_INT_NONE 0 25217c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST 0xe27c0 25227c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_SKIP_OS 15 25237c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_FTS 14 25247c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TS2_RECOV 13 25257c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_8IDLE_DATA 12 25267c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_IDLE_DATA 11 25277c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TSX_POLL 10 25287c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TSX_INV 9 25297c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_EIDLE_EXIT 8 25307c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TSX_COMP 7 25317c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TSX_LB 6 25327c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TSX_DIS 5 25337c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TSX_RST 4 25347c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_EIDLE 3 25357c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TS2 2 25367c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_TS1 1 25377c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_AND_STATUS_TEST_TST_NONE 0 25387c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK 0xe27c8 25397c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_GLB 31 25407c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_SKIP_OS 15 25417c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_FTS 14 25427c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TS2_RECOV 13 25437c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_8IDLE_DATA 12 25447c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_IDLE_DATA 11 25457c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TSX_POLL 10 25467c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TSX_INV 9 25477c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_EIDLE_EXIT 8 25487c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TSX_COMP 7 25497c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TSX_LB 6 25507c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TSX_DIS 5 25517c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TSX_RST 4 25527c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_EIDLE 3 25537c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TS2 2 25547c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_TS1 1 25557c478bd9Sstevel@tonic-gate #define LPU_LTSSM_INTERRUPT_MASK_MSK_NONE 0 25567c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE 0xe27d0 25577c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE_UNUSED 11 25587c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE_UNUSED_MASK 0x1fffff 25597c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE1_LTSSM_STS2 10 25607c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE2_LTSSM_STS2 9 25617c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE1_LTSSM_STS1 8 25627c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE2_LTSSM_STS1 7 25637c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE3_LTSSM_STS1 6 25647c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE4_LTSSM_STS1 5 25657c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE5_LTSSM_STS1 4 25667c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE6_LTSSM_STS1 3 25677c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE7_LTSSM_STS1 2 25687c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE8_LTSSM_STS1 1 25697c478bd9Sstevel@tonic-gate #define LPU_LTSSM_STATUS_WRITE_ENABLE_WE9_LTSSM_STS1 0 25707c478bd9Sstevel@tonic-gate 25717c478bd9Sstevel@tonic-gate /* Reserved 0xe27d8 - 0xe27f8 */ 25727c478bd9Sstevel@tonic-gate 25737c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1 0xe2800 25747c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_UNUSED_CNTL1 28 25757c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_UNUSED_CNTL1_MASK 0xf 25767c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_STM_SEL 24 25777c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_STM_SEL_MASK 0xf 25787c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_UNUSED_CNTL2 22 25797c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_UNUSED_CNTL2_MASK 0x3 25807c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_REV_LPBK_SEL 20 25817c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_REV_LPBK_SEL_MASK 0x3 25827c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_REV_LPBK_MODE 19 25837c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_LPBK_ENB 18 25847c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_LPBK_MODE_SEL 16 25857c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_LPBK_MODE_SEL_MASK 0x3 25867c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_RXLOS_FLTR_EN 15 25877c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_RXLOS_ADJUST 12 25887c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_RXLOS_ADJUST_MASK 0x7 25897c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_RXLOS_SMPL_RT 8 25907c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_RXLOS_SMPL_RT_MASK 0xf 25917c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_RXLOS_THRSH_CN 0 25927c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG1_RXLOS_THRSH_CN_MASK 0xff 25937c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2 0xe2808 25947c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_VPULSE_CTL 30 25957c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_VPULSE_CTL_MASK 0x3 25967c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_VMUX_CTL 28 25977c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_VMUX_CTL_MASK 0x3 25987c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_RISE_FALL 25 25997c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_RISE_FALL_MASK 0x7 26007c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_PRE_EMPH 22 26017c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_PRE_EMPH_MASK 0x7 26027c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_VSWNG_CTL 18 26037c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_VSWNG_CTL_MASK 0xf 26047c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_PLL_ZERO_CTL 16 26057c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_PLL_ZERO_CTL_MASK 0x3 26067c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_PLL_POLE_CTL 14 26077c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_PLL_POLE_CTL_MASK 0x3 26087c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_PLL_ZERO_CTL 12 26097c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_PLL_ZERO_CTL_MASK 0x3 26107c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_PLL_POLE_CTL 10 26117c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_PLL_POLE_CTL_MASK 0x3 26127c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_EQLIZR_CTL 6 26137c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_EQLIZR_CTL_MASK 0xf 26147c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_OHM_SEL 5 26157c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RTRIMEN 4 26167c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_TERM 2 26177c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_TX_TERM_MASK 0x3 26187c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_TERM 0 26197c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG2_RX_TERM_MASK 0x3 26207c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3 0xe2810 26217c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_UNUSED_CNTL3 27 26227c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_UNUSED_CNTL3_MASK 0x1f 26237c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_OUT_BIAS_CTL 26 26247c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_TX_RCV_DET 24 26257c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_TX_RCV_DET_MASK 0x3 26267c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_TX_PLL_HLF_RT_CTL 23 26277c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_TX_PLL_FDBK_DIV 20 26287c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_TX_PLL_FDBK_DIV_MASK 0x7 26297c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_RX_PLL_HLF_RT_CTL 19 26307c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_RX_PLL_FDBK_DIV 16 26317c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_RX_PLL_FDBK_DIV_MASK 0x7 26327c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_BIT_LCK_TM 0 26337c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG3_BIT_LCK_TM_MASK 0xffff 26347c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG4 0xe2818 26357c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG4_CFG_UNUSED 20 26367c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG4_CFG_UNUSED_MASK 0xfff 26377c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG4_INIT_TIME 0 26387c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG4_INIT_TIME_MASK 0xfffff 26397c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_STATUS 0xe2820 26407c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_STATUS_RCV_ELECT_IDLE 16 26417c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_STATUS_RCV_ELECT_IDLE_MASK 0xffff 26427c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_STATUS_BIT_SYNC_DN 0 26437c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_STATUS_BIT_SYNC_DN_MASK 0xffff 26447c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS 0xe2828 26457c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_INT_GLOBL_UNMSK 31 26467c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_INT_UNUSED 16 26477c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_INT_UNUSED_MASK 0xff 26487c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_INT_BYTE_SYNC_STS 0 26497c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_INT_BYTE_SYNC_STS_MASK 0xffff 26507c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_TEST 0xe2830 26517c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_TEST_TST_W1S_INT 16 26527c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_TEST_TST_W1S_INT_MASK 0xff 26537c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_TEST_TST_BSSS_INT 0 26547c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_TEST_TST_BSSS_INT_MASK 0xffff 26557c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_MASK 0xe2838 26567c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_MASK_MSK_GLOBL_INT 31 26577c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_MASK_MSK_INT 0 26587c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_INTERRUPT_MASK_MSK_INT_MASK 0xffffff 26597c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN1 0xe2840 26607c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN1_TX_PWR_DN 16 26617c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN1_TX_PWR_DN_MASK 0xffff 26627c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN1_THE 0 26637c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN1_THE_MASK 0x1 26647c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN1_RX_PWR_DN 0 26657c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN1_RX_PWR_DN_MASK 0xffff 26667c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2 0xe2848 26677c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_PD_UNUSED 22 26687c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_PD_UNUSED_MASK 0x3ff 26697c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_PWR_DN_CLK_BUF 21 26707c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_PWR_DN_RES_TRIM 20 26717c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_TX_PLL_PWR_D 16 26727c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_TX_PLL_PWR_D_MASK 0xf 26737c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_RXLOS_PWR_DN 0 26747c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_POWER_DOWN2_RXLOS_PWR_DN_MASK 0xffff 26757c478bd9Sstevel@tonic-gate #define LPU_GIGABLAZE_GLUE_CONFIG5 0xe2850 26767c478bd9Sstevel@tonic-gate 26777c478bd9Sstevel@tonic-gate #ifdef __cplusplus 26787c478bd9Sstevel@tonic-gate } 26797c478bd9Sstevel@tonic-gate #endif 26807c478bd9Sstevel@tonic-gate 26817c478bd9Sstevel@tonic-gate #endif /* _SYS_PX_REGS_H */ 2682