1*7c478bd9Sstevel@tonic-gate /* 2*7c478bd9Sstevel@tonic-gate * CDDL HEADER START 3*7c478bd9Sstevel@tonic-gate * 4*7c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*7c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*7c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*7c478bd9Sstevel@tonic-gate * with the License. 8*7c478bd9Sstevel@tonic-gate * 9*7c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*7c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*7c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 12*7c478bd9Sstevel@tonic-gate * and limitations under the License. 13*7c478bd9Sstevel@tonic-gate * 14*7c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*7c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*7c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*7c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*7c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*7c478bd9Sstevel@tonic-gate * 20*7c478bd9Sstevel@tonic-gate * CDDL HEADER END 21*7c478bd9Sstevel@tonic-gate */ 22*7c478bd9Sstevel@tonic-gate /* 23*7c478bd9Sstevel@tonic-gate * Copyright 1999-2002 Sun Microsystems, Inc. All rights reserved. 24*7c478bd9Sstevel@tonic-gate * Use is subject to license terms. 25*7c478bd9Sstevel@tonic-gate */ 26*7c478bd9Sstevel@tonic-gate 27*7c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 28*7c478bd9Sstevel@tonic-gate 29*7c478bd9Sstevel@tonic-gate /* 30*7c478bd9Sstevel@tonic-gate * Schizo Power Management Driver 31*7c478bd9Sstevel@tonic-gate * 32*7c478bd9Sstevel@tonic-gate * This driver deals with Safari bus interface and it is used 33*7c478bd9Sstevel@tonic-gate * as part of the protocol to change the clock speed on Safari bus. 34*7c478bd9Sstevel@tonic-gate * 35*7c478bd9Sstevel@tonic-gate * The routine on this driver is referenced by Platform Power 36*7c478bd9Sstevel@tonic-gate * Management driver of systems like Excalibur. Driver is 37*7c478bd9Sstevel@tonic-gate * loaded because of an explicit dependency defined in PPM driver. 38*7c478bd9Sstevel@tonic-gate * PPM driver also attaches the driver. 39*7c478bd9Sstevel@tonic-gate */ 40*7c478bd9Sstevel@tonic-gate 41*7c478bd9Sstevel@tonic-gate #include <sys/types.h> 42*7c478bd9Sstevel@tonic-gate #include <sys/conf.h> 43*7c478bd9Sstevel@tonic-gate #include <sys/ddi.h> 44*7c478bd9Sstevel@tonic-gate #include <sys/sunddi.h> 45*7c478bd9Sstevel@tonic-gate #include <sys/modctl.h> 46*7c478bd9Sstevel@tonic-gate 47*7c478bd9Sstevel@tonic-gate 48*7c478bd9Sstevel@tonic-gate /* 49*7c478bd9Sstevel@tonic-gate * Function prototypes 50*7c478bd9Sstevel@tonic-gate */ 51*7c478bd9Sstevel@tonic-gate static int spm_attach(dev_info_t *, ddi_attach_cmd_t); 52*7c478bd9Sstevel@tonic-gate static int spm_detach(dev_info_t *, ddi_detach_cmd_t); 53*7c478bd9Sstevel@tonic-gate 54*7c478bd9Sstevel@tonic-gate /* 55*7c478bd9Sstevel@tonic-gate * Private data for schizo_pm driver 56*7c478bd9Sstevel@tonic-gate */ 57*7c478bd9Sstevel@tonic-gate static struct spm_soft_state { 58*7c478bd9Sstevel@tonic-gate dev_info_t *dip; 59*7c478bd9Sstevel@tonic-gate }; 60*7c478bd9Sstevel@tonic-gate 61*7c478bd9Sstevel@tonic-gate /* 62*7c478bd9Sstevel@tonic-gate * Configuration data structures 63*7c478bd9Sstevel@tonic-gate */ 64*7c478bd9Sstevel@tonic-gate static struct dev_ops spm_ops = { 65*7c478bd9Sstevel@tonic-gate DEVO_REV, /* devo_rev, */ 66*7c478bd9Sstevel@tonic-gate 0, /* refcnt */ 67*7c478bd9Sstevel@tonic-gate nodev, /* getinfo */ 68*7c478bd9Sstevel@tonic-gate nulldev, /* identify */ 69*7c478bd9Sstevel@tonic-gate nulldev, /* probe */ 70*7c478bd9Sstevel@tonic-gate spm_attach, /* attach */ 71*7c478bd9Sstevel@tonic-gate spm_detach, /* detach */ 72*7c478bd9Sstevel@tonic-gate nodev, /* reset */ 73*7c478bd9Sstevel@tonic-gate (struct cb_ops *)0, /* cb_ops */ 74*7c478bd9Sstevel@tonic-gate (struct bus_ops *)0, /* bus_ops */ 75*7c478bd9Sstevel@tonic-gate NULL /* power */ 76*7c478bd9Sstevel@tonic-gate }; 77*7c478bd9Sstevel@tonic-gate 78*7c478bd9Sstevel@tonic-gate /* 79*7c478bd9Sstevel@tonic-gate * Driver globals 80*7c478bd9Sstevel@tonic-gate */ 81*7c478bd9Sstevel@tonic-gate static void *spm_state; 82*7c478bd9Sstevel@tonic-gate static int spm_inst = -1; 83*7c478bd9Sstevel@tonic-gate 84*7c478bd9Sstevel@tonic-gate static struct modldrv modldrv = { 85*7c478bd9Sstevel@tonic-gate &mod_driverops, /* Type of module = driver */ 86*7c478bd9Sstevel@tonic-gate "schizo pm driver v%I%", /* name of module */ 87*7c478bd9Sstevel@tonic-gate &spm_ops, /* driver ops */ 88*7c478bd9Sstevel@tonic-gate }; 89*7c478bd9Sstevel@tonic-gate 90*7c478bd9Sstevel@tonic-gate static struct modlinkage modlinkage = { 91*7c478bd9Sstevel@tonic-gate MODREV_1, 92*7c478bd9Sstevel@tonic-gate (void *)&modldrv, 93*7c478bd9Sstevel@tonic-gate NULL 94*7c478bd9Sstevel@tonic-gate }; 95*7c478bd9Sstevel@tonic-gate 96*7c478bd9Sstevel@tonic-gate /* 97*7c478bd9Sstevel@tonic-gate * Schizo CSR E* bit masks 98*7c478bd9Sstevel@tonic-gate */ 99*7c478bd9Sstevel@tonic-gate #define SCHIZO_SAFARI_ECLK_32 0x20ULL 100*7c478bd9Sstevel@tonic-gate #define SCHIZO_SAFARI_ECLK_2 0x2ULL 101*7c478bd9Sstevel@tonic-gate #define SCHIZO_SAFARI_ECLK_1 0x1ULL 102*7c478bd9Sstevel@tonic-gate #define SCHIZO_SAFARI_ECLK_MASK (SCHIZO_SAFARI_ECLK_32 | \ 103*7c478bd9Sstevel@tonic-gate SCHIZO_SAFARI_ECLK_2 | SCHIZO_SAFARI_ECLK_1) 104*7c478bd9Sstevel@tonic-gate 105*7c478bd9Sstevel@tonic-gate /* 106*7c478bd9Sstevel@tonic-gate * bit masks to set schizo clock in parallel with setting cpu clock. 107*7c478bd9Sstevel@tonic-gate * Used when changing cpu speeds. 108*7c478bd9Sstevel@tonic-gate * 109*7c478bd9Sstevel@tonic-gate * NOTE: The order of entries must be from slowest to fastest. 110*7c478bd9Sstevel@tonic-gate */ 111*7c478bd9Sstevel@tonic-gate static const uint64_t schizo_safari_masks[] = { 112*7c478bd9Sstevel@tonic-gate SCHIZO_SAFARI_ECLK_32, 113*7c478bd9Sstevel@tonic-gate SCHIZO_SAFARI_ECLK_2, 114*7c478bd9Sstevel@tonic-gate SCHIZO_SAFARI_ECLK_1 115*7c478bd9Sstevel@tonic-gate }; 116*7c478bd9Sstevel@tonic-gate 117*7c478bd9Sstevel@tonic-gate /* 118*7c478bd9Sstevel@tonic-gate * Normally, the address of the registers we use would be accessed from 119*7c478bd9Sstevel@tonic-gate * our "official" private data. However, since the dip is not passed 120*7c478bd9Sstevel@tonic-gate * in when spm_change_speed (see below) is called, and since there is 121*7c478bd9Sstevel@tonic-gate * only one unit of the spm "device", we keep it here as a static. 122*7c478bd9Sstevel@tonic-gate */ 123*7c478bd9Sstevel@tonic-gate static volatile uint64_t *spm_schizo_csr; 124*7c478bd9Sstevel@tonic-gate ddi_acc_handle_t spm_schizo_handle; 125*7c478bd9Sstevel@tonic-gate 126*7c478bd9Sstevel@tonic-gate int 127*7c478bd9Sstevel@tonic-gate _init(void) 128*7c478bd9Sstevel@tonic-gate { 129*7c478bd9Sstevel@tonic-gate int error; 130*7c478bd9Sstevel@tonic-gate 131*7c478bd9Sstevel@tonic-gate if ((error = ddi_soft_state_init(&spm_state, 132*7c478bd9Sstevel@tonic-gate sizeof (struct spm_soft_state), 0)) != 0) 133*7c478bd9Sstevel@tonic-gate return (error); 134*7c478bd9Sstevel@tonic-gate 135*7c478bd9Sstevel@tonic-gate if ((error = mod_install(&modlinkage)) != 0) 136*7c478bd9Sstevel@tonic-gate ddi_soft_state_fini(&spm_state); 137*7c478bd9Sstevel@tonic-gate 138*7c478bd9Sstevel@tonic-gate return (error); 139*7c478bd9Sstevel@tonic-gate } 140*7c478bd9Sstevel@tonic-gate 141*7c478bd9Sstevel@tonic-gate int 142*7c478bd9Sstevel@tonic-gate _fini(void) 143*7c478bd9Sstevel@tonic-gate { 144*7c478bd9Sstevel@tonic-gate int error; 145*7c478bd9Sstevel@tonic-gate 146*7c478bd9Sstevel@tonic-gate if ((error = mod_remove(&modlinkage)) == 0) 147*7c478bd9Sstevel@tonic-gate ddi_soft_state_fini(&spm_state); 148*7c478bd9Sstevel@tonic-gate 149*7c478bd9Sstevel@tonic-gate return (error); 150*7c478bd9Sstevel@tonic-gate } 151*7c478bd9Sstevel@tonic-gate 152*7c478bd9Sstevel@tonic-gate int 153*7c478bd9Sstevel@tonic-gate _info(struct modinfo *modinfop) 154*7c478bd9Sstevel@tonic-gate { 155*7c478bd9Sstevel@tonic-gate return (mod_info(&modlinkage, modinfop)); 156*7c478bd9Sstevel@tonic-gate } 157*7c478bd9Sstevel@tonic-gate 158*7c478bd9Sstevel@tonic-gate static int 159*7c478bd9Sstevel@tonic-gate spm_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 160*7c478bd9Sstevel@tonic-gate { 161*7c478bd9Sstevel@tonic-gate int rv; 162*7c478bd9Sstevel@tonic-gate struct spm_soft_state *softsp; 163*7c478bd9Sstevel@tonic-gate ddi_device_acc_attr_t attr; 164*7c478bd9Sstevel@tonic-gate 165*7c478bd9Sstevel@tonic-gate switch (cmd) { 166*7c478bd9Sstevel@tonic-gate case DDI_ATTACH: 167*7c478bd9Sstevel@tonic-gate if (spm_inst != -1) { 168*7c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "spm_attach: " 169*7c478bd9Sstevel@tonic-gate "only one instance is allowed."); 170*7c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 171*7c478bd9Sstevel@tonic-gate } 172*7c478bd9Sstevel@tonic-gate 173*7c478bd9Sstevel@tonic-gate break; 174*7c478bd9Sstevel@tonic-gate case DDI_RESUME: 175*7c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 176*7c478bd9Sstevel@tonic-gate default: 177*7c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 178*7c478bd9Sstevel@tonic-gate } 179*7c478bd9Sstevel@tonic-gate 180*7c478bd9Sstevel@tonic-gate spm_inst = ddi_get_instance(dip); 181*7c478bd9Sstevel@tonic-gate 182*7c478bd9Sstevel@tonic-gate if (ddi_soft_state_zalloc(spm_state, spm_inst) != DDI_SUCCESS) { 183*7c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "spm_attach: can't allocate state."); 184*7c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 185*7c478bd9Sstevel@tonic-gate } 186*7c478bd9Sstevel@tonic-gate 187*7c478bd9Sstevel@tonic-gate if ((softsp = ddi_get_soft_state(spm_state, spm_inst)) == NULL) { 188*7c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "spm_attach: can't get state."); 189*7c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 190*7c478bd9Sstevel@tonic-gate } 191*7c478bd9Sstevel@tonic-gate 192*7c478bd9Sstevel@tonic-gate softsp->dip = dip; 193*7c478bd9Sstevel@tonic-gate attr.devacc_attr_version = DDI_DEVICE_ATTR_V0; 194*7c478bd9Sstevel@tonic-gate attr.devacc_attr_endian_flags = DDI_NEVERSWAP_ACC; 195*7c478bd9Sstevel@tonic-gate attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC; 196*7c478bd9Sstevel@tonic-gate 197*7c478bd9Sstevel@tonic-gate /* 198*7c478bd9Sstevel@tonic-gate * Map the Safari E* Control register. 199*7c478bd9Sstevel@tonic-gate */ 200*7c478bd9Sstevel@tonic-gate rv = ddi_regs_map_setup(dip, 0, 201*7c478bd9Sstevel@tonic-gate (caddr_t *)&spm_schizo_csr, 0, 8, &attr, &spm_schizo_handle); 202*7c478bd9Sstevel@tonic-gate if (rv != DDI_SUCCESS) { 203*7c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "spm_attach: can't map the register."); 204*7c478bd9Sstevel@tonic-gate ddi_soft_state_free(spm_state, spm_inst); 205*7c478bd9Sstevel@tonic-gate return (rv); 206*7c478bd9Sstevel@tonic-gate } 207*7c478bd9Sstevel@tonic-gate 208*7c478bd9Sstevel@tonic-gate ddi_report_dev(dip); 209*7c478bd9Sstevel@tonic-gate 210*7c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 211*7c478bd9Sstevel@tonic-gate } 212*7c478bd9Sstevel@tonic-gate 213*7c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 214*7c478bd9Sstevel@tonic-gate static int 215*7c478bd9Sstevel@tonic-gate spm_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 216*7c478bd9Sstevel@tonic-gate { 217*7c478bd9Sstevel@tonic-gate switch (cmd) { 218*7c478bd9Sstevel@tonic-gate case DDI_SUSPEND: 219*7c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 220*7c478bd9Sstevel@tonic-gate 221*7c478bd9Sstevel@tonic-gate case DDI_DETACH: 222*7c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 223*7c478bd9Sstevel@tonic-gate 224*7c478bd9Sstevel@tonic-gate default: 225*7c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 226*7c478bd9Sstevel@tonic-gate } 227*7c478bd9Sstevel@tonic-gate } 228*7c478bd9Sstevel@tonic-gate 229*7c478bd9Sstevel@tonic-gate /* 230*7c478bd9Sstevel@tonic-gate * This globally visible function is the main reason this driver exists. 231*7c478bd9Sstevel@tonic-gate * It will be called by a platform power management driver to write to 232*7c478bd9Sstevel@tonic-gate * the schizo ASIC csr which changes schizo's clock rate. This is a 233*7c478bd9Sstevel@tonic-gate * required step when changing the clock of the cpus. 234*7c478bd9Sstevel@tonic-gate * 235*7c478bd9Sstevel@tonic-gate * NOTE - The caller should enter this routine sequentially. 236*7c478bd9Sstevel@tonic-gate */ 237*7c478bd9Sstevel@tonic-gate void 238*7c478bd9Sstevel@tonic-gate spm_change_schizo_speed(int lvl_index) 239*7c478bd9Sstevel@tonic-gate { 240*7c478bd9Sstevel@tonic-gate uint64_t contents; 241*7c478bd9Sstevel@tonic-gate 242*7c478bd9Sstevel@tonic-gate ASSERT(lvl_index >= 0 && lvl_index <= 2); 243*7c478bd9Sstevel@tonic-gate contents = ddi_get64(spm_schizo_handle, (uint64_t *)spm_schizo_csr); 244*7c478bd9Sstevel@tonic-gate contents &= ~SCHIZO_SAFARI_ECLK_MASK; 245*7c478bd9Sstevel@tonic-gate contents |= schizo_safari_masks[ lvl_index ]; 246*7c478bd9Sstevel@tonic-gate ddi_put64(spm_schizo_handle, (uint64_t *)spm_schizo_csr, contents); 247*7c478bd9Sstevel@tonic-gate } 248