xref: /illumos-gate/usr/src/uts/sun4u/io/opl_cfg.c (revision 4fceebdf03eeac0d7c58a4f70cc19b00a8c40a73)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 #include <sys/conf.h>
29 #include <sys/kmem.h>
30 #include <sys/debug.h>
31 #include <sys/modctl.h>
32 #include <sys/autoconf.h>
33 #include <sys/hwconf.h>
34 #include <sys/ddi_impldefs.h>
35 #include <sys/ddi.h>
36 #include <sys/sunddi.h>
37 #include <sys/sunndi.h>
38 #include <sys/ndi_impldefs.h>
39 #include <sys/machsystm.h>
40 #include <sys/fcode.h>
41 #include <sys/promif.h>
42 #include <sys/promimpl.h>
43 #include <sys/opl_cfg.h>
44 #include <sys/scfd/scfostoescf.h>
45 
46 static unsigned int		opl_cfg_inited;
47 static opl_board_cfg_t		opl_boards[HWD_SBS_PER_DOMAIN];
48 
49 /*
50  * Module control operations
51  */
52 
53 extern struct mod_ops mod_miscops;
54 
55 static struct modlmisc modlmisc = {
56 	&mod_miscops,				/* Type of module */
57 	"OPL opl_cfg %I%"
58 };
59 
60 static struct modlinkage modlinkage = {
61 	MODREV_1, (void *)&modlmisc, NULL
62 };
63 
64 static int	opl_map_in(dev_info_t *, fco_handle_t, fc_ci_t *);
65 static int	opl_map_out(dev_info_t *, fco_handle_t, fc_ci_t *);
66 static int	opl_register_fetch(dev_info_t *, fco_handle_t, fc_ci_t *);
67 static int	opl_register_store(dev_info_t *, fco_handle_t, fc_ci_t *);
68 
69 static int	opl_claim_memory(dev_info_t *, fco_handle_t, fc_ci_t *);
70 static int	opl_release_memory(dev_info_t *, fco_handle_t, fc_ci_t *);
71 static int	opl_vtop(dev_info_t *, fco_handle_t, fc_ci_t *);
72 
73 static int	opl_config_child(dev_info_t *, fco_handle_t, fc_ci_t *);
74 
75 static int	opl_get_fcode_size(dev_info_t *, fco_handle_t, fc_ci_t *);
76 static int	opl_get_fcode(dev_info_t *, fco_handle_t, fc_ci_t *);
77 
78 static int	opl_map_phys(dev_info_t *, struct regspec *,  caddr_t *,
79 				ddi_device_acc_attr_t *, ddi_acc_handle_t *);
80 static void	opl_unmap_phys(ddi_acc_handle_t *);
81 static int	opl_get_hwd_va(dev_info_t *, fco_handle_t, fc_ci_t *);
82 static int	opl_master_interrupt(dev_info_t *, fco_handle_t, fc_ci_t *);
83 
84 extern int	prom_get_fcode_size(char *);
85 extern int	prom_get_fcode(char *, char *);
86 
87 static int	master_interrupt_init(uint32_t, uint32_t);
88 
89 #define	PROBE_STR_SIZE	64
90 #define	UNIT_ADDR_SIZE	64
91 
92 opl_fc_ops_t	opl_fc_ops[] = {
93 
94 	{	FC_MAP_IN,		opl_map_in},
95 	{	FC_MAP_OUT,		opl_map_out},
96 	{	"rx@",			opl_register_fetch},
97 	{	FC_RL_FETCH,		opl_register_fetch},
98 	{	FC_RW_FETCH,		opl_register_fetch},
99 	{	FC_RB_FETCH,		opl_register_fetch},
100 	{	"rx!",			opl_register_store},
101 	{	FC_RL_STORE,		opl_register_store},
102 	{	FC_RW_STORE,		opl_register_store},
103 	{	FC_RB_STORE,		opl_register_store},
104 	{	"claim-memory",		opl_claim_memory},
105 	{	"release-memory",	opl_release_memory},
106 	{	"vtop",			opl_vtop},
107 	{	FC_CONFIG_CHILD,	opl_config_child},
108 	{	FC_GET_FCODE_SIZE,	opl_get_fcode_size},
109 	{	FC_GET_FCODE,		opl_get_fcode},
110 	{	"get-hwd-va",		opl_get_hwd_va},
111 	{	"master-interrupt",	opl_master_interrupt},
112 	{	NULL,			NULL}
113 
114 };
115 
116 extern caddr_t	efcode_vaddr;
117 extern int	efcode_size;
118 
119 #ifdef DEBUG
120 #define	HWDDUMP_OFFSETS		1
121 #define	HWDDUMP_ALL_STATUS	2
122 #define	HWDDUMP_CHUNKS		3
123 #define	HWDDUMP_SBP		4
124 
125 int		hwddump_flags = HWDDUMP_SBP | HWDDUMP_CHUNKS;
126 #endif
127 
128 static int	master_interrupt_inited = 0;
129 
130 int
131 _init()
132 {
133 	int	err = 0;
134 
135 	/*
136 	 * Create a resource map for the contiguous memory allocated
137 	 * at start-of-day in startup.c
138 	 */
139 	err = ndi_ra_map_setup(ddi_root_node(), "opl-fcodemem");
140 	if (err == NDI_FAILURE) {
141 		cmn_err(CE_WARN, "Cannot setup resource map opl-fcodemem\n");
142 		return (1);
143 	}
144 
145 	/*
146 	 * Put the allocated memory into the pool.
147 	 */
148 	(void) ndi_ra_free(ddi_root_node(), (uint64_t)efcode_vaddr,
149 		(uint64_t)efcode_size, "opl-fcodemem", 0);
150 
151 	if ((err = mod_install(&modlinkage)) != 0) {
152 		cmn_err(CE_WARN, "opl_cfg failed to load, error=%d", err);
153 		(void) ndi_ra_map_destroy(ddi_root_node(), "opl-fcodemem");
154 	}
155 
156 	return (err);
157 }
158 
159 int
160 _fini(void)
161 {
162 	int ret;
163 
164 	ret = (mod_remove(&modlinkage));
165 	if (ret != 0)
166 		return (ret);
167 
168 	(void) ndi_ra_map_destroy(ddi_root_node(), "opl-fcodemem");
169 
170 	return (ret);
171 }
172 
173 int
174 _info(modinfop)
175 struct modinfo *modinfop;
176 {
177 	return (mod_info(&modlinkage, modinfop));
178 }
179 
180 #ifdef DEBUG
181 static void
182 opl_dump_hwd(opl_probe_t *probe)
183 {
184 	hwd_header_t		*hdrp;
185 	hwd_sb_status_t		*statp;
186 	hwd_domain_info_t	*dinfop;
187 	hwd_sb_t		*sbp;
188 	hwd_cpu_chip_t		*chips;
189 	hwd_pci_ch_t		*channels;
190 	int			board, i, status;
191 
192 	board = probe->pr_board;
193 
194 	hdrp = probe->pr_hdr;
195 	statp = probe->pr_sb_status;
196 	dinfop = probe->pr_dinfo;
197 	sbp = probe->pr_sb;
198 
199 	printf("HWD: board %d\n", board);
200 	printf("HWD:magic = 0x%x\n", hdrp->hdr_magic);
201 	printf("HWD:version = 0x%x.%x\n", hdrp->hdr_version.major,
202 	    hdrp->hdr_version.minor);
203 
204 	if (hwddump_flags & HWDDUMP_OFFSETS) {
205 		printf("HWD:status offset = 0x%x\n",
206 		    hdrp->hdr_sb_status_offset);
207 		printf("HWD:domain offset = 0x%x\n",
208 		    hdrp->hdr_domain_info_offset);
209 		printf("HWD:board offset = 0x%x\n", hdrp->hdr_sb_info_offset);
210 	}
211 
212 	if (hwddump_flags & HWDDUMP_SBP)
213 		printf("HWD:sb_t ptr = 0x%p\n", (void *)probe->pr_sb);
214 
215 	if (hwddump_flags & HWDDUMP_ALL_STATUS) {
216 		int bd;
217 		printf("HWD:board status =");
218 		for (bd = 0; bd < HWD_SBS_PER_DOMAIN; bd++)
219 			printf("%x ", statp->sb_status[bd]);
220 		printf("\n");
221 	} else {
222 		printf("HWD:board status = %d\n", statp->sb_status[board]);
223 	}
224 
225 	printf("HWD:banner name = %s\n", dinfop->dinf_banner_name);
226 	printf("HWD:platform = %s\n", dinfop->dinf_platform_token);
227 
228 	printf("HWD:chip status:\n");
229 	chips = &sbp->sb_cmu.cmu_cpu_chips[0];
230 	for (i = 0; i < HWD_CPU_CHIPS_PER_CMU; i++) {
231 
232 		status = chips[i].chip_status;
233 		printf("chip[%d] = ", i);
234 		if (HWD_STATUS_NONE(status))
235 			printf("none");
236 		else if (HWD_STATUS_FAILED(status))
237 			printf("fail");
238 		else if (HWD_STATUS_OK(status))
239 			printf("ok");
240 		printf("\n");
241 	}
242 
243 	if (hwddump_flags & HWDDUMP_CHUNKS) {
244 		int chunk;
245 		hwd_memory_t *mem = &sbp->sb_cmu.cmu_memory;
246 		printf("HWD:chunks:\n");
247 		for (chunk = 0; chunk < HWD_MAX_MEM_CHUNKS; chunk++)
248 			printf("\t%d 0x%lx 0x%lx\n", chunk,
249 			    mem->mem_chunks[chunk].chnk_start_address,
250 			    mem->mem_chunks[chunk].chnk_size);
251 	}
252 
253 	printf("HWD:channel status:\n");
254 	channels = &sbp->sb_pci_ch[0];
255 	for (i = 0; i < HWD_PCI_CHANNELS_PER_SB; i++) {
256 
257 		status = channels[i].pci_status;
258 		printf("channels[%d] = ", i);
259 		if (HWD_STATUS_NONE(status))
260 			printf("none");
261 		else if (HWD_STATUS_FAILED(status))
262 			printf("fail");
263 		else if (HWD_STATUS_OK(status))
264 			printf("ok");
265 		printf("\n");
266 	}
267 	printf("channels[%d] = ", i);
268 	status = sbp->sb_cmu.cmu_ch.chan_status;
269 	if (HWD_STATUS_NONE(status))
270 		printf("none");
271 	else if (HWD_STATUS_FAILED(status))
272 		printf("fail");
273 	else if (HWD_STATUS_OK(status))
274 		printf("ok");
275 	printf("\n");
276 }
277 #endif /* DEBUG */
278 
279 #ifdef UCTEST
280 	/*
281 	 * For SesamI debugging, just map the SRAM directly to a kernel
282 	 * VA and read it out from there
283 	 */
284 
285 #include <sys/vmem.h>
286 #include <vm/seg_kmem.h>
287 
288 /*
289  * 0x4081F1323000LL is the HWD base address for LSB 0. But we need to map
290  * at page boundaries. So, we use a base address of 0x4081F1322000LL.
291  * Note that this has to match the HWD base pa set in .sesami-common-defs.
292  *
293  * The size specified for the HWD in the SCF spec is 36K. But since
294  * we adjusted the base address by 4K, we need to use 40K for the
295  * mapping size to cover the HWD. And 40K is also a multiple of the
296  * base page size.
297  */
298 #define	OPL_HWD_BASE(lsb)       \
299 (0x4081F1322000LL | (((uint64_t)(lsb)) << 40))
300 
301 	void    *opl_hwd_vaddr;
302 #endif /* UCTEST */
303 
304 /*
305  * Get the hardware descriptor from SCF.
306  */
307 
308 /*ARGSUSED*/
309 int
310 opl_read_hwd(int board, hwd_header_t **hdrp, hwd_sb_status_t **statp,
311 	hwd_domain_info_t **dinfop, hwd_sb_t **sbp)
312 {
313 	static int (*getinfop)(uint32_t, uint8_t, uint32_t, uint32_t *,
314 	    void *) = NULL;
315 	void *hwdp;
316 
317 	uint32_t key = KEY_ESCF;	/* required value */
318 	uint8_t  type = 0x40;		/* SUB_OS_RECEIVE_HWD */
319 	uint32_t transid = board;
320 	uint32_t datasize = HWD_DATA_SIZE;
321 
322 	hwd_header_t		*hd;
323 	hwd_sb_status_t		*st;
324 	hwd_domain_info_t	*di;
325 	hwd_sb_t		*sb;
326 
327 	int	ret;
328 
329 	if (opl_boards[board].cfg_hwd == NULL) {
330 #ifdef UCTEST
331 		/*
332 		 * Just map the HWD in SRAM to a kernel VA
333 		 */
334 
335 		size_t			size;
336 		pfn_t			pfn;
337 
338 		size = 0xA000;
339 
340 		opl_hwd_vaddr = vmem_alloc(heap_arena, size, VM_SLEEP);
341 		if (opl_hwd_vaddr == NULL) {
342 			cmn_err(CE_NOTE, "No space for HWD");
343 			return (-1);
344 		}
345 
346 		pfn = btop(OPL_HWD_BASE(board));
347 		hat_devload(kas.a_hat, opl_hwd_vaddr, size, pfn, PROT_READ,
348 		    HAT_LOAD_NOCONSIST | HAT_LOAD_LOCK);
349 
350 		hwdp = (void *)((char *)opl_hwd_vaddr + 0x1000);
351 		opl_boards[board].cfg_hwd = hwdp;
352 		ret = 0;
353 #else
354 
355 		/* find the scf_service_getinfo() function */
356 		if (getinfop == NULL)
357 			getinfop = (int (*)(uint32_t, uint8_t, uint32_t,
358 			    uint32_t *,
359 			    void *))modgetsymvalue("scf_service_getinfo", 0);
360 
361 		if (getinfop == NULL)
362 			return (-1);
363 
364 		/* allocate memory to receive the data */
365 		hwdp = kmem_alloc(HWD_DATA_SIZE, KM_SLEEP);
366 
367 		/* get the HWD */
368 		ret = (*getinfop)(key, type, transid, &datasize, hwdp);
369 		if (ret == 0)
370 			opl_boards[board].cfg_hwd = hwdp;
371 		else
372 			kmem_free(hwdp, HWD_DATA_SIZE);
373 #endif
374 	} else {
375 		hwdp = opl_boards[board].cfg_hwd;
376 		ret = 0;
377 	}
378 
379 	/* copy the data to the destination */
380 	if (ret == 0) {
381 		hd = (hwd_header_t *)hwdp;
382 		st = (hwd_sb_status_t *)
383 		    ((char *)hwdp + hd->hdr_sb_status_offset);
384 		di = (hwd_domain_info_t *)
385 		    ((char *)hwdp + hd->hdr_domain_info_offset);
386 		sb = (hwd_sb_t *)
387 		    ((char *)hwdp + hd->hdr_sb_info_offset);
388 		if (hdrp != NULL)
389 			*hdrp = hd;
390 		if (statp != NULL)
391 			*statp = st;
392 		if (dinfop != NULL)
393 			*dinfop = di;
394 		if (sbp != NULL)
395 			*sbp = sb;
396 	}
397 
398 	return (ret);
399 }
400 
401 /*
402  * The opl_probe_t probe structure is used to pass all sorts of parameters
403  * to callback functions during probing. It also contains a snapshot of
404  * the hardware descriptor that is taken at the beginning of a probe.
405  */
406 static int
407 opl_probe_init(opl_probe_t *probe)
408 {
409 	hwd_header_t		**hdrp;
410 	hwd_sb_status_t		**statp;
411 	hwd_domain_info_t	**dinfop;
412 	hwd_sb_t		**sbp;
413 	int			board, ret;
414 
415 	board = probe->pr_board;
416 
417 	hdrp = &probe->pr_hdr;
418 	statp = &probe->pr_sb_status;
419 	dinfop = &probe->pr_dinfo;
420 	sbp = &probe->pr_sb;
421 
422 	/*
423 	 * Read the hardware descriptor.
424 	 */
425 	ret = opl_read_hwd(board, hdrp, statp, dinfop, sbp);
426 	if (ret != 0) {
427 
428 		cmn_err(CE_WARN, "IKP: failed to read HWD header");
429 		return (-1);
430 	}
431 
432 #ifdef DEBUG
433 	opl_dump_hwd(probe);
434 #endif
435 	return (0);
436 }
437 
438 /*
439  * This function is used to obtain pointers to relevant device nodes
440  * which are created by Solaris at boot time.
441  *
442  * This function walks the child nodes of a given node, extracts
443  * the "name" property, if it exists, and passes the node to a
444  * callback init function. The callback determines if this node is
445  * interesting or not. If it is, then a pointer to the node is
446  * stored away by the callback for use during unprobe.
447  *
448  * The DDI get property function allocates storage for the name
449  * property. That needs to be freed within this function.
450  */
451 static int
452 opl_init_nodes(dev_info_t *parent, opl_init_func_t init)
453 {
454 	dev_info_t	*node;
455 	char		*name;
456 	int 		circ, ret;
457 	int		len;
458 
459 	ASSERT(parent != NULL);
460 
461 	/*
462 	 * Hold parent node busy to walk its child list
463 	 */
464 	ndi_devi_enter(parent, &circ);
465 	node = ddi_get_child(parent);
466 
467 	while (node != NULL) {
468 
469 		ret = OPL_GET_PROP(string, node, "name", &name, &len);
470 		if (ret != DDI_PROP_SUCCESS) {
471 			/*
472 			 * The property does not exist for this node.
473 			 */
474 			node = ddi_get_next_sibling(node);
475 			continue;
476 		}
477 
478 		ret = init(node, name, len);
479 		kmem_free(name, len);
480 		if (ret != 0) {
481 
482 			ndi_devi_exit(parent, circ);
483 			return (-1);
484 		}
485 
486 		node = ddi_get_next_sibling(node);
487 	}
488 
489 	ndi_devi_exit(parent, circ);
490 
491 	return (0);
492 }
493 
494 /*
495  * This init function finds all the interesting nodes under the
496  * root node and stores pointers to them. The following nodes
497  * are considered interesting by this implementation:
498  *
499  *	"cmp"
500  *		These are nodes that represent processor chips.
501  *
502  *	"pci"
503  *		These are nodes that represent PCI leaves.
504  *
505  *	"pseudo-mc"
506  *		These are nodes that contain memory information.
507  */
508 static int
509 opl_init_root_nodes(dev_info_t *node, char *name, int len)
510 {
511 	int		portid, board, chip, channel, leaf;
512 	int		ret;
513 
514 	if (strncmp(name, OPL_CPU_CHIP_NODE, len) == 0) {
515 
516 		ret = OPL_GET_PROP(int, node, "portid", &portid, -1);
517 		if (ret != DDI_PROP_SUCCESS)
518 			return (-1);
519 
520 		ret = OPL_GET_PROP(int, node, "board#", &board, -1);
521 		if (ret != DDI_PROP_SUCCESS)
522 			return (-1);
523 
524 		chip = OPL_CPU_CHIP(portid);
525 		opl_boards[board].cfg_cpu_chips[chip] = node;
526 
527 	} else if (strncmp(name, OPL_PCI_LEAF_NODE, len) == 0) {
528 
529 		ret = OPL_GET_PROP(int, node, "portid", &portid, -1);
530 		if (ret != DDI_PROP_SUCCESS)
531 			return (-1);
532 
533 		board = OPL_IO_PORTID_TO_LSB(portid);
534 		channel = OPL_PORTID_TO_CHANNEL(portid);
535 
536 		if (channel == OPL_CMU_CHANNEL) {
537 
538 			opl_boards[board].cfg_cmuch_leaf = node;
539 
540 		} else {
541 
542 			leaf = OPL_PORTID_TO_LEAF(portid);
543 			opl_boards[board].cfg_pcich_leaf[channel][leaf] = node;
544 		}
545 	} else if (strncmp(name, OPL_PSEUDO_MC_NODE, len) == 0) {
546 
547 		ret = OPL_GET_PROP(int, node, "board#", &board, -1);
548 		if (ret != DDI_PROP_SUCCESS)
549 			return (-1);
550 
551 		ASSERT((board >= 0) && (board < HWD_SBS_PER_DOMAIN));
552 
553 		opl_boards[board].cfg_pseudo_mc = node;
554 	}
555 
556 	return (0);
557 }
558 
559 /*
560  * This function initializes the OPL IKP feature. Currently, all it does
561  * is find the interesting nodes that Solaris has created at boot time
562  * for boards present at boot time and store pointers to them. This
563  * is useful if those boards are unprobed by DR.
564  */
565 int
566 opl_init_cfg()
567 {
568 	dev_info_t	*root;
569 
570 	if (opl_cfg_inited == 0) {
571 
572 		root = ddi_root_node();
573 		if ((opl_init_nodes(root, opl_init_root_nodes) != 0)) {
574 			cmn_err(CE_WARN, "IKP: init failed");
575 			return (1);
576 		}
577 
578 		opl_cfg_inited = 1;
579 	}
580 
581 	return (0);
582 }
583 
584 /*
585  * When DR is initialized, we walk the device tree and acquire a hold on
586  * all the nodes that are interesting to IKP. This is so that the corresponding
587  * branches cannot be deleted.
588  *
589  * The following function informs the walk about which nodes are interesting
590  * so that it can hold the corresponding branches.
591  */
592 static int
593 opl_hold_node(char *name)
594 {
595 	/*
596 	 * We only need to hold/release the following nodes which
597 	 * represent separate branches that must be managed.
598 	 */
599 	return ((strcmp(name, OPL_CPU_CHIP_NODE) == 0) ||
600 		(strcmp(name, OPL_PSEUDO_MC_NODE) == 0) ||
601 		(strcmp(name, OPL_PCI_LEAF_NODE) == 0));
602 }
603 
604 static int
605 opl_hold_rele_devtree(dev_info_t *rdip, void *arg)
606 {
607 
608 	int	*holdp = (int *)arg;
609 	char	*name = ddi_node_name(rdip);
610 
611 	/*
612 	 * We only need to hold/release the following nodes which
613 	 * represent separate branches that must be managed.
614 	 */
615 	if (opl_hold_node(name) == 0) {
616 		/* Not of interest to us */
617 		return (DDI_WALK_PRUNECHILD);
618 	}
619 	if (*holdp) {
620 		ASSERT(!e_ddi_branch_held(rdip));
621 		e_ddi_branch_hold(rdip);
622 	} else {
623 		ASSERT(e_ddi_branch_held(rdip));
624 		e_ddi_branch_rele(rdip);
625 	}
626 
627 	return (DDI_WALK_PRUNECHILD);
628 }
629 
630 void
631 opl_hold_devtree()
632 {
633 	dev_info_t *dip;
634 	int circ;
635 	int hold = 1;
636 
637 	dip = ddi_root_node();
638 	ndi_devi_enter(dip, &circ);
639 	ddi_walk_devs(ddi_get_child(dip), opl_hold_rele_devtree, &hold);
640 	ndi_devi_exit(dip, circ);
641 }
642 
643 void
644 opl_release_devtree()
645 {
646 	dev_info_t *dip;
647 	int circ;
648 	int hold = 0;
649 
650 	dip = ddi_root_node();
651 	ndi_devi_enter(dip, &circ);
652 	ddi_walk_devs(ddi_get_child(dip), opl_hold_rele_devtree, &hold);
653 	ndi_devi_exit(dip, circ);
654 }
655 
656 /*
657  * This is a helper function that allows opl_create_node() to return a
658  * pointer to a newly created node to its caller.
659  */
660 /*ARGSUSED*/
661 static void
662 opl_set_node(dev_info_t *node, void *arg, uint_t flags)
663 {
664 	opl_probe_t	*probe;
665 
666 	probe = arg;
667 	probe->pr_node = node;
668 }
669 
670 /*
671  * Function to create a node in the device tree under a specified parent.
672  *
673  * e_ddi_branch_create() allows the creation of a whole branch with a
674  * single call of the function. However, we only use it to create one node
675  * at a time in the case of non-I/O device nodes. In other words, we
676  * create branches by repeatedly using this function. This makes the
677  * code more readable.
678  *
679  * The branch descriptor passed to e_ddi_branch_create() takes two
680  * callbacks. The create() callback is used to set the properties of a
681  * newly created node. The other callback is used to return a pointer
682  * to the newly created node. The create() callback is passed by the
683  * caller of this function based on the kind of node he wishes to
684  * create.
685  *
686  * e_ddi_branch_create() returns with the newly created node held. We
687  * only need to hold the top nodes of the branches we create. We release
688  * the hold for the others. E.g., the "cmp" node needs to be held. Since
689  * we hold the "cmp" node, there is no need to hold the "core" and "cpu"
690  * nodes below it.
691  */
692 static dev_info_t *
693 opl_create_node(opl_probe_t *probe)
694 {
695 	devi_branch_t	branch;
696 
697 	probe->pr_node = NULL;
698 
699 	branch.arg = probe;
700 	branch.type = DEVI_BRANCH_SID;
701 	branch.create.sid_branch_create = probe->pr_create;
702 	branch.devi_branch_callback = opl_set_node;
703 
704 	if (e_ddi_branch_create(probe->pr_parent, &branch, NULL, 0) != 0)
705 		return (NULL);
706 
707 	ASSERT(probe->pr_node != NULL);
708 
709 	if (probe->pr_hold == 0)
710 		e_ddi_branch_rele(probe->pr_node);
711 
712 	return (probe->pr_node);
713 }
714 
715 /*
716  * Function to tear down a whole branch rooted at the specified node.
717  *
718  * Although we create each node of a branch individually, we destroy
719  * a whole branch in one call. This is more efficient.
720  */
721 static int
722 opl_destroy_node(dev_info_t *node)
723 {
724 	if (e_ddi_branch_destroy(node, NULL, 0) != 0) {
725 		char *path = kmem_alloc(MAXPATHLEN, KM_SLEEP);
726 		(void) ddi_pathname(node, path);
727 		cmn_err(CE_WARN, "OPL node removal failed: %s (%p)",
728 			    path, (void *)node);
729 		kmem_free(path, MAXPATHLEN);
730 		return (-1);
731 	}
732 
733 	return (0);
734 }
735 
736 /*
737  * Set the properties for a "cpu" node.
738  */
739 /*ARGSUSED*/
740 static int
741 opl_create_cpu(dev_info_t *node, void *arg, uint_t flags)
742 {
743 	opl_probe_t	*probe;
744 	hwd_cpu_chip_t	*chip;
745 	hwd_core_t	*core;
746 	hwd_cpu_t	*cpu;
747 	int		ret;
748 
749 	probe = arg;
750 	chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
751 	core = &chip->chip_cores[probe->pr_core];
752 	cpu = &core->core_cpus[probe->pr_cpu];
753 	OPL_UPDATE_PROP(string, node, "name", OPL_CPU_NODE);
754 	OPL_UPDATE_PROP(string, node, "device_type", OPL_CPU_NODE);
755 
756 	OPL_UPDATE_PROP(int, node, "cpuid", cpu->cpu_cpuid);
757 	OPL_UPDATE_PROP(int, node, "reg", probe->pr_cpu);
758 
759 	OPL_UPDATE_PROP(string, node, "status", "okay");
760 
761 	return (DDI_WALK_TERMINATE);
762 }
763 
764 /*
765  * Create "cpu" nodes as child nodes of a given "core" node.
766  */
767 static int
768 opl_probe_cpus(opl_probe_t *probe)
769 {
770 	int		i;
771 	hwd_cpu_chip_t	*chip;
772 	hwd_core_t	*core;
773 	hwd_cpu_t	*cpus;
774 
775 	chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
776 	core = &chip->chip_cores[probe->pr_core];
777 	cpus = &core->core_cpus[0];
778 
779 	for (i = 0; i < HWD_CPUS_PER_CORE; i++) {
780 
781 		/*
782 		 * Olympus-C has 2 cpus per core.
783 		 * Jupiter has 4 cpus per core.
784 		 * For the Olympus-C based platform, we expect the cpu_status
785 		 * of the non-existent cpus to be set to missing.
786 		 */
787 		if (!HWD_STATUS_OK(cpus[i].cpu_status))
788 			continue;
789 
790 		probe->pr_create = opl_create_cpu;
791 		probe->pr_cpu = i;
792 		if (opl_create_node(probe) == NULL) {
793 
794 			cmn_err(CE_WARN, "IKP: create cpu (%d-%d-%d-%d) failed",
795 				probe->pr_board, probe->pr_cpu_chip,
796 				probe->pr_core, probe->pr_cpu);
797 			return (-1);
798 		}
799 	}
800 
801 	return (0);
802 }
803 
804 /*
805  * Set the properties for a "core" node.
806  */
807 /*ARGSUSED*/
808 static int
809 opl_create_core(dev_info_t *node, void *arg, uint_t flags)
810 {
811 	opl_probe_t	*probe;
812 	hwd_cpu_chip_t	*chip;
813 	hwd_core_t	*core;
814 	int		sharing[2];
815 	int		ret;
816 
817 	probe = arg;
818 	chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
819 	core = &chip->chip_cores[probe->pr_core];
820 
821 	OPL_UPDATE_PROP(string, node, "name", OPL_CORE_NODE);
822 	OPL_UPDATE_PROP(string, node, "device_type", OPL_CORE_NODE);
823 	OPL_UPDATE_PROP(string, node, "compatible", chip->chip_compatible);
824 
825 	OPL_UPDATE_PROP(int, node, "reg", probe->pr_core);
826 	OPL_UPDATE_PROP(int, node, "manufacturer#", core->core_manufacturer);
827 	OPL_UPDATE_PROP(int, node, "implementation#",
828 	    core->core_implementation);
829 	OPL_UPDATE_PROP(int, node, "mask#", core->core_mask);
830 
831 	OPL_UPDATE_PROP(int, node, "sparc-version", core->core_version);
832 	OPL_UPDATE_PROP(int, node, "clock-frequency", core->core_frequency);
833 
834 	OPL_UPDATE_PROP(int, node, "l1-icache-size", core->core_l1_icache_size);
835 	OPL_UPDATE_PROP(int, node, "l1-icache-line-size",
836 	    core->core_l1_icache_line_size);
837 	OPL_UPDATE_PROP(int, node, "l1-icache-associativity",
838 	    core->core_l1_icache_associativity);
839 	OPL_UPDATE_PROP(int, node, "#itlb-entries",
840 	    core->core_num_itlb_entries);
841 
842 	OPL_UPDATE_PROP(int, node, "l1-dcache-size", core->core_l1_dcache_size);
843 	OPL_UPDATE_PROP(int, node, "l1-dcache-line-size",
844 	    core->core_l1_dcache_line_size);
845 	OPL_UPDATE_PROP(int, node, "l1-dcache-associativity",
846 	    core->core_l1_dcache_associativity);
847 	OPL_UPDATE_PROP(int, node, "#dtlb-entries",
848 	    core->core_num_dtlb_entries);
849 
850 	OPL_UPDATE_PROP(int, node, "l2-cache-size", core->core_l2_cache_size);
851 	OPL_UPDATE_PROP(int, node, "l2-cache-line-size",
852 	    core->core_l2_cache_line_size);
853 	OPL_UPDATE_PROP(int, node, "l2-cache-associativity",
854 	    core->core_l2_cache_associativity);
855 	sharing[0] = 0;
856 	sharing[1] = core->core_l2_cache_sharing;
857 	OPL_UPDATE_PROP_ARRAY(int, node, "l2-cache-sharing", sharing, 2);
858 
859 	OPL_UPDATE_PROP(string, node, "status", "okay");
860 
861 	return (DDI_WALK_TERMINATE);
862 }
863 
864 /*
865  * Create "core" nodes as child nodes of a given "cmp" node.
866  *
867  * Create the branch below each "core" node".
868  */
869 static int
870 opl_probe_cores(opl_probe_t *probe)
871 {
872 	int		i;
873 	hwd_cpu_chip_t	*chip;
874 	hwd_core_t	*cores;
875 	dev_info_t	*parent, *node;
876 
877 	chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
878 	cores = &chip->chip_cores[0];
879 	parent = probe->pr_parent;
880 
881 	for (i = 0; i < HWD_CORES_PER_CPU_CHIP; i++) {
882 
883 		if (!HWD_STATUS_OK(cores[i].core_status))
884 			continue;
885 
886 		probe->pr_parent = parent;
887 		probe->pr_create = opl_create_core;
888 		probe->pr_core = i;
889 		node = opl_create_node(probe);
890 		if (node == NULL) {
891 
892 			cmn_err(CE_WARN, "IKP: create core (%d-%d-%d) failed",
893 				probe->pr_board, probe->pr_cpu_chip,
894 				probe->pr_core);
895 			return (-1);
896 		}
897 
898 		/*
899 		 * Create "cpu" nodes below "core".
900 		 */
901 		probe->pr_parent = node;
902 		if (opl_probe_cpus(probe) != 0)
903 			return (-1);
904 	}
905 
906 	return (0);
907 }
908 
909 /*
910  * Set the properties for a "cmp" node.
911  */
912 /*ARGSUSED*/
913 static int
914 opl_create_cpu_chip(dev_info_t *node, void *arg, uint_t flags)
915 {
916 	opl_probe_t	*probe;
917 	hwd_cpu_chip_t	*chip;
918 	opl_range_t	range;
919 	uint64_t	dummy_addr;
920 	int		ret;
921 
922 	probe = arg;
923 	chip = &probe->pr_sb->sb_cmu.cmu_cpu_chips[probe->pr_cpu_chip];
924 
925 	OPL_UPDATE_PROP(string, node, "name", OPL_CPU_CHIP_NODE);
926 
927 	OPL_UPDATE_PROP(int, node, "portid", chip->chip_portid);
928 	OPL_UPDATE_PROP(int, node, "board#", probe->pr_board);
929 
930 	dummy_addr = OPL_PROC_AS(probe->pr_board, probe->pr_cpu_chip);
931 	range.rg_addr_hi = OPL_HI(dummy_addr);
932 	range.rg_addr_lo = OPL_LO(dummy_addr);
933 	range.rg_size_hi = 0;
934 	range.rg_size_lo = 0;
935 	OPL_UPDATE_PROP_ARRAY(int, node, "reg", (int *)&range, 4);
936 
937 	OPL_UPDATE_PROP(int, node, "#address-cells", 1);
938 	OPL_UPDATE_PROP(int, node, "#size-cells", 0);
939 
940 	OPL_UPDATE_PROP(string, node, "status", "okay");
941 
942 	return (DDI_WALK_TERMINATE);
943 }
944 
945 /*
946  * Create "cmp" nodes as child nodes of the root node.
947  *
948  * Create the branch below each "cmp" node.
949  */
950 static int
951 opl_probe_cpu_chips(opl_probe_t *probe)
952 {
953 	int		i;
954 	dev_info_t	**cfg_cpu_chips;
955 	hwd_cpu_chip_t	*chips;
956 	dev_info_t	*node;
957 
958 	cfg_cpu_chips = opl_boards[probe->pr_board].cfg_cpu_chips;
959 	chips = &probe->pr_sb->sb_cmu.cmu_cpu_chips[0];
960 
961 	for (i = 0; i < HWD_CPU_CHIPS_PER_CMU; i++) {
962 
963 		ASSERT(cfg_cpu_chips[i] == NULL);
964 
965 		if (!HWD_STATUS_OK(chips[i].chip_status))
966 			continue;
967 
968 		probe->pr_parent = ddi_root_node();
969 		probe->pr_create = opl_create_cpu_chip;
970 		probe->pr_cpu_chip = i;
971 		probe->pr_hold = 1;
972 		node = opl_create_node(probe);
973 		if (node == NULL) {
974 
975 			cmn_err(CE_WARN, "IKP: create chip (%d-%d) failed",
976 				probe->pr_board, probe->pr_cpu_chip);
977 			return (-1);
978 		}
979 
980 		cfg_cpu_chips[i] = node;
981 
982 		/*
983 		 * Create "core" nodes below "cmp".
984 		 * We hold the "cmp" node. So, there is no need to hold
985 		 * the "core" and "cpu" nodes below it.
986 		 */
987 		probe->pr_parent = node;
988 		probe->pr_hold = 0;
989 		if (opl_probe_cores(probe) != 0)
990 			return (-1);
991 	}
992 
993 	return (0);
994 }
995 
996 /*
997  * Set the properties for a "pseudo-mc" node.
998  */
999 /*ARGSUSED*/
1000 static int
1001 opl_create_pseudo_mc(dev_info_t *node, void *arg, uint_t flags)
1002 {
1003 	opl_probe_t	*probe;
1004 	int		board, portid;
1005 	hwd_bank_t	*bank;
1006 	hwd_memory_t	*mem;
1007 	opl_range_t	range;
1008 	opl_mc_addr_t	mc[HWD_BANKS_PER_CMU];
1009 	int		status[2][7];
1010 	int		i, j;
1011 	int		ret;
1012 
1013 	probe = arg;
1014 	board = probe->pr_board;
1015 
1016 	OPL_UPDATE_PROP(string, node, "name", OPL_PSEUDO_MC_NODE);
1017 	OPL_UPDATE_PROP(string, node, "device_type", "memory-controller");
1018 	OPL_UPDATE_PROP(string, node, "compatible", "FJSV,oplmc");
1019 
1020 	portid = OPL_LSB_TO_PSEUDOMC_PORTID(board);
1021 	OPL_UPDATE_PROP(int, node, "portid", portid);
1022 
1023 	range.rg_addr_hi = OPL_HI(OPL_MC_AS(board));
1024 	range.rg_addr_lo = 0x200;
1025 	range.rg_size_hi = 0;
1026 	range.rg_size_lo = 0;
1027 	OPL_UPDATE_PROP_ARRAY(int, node, "reg", (int *)&range, 4);
1028 
1029 	OPL_UPDATE_PROP(int, node, "board#", board);
1030 	OPL_UPDATE_PROP(int, node, "physical-board#",
1031 	    probe->pr_sb->sb_psb_number);
1032 
1033 	OPL_UPDATE_PROP(int, node, "#address-cells", 1);
1034 	OPL_UPDATE_PROP(int, node, "#size-cells", 2);
1035 
1036 	mem = &probe->pr_sb->sb_cmu.cmu_memory;
1037 
1038 	range.rg_addr_hi = OPL_HI(mem->mem_start_address);
1039 	range.rg_addr_lo = OPL_LO(mem->mem_start_address);
1040 	range.rg_size_hi = OPL_HI(mem->mem_size);
1041 	range.rg_size_lo = OPL_LO(mem->mem_size);
1042 	OPL_UPDATE_PROP_ARRAY(int, node, "sb-mem-ranges", (int *)&range, 4);
1043 
1044 	bank = probe->pr_sb->sb_cmu.cmu_memory.mem_banks;
1045 	for (i = 0, j = 0; i < HWD_BANKS_PER_CMU; i++) {
1046 
1047 		if (!HWD_STATUS_OK(bank[i].bank_status))
1048 			continue;
1049 
1050 		mc[j].mc_bank = i;
1051 		mc[j].mc_hi = OPL_HI(bank[i].bank_register_address);
1052 		mc[j].mc_lo = OPL_LO(bank[i].bank_register_address);
1053 		j++;
1054 	}
1055 
1056 	if (j > 0) {
1057 		OPL_UPDATE_PROP_ARRAY(int, node, "mc-addr", (int *)mc, j*3);
1058 	} else {
1059 		/*
1060 		 * If there is no memory, we need the mc-addr property, but
1061 		 * it is length 0.  The only way to do this using ndi seems
1062 		 * to be by creating a boolean property.
1063 		 */
1064 		ret = ndi_prop_create_boolean(DDI_DEV_T_NONE, node, "mc-addr");
1065 		OPL_UPDATE_PROP_ERR(ret, "mc-addr");
1066 	}
1067 
1068 	OPL_UPDATE_PROP_ARRAY(byte, node, "cs0-mc-pa-trans-table",
1069 	    mem->mem_cs[0].cs_pa_mac_table, 64);
1070 	OPL_UPDATE_PROP_ARRAY(byte, node, "cs1-mc-pa-trans-table",
1071 	    mem->mem_cs[1].cs_pa_mac_table, 64);
1072 
1073 #define	CS_PER_MEM 2
1074 
1075 	for (i = 0, j = 0; i < CS_PER_MEM; i++) {
1076 		if (HWD_STATUS_OK(mem->mem_cs[i].cs_status) ||
1077 			HWD_STATUS_FAILED(mem->mem_cs[i].cs_status)) {
1078 			status[j][0] = i;
1079 			if (HWD_STATUS_OK(mem->mem_cs[i].cs_status))
1080 				status[j][1] = 0;
1081 			else
1082 				status[j][1] = 1;
1083 			status[j][2] =
1084 			    OPL_HI(mem->mem_cs[i].cs_available_capacity);
1085 			status[j][3] =
1086 			    OPL_LO(mem->mem_cs[i].cs_available_capacity);
1087 			status[j][4] = OPL_HI(mem->mem_cs[i].cs_dimm_capacity);
1088 			status[j][5] = OPL_LO(mem->mem_cs[i].cs_dimm_capacity);
1089 			status[j][6] = mem->mem_cs[i].cs_number_of_dimms;
1090 			j++;
1091 		}
1092 	}
1093 
1094 	if (j > 0) {
1095 		OPL_UPDATE_PROP_ARRAY(int, node, "cs-status", (int *)status,
1096 		    j*7);
1097 	} else {
1098 		/*
1099 		 * If there is no memory, we need the cs-status property, but
1100 		 * it is length 0.  The only way to do this using ndi seems
1101 		 * to be by creating a boolean property.
1102 		 */
1103 		ret = ndi_prop_create_boolean(DDI_DEV_T_NONE, node,
1104 		    "cs-status");
1105 		OPL_UPDATE_PROP_ERR(ret, "cs-status");
1106 	}
1107 
1108 	return (DDI_WALK_TERMINATE);
1109 }
1110 
1111 /*
1112  * Create "pseudo-mc" nodes
1113  */
1114 static int
1115 opl_probe_memory(opl_probe_t *probe)
1116 {
1117 	int		board;
1118 	opl_board_cfg_t	*board_cfg;
1119 	dev_info_t	*node;
1120 
1121 	board = probe->pr_board;
1122 	board_cfg = &opl_boards[board];
1123 
1124 	ASSERT(board_cfg->cfg_pseudo_mc == NULL);
1125 
1126 	probe->pr_parent = ddi_root_node();
1127 	probe->pr_create = opl_create_pseudo_mc;
1128 	probe->pr_hold = 1;
1129 	node = opl_create_node(probe);
1130 	if (node == NULL) {
1131 
1132 		cmn_err(CE_WARN, "IKP: create pseudo-mc (%d) failed", board);
1133 		return (-1);
1134 	}
1135 
1136 	board_cfg->cfg_pseudo_mc = node;
1137 
1138 	return (0);
1139 }
1140 
1141 /*
1142  * Allocate the fcode ops handle.
1143  */
1144 /*ARGSUSED*/
1145 static
1146 fco_handle_t
1147 opl_fc_ops_alloc_handle(dev_info_t *parent, dev_info_t *child,
1148 			void *fcode, size_t fcode_size, char *unit_address,
1149 			char *my_args)
1150 {
1151 	fco_handle_t	rp;
1152 	phandle_t	h;
1153 	char		*buf;
1154 
1155 	rp = kmem_zalloc(sizeof (struct fc_resource_list), KM_SLEEP);
1156 	rp->next_handle = fc_ops_alloc_handle(parent, child, fcode, fcode_size,
1157 	    unit_address, NULL);
1158 	rp->ap = parent;
1159 	rp->child = child;
1160 	rp->fcode = fcode;
1161 	rp->fcode_size = fcode_size;
1162 	rp->my_args = my_args;
1163 
1164 	if (unit_address) {
1165 		buf = kmem_zalloc(UNIT_ADDR_SIZE, KM_SLEEP);
1166 		(void) strcpy(buf, unit_address);
1167 		rp->unit_address = buf;
1168 	}
1169 
1170 	/*
1171 	 * Add the child's nodeid to our table...
1172 	 */
1173 	h = ddi_get_nodeid(rp->child);
1174 	fc_add_dip_to_phandle(fc_handle_to_phandle_head(rp), rp->child, h);
1175 
1176 	return (rp);
1177 }
1178 
1179 
1180 static void
1181 opl_fc_ops_free_handle(fco_handle_t rp)
1182 {
1183 	struct fc_resource	*resp, *nresp;
1184 
1185 	ASSERT(rp);
1186 
1187 	if (rp->next_handle)
1188 		fc_ops_free_handle(rp->next_handle);
1189 	if (rp->unit_address)
1190 		kmem_free(rp->unit_address, UNIT_ADDR_SIZE);
1191 
1192 	/*
1193 	 * Release all the resources from the resource list
1194 	 */
1195 	for (resp = rp->head; resp != NULL; resp = nresp) {
1196 		nresp = resp->next;
1197 		switch (resp->type) {
1198 
1199 		case RT_MAP:
1200 			/*
1201 			 * If this is still mapped, we'd better unmap it now,
1202 			 * or all our structures that are tracking it will
1203 			 * be leaked.
1204 			 */
1205 			if (resp->fc_map_handle != NULL)
1206 				opl_unmap_phys(&resp->fc_map_handle);
1207 			break;
1208 
1209 		case RT_DMA:
1210 			/*
1211 			 * DMA has to be freed up at exit time.
1212 			 */
1213 			cmn_err(CE_CONT,
1214 			    "opl_fc_ops_free_handle: Unexpected DMA seen!");
1215 			break;
1216 
1217 		case RT_CONTIGIOUS:
1218 			FC_DEBUG2(1, CE_CONT, "opl_fc_ops_free: "
1219 			    "Free claim-memory resource 0x%lx size 0x%x\n",
1220 			    resp->fc_contig_virt, resp->fc_contig_len);
1221 
1222 			(void) ndi_ra_free(ddi_root_node(),
1223 			    (uint64_t)resp->fc_contig_virt,
1224 			    resp->fc_contig_len, "opl-fcodemem",
1225 			    NDI_RA_PASS);
1226 
1227 			break;
1228 
1229 		default:
1230 			cmn_err(CE_CONT, "opl_fc_ops_free: "
1231 			    "unknown resource type %d", resp->type);
1232 			break;
1233 		}
1234 		fc_rem_resource(rp, resp);
1235 		kmem_free(resp, sizeof (struct fc_resource));
1236 	}
1237 
1238 	kmem_free(rp, sizeof (struct fc_resource_list));
1239 }
1240 
1241 int
1242 opl_fc_do_op(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1243 {
1244 	opl_fc_ops_t	*op;
1245 	char		*service = fc_cell2ptr(cp->svc_name);
1246 
1247 	ASSERT(rp);
1248 
1249 	FC_DEBUG1(1, CE_CONT, "opl_fc_do_op: <%s>\n", service);
1250 
1251 	/*
1252 	 * First try the generic fc_ops.
1253 	 */
1254 	if (fc_ops(ap, rp->next_handle, cp) == 0)
1255 		return (0);
1256 
1257 	/*
1258 	 * Now try the Jupiter-specific ops.
1259 	 */
1260 	for (op = opl_fc_ops; op->fc_service != NULL; ++op)
1261 		if (strcmp(op->fc_service, service) == 0)
1262 			return (op->fc_op(ap, rp, cp));
1263 
1264 	FC_DEBUG1(9, CE_CONT, "opl_fc_do_op: <%s> not serviced\n", service);
1265 
1266 	return (-1);
1267 }
1268 
1269 /*
1270  * map-in  (phys.lo phys.hi size -- virt)
1271  */
1272 static int
1273 opl_map_in(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1274 {
1275 	size_t			len;
1276 	int			error;
1277 	caddr_t			virt;
1278 	struct fc_resource	*resp;
1279 	struct regspec		rspec;
1280 	ddi_device_acc_attr_t	acc;
1281 	ddi_acc_handle_t	h;
1282 
1283 	if (fc_cell2int(cp->nargs) != 3)
1284 		return (fc_syntax_error(cp, "nargs must be 3"));
1285 
1286 	if (fc_cell2int(cp->nresults) < 1)
1287 		return (fc_syntax_error(cp, "nresults must be >= 1"));
1288 
1289 	rspec.regspec_size = len = fc_cell2size(fc_arg(cp, 0));
1290 	rspec.regspec_bustype = fc_cell2uint(fc_arg(cp, 1));
1291 	rspec.regspec_addr = fc_cell2uint(fc_arg(cp, 2));
1292 
1293 	acc.devacc_attr_version = DDI_DEVICE_ATTR_V0;
1294 	acc.devacc_attr_endian_flags = DDI_STRUCTURE_BE_ACC;
1295 	acc.devacc_attr_dataorder = DDI_STRICTORDER_ACC;
1296 
1297 	FC_DEBUG3(1, CE_CONT, "opl_map_in: attempting map in "
1298 	    "address 0x%08x.%08x length %x\n", rspec.regspec_bustype,
1299 	    rspec.regspec_addr, rspec.regspec_size);
1300 
1301 	error = opl_map_phys(rp->child, &rspec, &virt, &acc, &h);
1302 
1303 	if (error)  {
1304 		FC_DEBUG3(1, CE_CONT, "opl_map_in: map in failed - "
1305 		    "address 0x%08x.%08x length %x\n", rspec.regspec_bustype,
1306 		    rspec.regspec_addr, rspec.regspec_size);
1307 
1308 		return (fc_priv_error(cp, "opl map-in failed"));
1309 	}
1310 
1311 	FC_DEBUG1(3, CE_CONT, "opl_map_in: returning virt %p\n", virt);
1312 
1313 	cp->nresults = fc_int2cell(1);
1314 	fc_result(cp, 0) = fc_ptr2cell(virt);
1315 
1316 	/*
1317 	 * Log this resource ...
1318 	 */
1319 	resp = kmem_zalloc(sizeof (struct fc_resource), KM_SLEEP);
1320 	resp->type = RT_MAP;
1321 	resp->fc_map_virt = virt;
1322 	resp->fc_map_len = len;
1323 	resp->fc_map_handle = h;
1324 	fc_add_resource(rp, resp);
1325 
1326 	return (fc_success_op(ap, rp, cp));
1327 }
1328 
1329 /*
1330  * map-out (virt size -- )
1331  */
1332 static int
1333 opl_map_out(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1334 {
1335 	caddr_t			virt;
1336 	size_t			len;
1337 	struct fc_resource	*resp;
1338 
1339 	if (fc_cell2int(cp->nargs) != 2)
1340 		return (fc_syntax_error(cp, "nargs must be 2"));
1341 
1342 	virt = fc_cell2ptr(fc_arg(cp, 1));
1343 
1344 	len = fc_cell2size(fc_arg(cp, 0));
1345 
1346 	FC_DEBUG2(1, CE_CONT, "opl_map_out: attempting map out %p %x\n",
1347 	    virt, len);
1348 
1349 	/*
1350 	 * Find if this request matches a mapping resource we set up.
1351 	 */
1352 	fc_lock_resource_list(rp);
1353 	for (resp = rp->head; resp != NULL; resp = resp->next) {
1354 		if (resp->type != RT_MAP)
1355 			continue;
1356 		if (resp->fc_map_virt != virt)
1357 			continue;
1358 		if (resp->fc_map_len == len)
1359 			break;
1360 	}
1361 	fc_unlock_resource_list(rp);
1362 
1363 	if (resp == NULL)
1364 		return (fc_priv_error(cp, "request doesn't match a "
1365 		    "known mapping"));
1366 
1367 	opl_unmap_phys(&resp->fc_map_handle);
1368 
1369 	/*
1370 	 * remove the resource from the list and release it.
1371 	 */
1372 	fc_rem_resource(rp, resp);
1373 	kmem_free(resp, sizeof (struct fc_resource));
1374 
1375 	cp->nresults = fc_int2cell(0);
1376 	return (fc_success_op(ap, rp, cp));
1377 }
1378 
1379 static int
1380 opl_register_fetch(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1381 {
1382 	size_t			len;
1383 	caddr_t			virt;
1384 	int			error = 0;
1385 	uint64_t		v;
1386 	uint64_t		x;
1387 	uint32_t		l;
1388 	uint16_t		w;
1389 	uint8_t			b;
1390 	char			*service = fc_cell2ptr(cp->svc_name);
1391 	struct fc_resource	*resp;
1392 
1393 	if (fc_cell2int(cp->nargs) != 1)
1394 		return (fc_syntax_error(cp, "nargs must be 1"));
1395 
1396 	if (fc_cell2int(cp->nresults) < 1)
1397 		return (fc_syntax_error(cp, "nresults must be >= 1"));
1398 
1399 	virt = fc_cell2ptr(fc_arg(cp, 0));
1400 
1401 	/*
1402 	 * Determine the access width .. we can switch on the 2nd
1403 	 * character of the name which is "rx@", "rl@", "rb@" or "rw@"
1404 	 */
1405 	switch (*(service + 1)) {
1406 	case 'x':	len = sizeof (x); break;
1407 	case 'l':	len = sizeof (l); break;
1408 	case 'w':	len = sizeof (w); break;
1409 	case 'b':	len = sizeof (b); break;
1410 	}
1411 
1412 	/*
1413 	 * Check the alignment ...
1414 	 */
1415 	if (((intptr_t)virt & (len - 1)) != 0)
1416 		return (fc_priv_error(cp, "unaligned access"));
1417 
1418 	/*
1419 	 * Find if this virt is 'within' a request we know about
1420 	 */
1421 	fc_lock_resource_list(rp);
1422 	for (resp = rp->head; resp != NULL; resp = resp->next) {
1423 		if (resp->type == RT_MAP) {
1424 			if ((virt >= (caddr_t)resp->fc_map_virt) &&
1425 			    ((virt + len) <=
1426 			    ((caddr_t)resp->fc_map_virt + resp->fc_map_len)))
1427 				break;
1428 		} else if (resp->type == RT_CONTIGIOUS) {
1429 		    if ((virt >= (caddr_t)resp->fc_contig_virt) && ((virt + len)
1430 			<= ((caddr_t)resp->fc_contig_virt +
1431 			    resp->fc_contig_len)))
1432 				break;
1433 		}
1434 	}
1435 	fc_unlock_resource_list(rp);
1436 
1437 	if (resp == NULL) {
1438 		return (fc_priv_error(cp, "request not within "
1439 		    "known mappings"));
1440 	}
1441 
1442 	switch (len) {
1443 	case sizeof (x):
1444 		if (resp->type == RT_MAP)
1445 			error = ddi_peek64(rp->child,
1446 			(int64_t *)virt, (int64_t *)&x);
1447 		else /* RT_CONTIGIOUS */
1448 			x = *(int64_t *)virt;
1449 		v = x;
1450 		break;
1451 	case sizeof (l):
1452 		if (resp->type == RT_MAP)
1453 			error = ddi_peek32(rp->child,
1454 			(int32_t *)virt, (int32_t *)&l);
1455 		else /* RT_CONTIGIOUS */
1456 			l = *(int32_t *)virt;
1457 		v = l;
1458 		break;
1459 	case sizeof (w):
1460 		if (resp->type == RT_MAP)
1461 			error = ddi_peek16(rp->child,
1462 			(int16_t *)virt, (int16_t *)&w);
1463 		else /* RT_CONTIGIOUS */
1464 			w = *(int16_t *)virt;
1465 		v = w;
1466 		break;
1467 	case sizeof (b):
1468 		if (resp->type == RT_MAP)
1469 			error = ddi_peek8(rp->child,
1470 			(int8_t *)virt, (int8_t *)&b);
1471 		else /* RT_CONTIGIOUS */
1472 			b = *(int8_t *)virt;
1473 		v = b;
1474 		break;
1475 	}
1476 
1477 	if (error == DDI_FAILURE) {
1478 		FC_DEBUG2(1, CE_CONT, "opl_register_fetch: access error "
1479 		    "accessing virt %p len %d\n", virt, len);
1480 		return (fc_priv_error(cp, "access error"));
1481 	}
1482 
1483 	FC_DEBUG3(1, CE_CONT, "register_fetch (%s) %llx %llx\n",
1484 	    service, virt, v);
1485 
1486 	cp->nresults = fc_int2cell(1);
1487 	switch (len) {
1488 	case sizeof (x): fc_result(cp, 0) = x; break;
1489 	case sizeof (l): fc_result(cp, 0) = fc_uint32_t2cell(l); break;
1490 	case sizeof (w): fc_result(cp, 0) = fc_uint16_t2cell(w); break;
1491 	case sizeof (b): fc_result(cp, 0) = fc_uint8_t2cell(b); break;
1492 	}
1493 	return (fc_success_op(ap, rp, cp));
1494 }
1495 
1496 static int
1497 opl_register_store(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1498 {
1499 	size_t			len;
1500 	caddr_t			virt;
1501 	uint64_t		v;
1502 	uint64_t		x;
1503 	uint32_t		l;
1504 	uint16_t		w;
1505 	uint8_t			b;
1506 	char			*service = fc_cell2ptr(cp->svc_name);
1507 	struct fc_resource	*resp;
1508 	int			error = 0;
1509 
1510 	if (fc_cell2int(cp->nargs) != 2)
1511 		return (fc_syntax_error(cp, "nargs must be 2"));
1512 
1513 	virt = fc_cell2ptr(fc_arg(cp, 0));
1514 
1515 	/*
1516 	 * Determine the access width .. we can switch on the 2nd
1517 	 * character of the name which is "rx!", "rl!", "rb!" or "rw!"
1518 	 */
1519 	switch (*(service + 1)) {
1520 	case 'x':
1521 		len = sizeof (x);
1522 		x = fc_arg(cp, 1);
1523 		v = x;
1524 		break;
1525 	case 'l':
1526 		len = sizeof (l);
1527 		l = fc_cell2uint32_t(fc_arg(cp, 1));
1528 		v = l;
1529 		break;
1530 	case 'w':
1531 		len = sizeof (w);
1532 		w = fc_cell2uint16_t(fc_arg(cp, 1));
1533 		v = w;
1534 		break;
1535 	case 'b':
1536 		len = sizeof (b);
1537 		b = fc_cell2uint8_t(fc_arg(cp, 1));
1538 		v = b;
1539 		break;
1540 	}
1541 
1542 	FC_DEBUG3(1, CE_CONT, "register_store (%s) %llx %llx\n",
1543 	    service, virt, v);
1544 
1545 	/*
1546 	 * Check the alignment ...
1547 	 */
1548 	if (((intptr_t)virt & (len - 1)) != 0)
1549 		return (fc_priv_error(cp, "unaligned access"));
1550 
1551 	/*
1552 	 * Find if this virt is 'within' a request we know about
1553 	 */
1554 	fc_lock_resource_list(rp);
1555 	for (resp = rp->head; resp != NULL; resp = resp->next) {
1556 		if (resp->type == RT_MAP) {
1557 			if ((virt >= (caddr_t)resp->fc_map_virt) &&
1558 			    ((virt + len) <=
1559 			    ((caddr_t)resp->fc_map_virt + resp->fc_map_len)))
1560 				break;
1561 		} else if (resp->type == RT_CONTIGIOUS) {
1562 		    if ((virt >= (caddr_t)resp->fc_contig_virt) && ((virt + len)
1563 			<= ((caddr_t)resp->fc_contig_virt +
1564 			    resp->fc_contig_len)))
1565 				break;
1566 		}
1567 	}
1568 	fc_unlock_resource_list(rp);
1569 
1570 	if (resp == NULL)
1571 		return (fc_priv_error(cp, "request not within"
1572 		    "known mappings"));
1573 
1574 	switch (len) {
1575 	case sizeof (x):
1576 		if (resp->type == RT_MAP)
1577 			error = ddi_poke64(rp->child, (int64_t *)virt, x);
1578 		else if (resp->type == RT_CONTIGIOUS)
1579 			*(uint64_t *)virt = x;
1580 		break;
1581 	case sizeof (l):
1582 		if (resp->type == RT_MAP)
1583 			error = ddi_poke32(rp->child, (int32_t *)virt, l);
1584 		else if (resp->type == RT_CONTIGIOUS)
1585 			*(uint32_t *)virt = l;
1586 		break;
1587 	case sizeof (w):
1588 		if (resp->type == RT_MAP)
1589 			error = ddi_poke16(rp->child, (int16_t *)virt, w);
1590 		else if (resp->type == RT_CONTIGIOUS)
1591 			*(uint16_t *)virt = w;
1592 		break;
1593 	case sizeof (b):
1594 		if (resp->type == RT_MAP)
1595 			error = ddi_poke8(rp->child, (int8_t *)virt, b);
1596 		else if (resp->type == RT_CONTIGIOUS)
1597 			*(uint8_t *)virt = b;
1598 		break;
1599 	}
1600 
1601 	if (error == DDI_FAILURE) {
1602 		FC_DEBUG2(1, CE_CONT, "opl_register_store: access error "
1603 		    "accessing virt %p len %d\n", virt, len);
1604 		return (fc_priv_error(cp, "access error"));
1605 	}
1606 
1607 	cp->nresults = fc_int2cell(0);
1608 	return (fc_success_op(ap, rp, cp));
1609 }
1610 
1611 /*
1612  * opl_claim_memory
1613  *
1614  * claim-memory (align size vhint -- vaddr)
1615  */
1616 static int
1617 opl_claim_memory(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1618 {
1619 	int			align, size, vhint;
1620 	uint64_t		answer, alen;
1621 	ndi_ra_request_t	request;
1622 	struct fc_resource	*resp;
1623 
1624 	if (fc_cell2int(cp->nargs) != 3)
1625 		return (fc_syntax_error(cp, "nargs must be 3"));
1626 
1627 	if (fc_cell2int(cp->nresults) < 1)
1628 		return (fc_syntax_error(cp, "nresults must be >= 1"));
1629 
1630 	vhint = fc_cell2int(fc_arg(cp, 2));
1631 	size  = fc_cell2int(fc_arg(cp, 1));
1632 	align = fc_cell2int(fc_arg(cp, 0));
1633 
1634 	FC_DEBUG3(1, CE_CONT, "opl_claim_memory: align=0x%x size=0x%x "
1635 	    "vhint=0x%x\n", align, size, vhint);
1636 
1637 	if (size == 0) {
1638 		cmn_err(CE_WARN, "opl_claim_memory - unable to allocate "
1639 		    "contiguous memory of size zero\n");
1640 		return (fc_priv_error(cp, "allocation error"));
1641 	}
1642 
1643 	if (vhint) {
1644 		cmn_err(CE_WARN, "opl_claim_memory - vhint is not zero "
1645 		    "vhint=0x%x - Ignoring Argument\n", vhint);
1646 	}
1647 
1648 	bzero((caddr_t)&request, sizeof (ndi_ra_request_t));
1649 	request.ra_flags	= NDI_RA_ALLOC_BOUNDED;
1650 	request.ra_boundbase	= 0;
1651 	request.ra_boundlen	= 0xffffffff;
1652 	request.ra_len		= size;
1653 	request.ra_align_mask	= align - 1;
1654 
1655 	if (ndi_ra_alloc(ddi_root_node(), &request, &answer, &alen,
1656 	    "opl-fcodemem", NDI_RA_PASS) != NDI_SUCCESS) {
1657 		cmn_err(CE_WARN, "opl_claim_memory - unable to allocate "
1658 		    "contiguous memory\n");
1659 		return (fc_priv_error(cp, "allocation error"));
1660 	}
1661 
1662 	FC_DEBUG2(1, CE_CONT, "opl_claim_memory: address allocated=0x%lx "
1663 	    "size=0x%x\n", answer, alen);
1664 
1665 	cp->nresults = fc_int2cell(1);
1666 	fc_result(cp, 0) = answer;
1667 
1668 	/*
1669 	 * Log this resource ...
1670 	 */
1671 	resp = kmem_zalloc(sizeof (struct fc_resource), KM_SLEEP);
1672 	resp->type = RT_CONTIGIOUS;
1673 	resp->fc_contig_virt = (void *)answer;
1674 	resp->fc_contig_len = size;
1675 	fc_add_resource(rp, resp);
1676 
1677 	return (fc_success_op(ap, rp, cp));
1678 }
1679 
1680 /*
1681  * opl_release_memory
1682  *
1683  * release-memory (size vaddr -- )
1684  */
1685 static int
1686 opl_release_memory(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1687 {
1688 	int32_t			vaddr, size;
1689 	struct fc_resource	*resp;
1690 
1691 	if (fc_cell2int(cp->nargs) != 2)
1692 		return (fc_syntax_error(cp, "nargs must be 2"));
1693 
1694 	if (fc_cell2int(cp->nresults) != 0)
1695 		return (fc_syntax_error(cp, "nresults must be 0"));
1696 
1697 	vaddr = fc_cell2int(fc_arg(cp, 1));
1698 	size  = fc_cell2int(fc_arg(cp, 0));
1699 
1700 	FC_DEBUG2(1, CE_CONT, "opl_release_memory: vaddr=0x%x size=0x%x\n",
1701 	    vaddr, size);
1702 
1703 	/*
1704 	 * Find if this request matches a mapping resource we set up.
1705 	 */
1706 	fc_lock_resource_list(rp);
1707 	for (resp = rp->head; resp != NULL; resp = resp->next) {
1708 		if (resp->type != RT_CONTIGIOUS)
1709 			continue;
1710 		if (resp->fc_contig_virt != (void *)(uintptr_t)vaddr)
1711 			continue;
1712 		if (resp->fc_contig_len == size)
1713 			break;
1714 	}
1715 	fc_unlock_resource_list(rp);
1716 
1717 	if (resp == NULL)
1718 		return (fc_priv_error(cp, "request doesn't match a "
1719 		    "known mapping"));
1720 
1721 	(void) ndi_ra_free(ddi_root_node(), vaddr, size,
1722 	    "opl-fcodemem", NDI_RA_PASS);
1723 
1724 	/*
1725 	 * remove the resource from the list and release it.
1726 	 */
1727 	fc_rem_resource(rp, resp);
1728 	kmem_free(resp, sizeof (struct fc_resource));
1729 
1730 	cp->nresults = fc_int2cell(0);
1731 
1732 	return (fc_success_op(ap, rp, cp));
1733 }
1734 
1735 /*
1736  * opl_vtop
1737  *
1738  * vtop (vaddr -- paddr.lo paddr.hi)
1739  */
1740 static int
1741 opl_vtop(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1742 {
1743 	int			vaddr;
1744 	uint64_t		paddr;
1745 	struct fc_resource	*resp;
1746 
1747 	if (fc_cell2int(cp->nargs) != 1)
1748 		return (fc_syntax_error(cp, "nargs must be 1"));
1749 
1750 	if (fc_cell2int(cp->nresults) >= 3)
1751 		return (fc_syntax_error(cp, "nresults must be less than 2"));
1752 
1753 	vaddr = fc_cell2int(fc_arg(cp, 0));
1754 
1755 	/*
1756 	 * Find if this request matches a mapping resource we set up.
1757 	 */
1758 	fc_lock_resource_list(rp);
1759 	for (resp = rp->head; resp != NULL; resp = resp->next) {
1760 		if (resp->type != RT_CONTIGIOUS)
1761 			continue;
1762 		if (resp->fc_contig_virt == (void *)(uintptr_t)vaddr)
1763 			break;
1764 	}
1765 	fc_unlock_resource_list(rp);
1766 
1767 	if (resp == NULL)
1768 		return (fc_priv_error(cp, "request doesn't match a "
1769 		    "known mapping"));
1770 
1771 	paddr = va_to_pa((void *)(uintptr_t)vaddr);
1772 
1773 	FC_DEBUG2(1, CE_CONT, "opl_vtop: vaddr=0x%x paddr=0x%x\n",
1774 	    vaddr, paddr);
1775 
1776 	cp->nresults = fc_int2cell(2);
1777 
1778 	fc_result(cp, 0) = paddr;
1779 	fc_result(cp, 1) = 0;
1780 
1781 	return (fc_success_op(ap, rp, cp));
1782 }
1783 
1784 static int
1785 opl_config_child(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1786 {
1787 	fc_phandle_t h;
1788 
1789 	if (fc_cell2int(cp->nargs) != 0)
1790 		return (fc_syntax_error(cp, "nargs must be 0"));
1791 
1792 	if (fc_cell2int(cp->nresults) < 1)
1793 		return (fc_syntax_error(cp, "nresults must be >= 1"));
1794 
1795 	h = fc_dip_to_phandle(fc_handle_to_phandle_head(rp), rp->child);
1796 
1797 	cp->nresults = fc_int2cell(1);
1798 	fc_result(cp, 0) = fc_phandle2cell(h);
1799 
1800 	return (fc_success_op(ap, rp, cp));
1801 }
1802 
1803 static int
1804 opl_get_fcode(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1805 {
1806 	caddr_t		dropin_name_virt, fcode_virt;
1807 	char		*dropin_name, *fcode;
1808 	int		fcode_len, status;
1809 
1810 	if (fc_cell2int(cp->nargs) != 3)
1811 		return (fc_syntax_error(cp, "nargs must be 3"));
1812 
1813 	if (fc_cell2int(cp->nresults) < 1)
1814 		return (fc_syntax_error(cp, "nresults must be >= 1"));
1815 
1816 	dropin_name_virt = fc_cell2ptr(fc_arg(cp, 0));
1817 
1818 	fcode_virt = fc_cell2ptr(fc_arg(cp, 1));
1819 
1820 	fcode_len = fc_cell2int(fc_arg(cp, 2));
1821 
1822 	dropin_name = kmem_zalloc(FC_SVC_NAME_LEN, KM_SLEEP);
1823 
1824 	FC_DEBUG2(1, CE_CONT, "get_fcode: %x %d\n", fcode_virt, fcode_len);
1825 
1826 	if (copyinstr(fc_cell2ptr(dropin_name_virt), dropin_name,
1827 	    FC_SVC_NAME_LEN - 1, NULL))  {
1828 		FC_DEBUG1(1, CE_CONT, "opl_get_fcode: "
1829 		    "fault copying in drop in name %p\n", dropin_name_virt);
1830 		status = 0;
1831 	} else {
1832 		FC_DEBUG1(1, CE_CONT, "get_fcode: %s\n", dropin_name);
1833 
1834 		fcode = kmem_zalloc(fcode_len, KM_SLEEP);
1835 
1836 		if ((status = prom_get_fcode(dropin_name, fcode)) != 0) {
1837 
1838 			if (copyout((void *)fcode, (void *)fcode_virt,
1839 			    fcode_len)) {
1840 				cmn_err(CE_WARN, " opl_get_fcode: Unable "
1841 				    "to copy out fcode image");
1842 				status = 0;
1843 			}
1844 		}
1845 
1846 		kmem_free(fcode, fcode_len);
1847 	}
1848 
1849 	kmem_free(dropin_name, FC_SVC_NAME_LEN);
1850 
1851 	cp->nresults = fc_int2cell(1);
1852 	fc_result(cp, 0) = status;
1853 
1854 	return (fc_success_op(ap, rp, cp));
1855 }
1856 
1857 static int
1858 opl_get_fcode_size(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1859 {
1860 	caddr_t		virt;
1861 	char		*dropin_name;
1862 	int		len;
1863 
1864 	if (fc_cell2int(cp->nargs) != 1)
1865 		return (fc_syntax_error(cp, "nargs must be 1"));
1866 
1867 	if (fc_cell2int(cp->nresults) < 1)
1868 		return (fc_syntax_error(cp, "nresults must be >= 1"));
1869 
1870 	virt = fc_cell2ptr(fc_arg(cp, 0));
1871 
1872 	dropin_name = kmem_zalloc(FC_SVC_NAME_LEN, KM_SLEEP);
1873 
1874 	FC_DEBUG0(1, CE_CONT, "opl_get_fcode_size:\n");
1875 
1876 	if (copyinstr(fc_cell2ptr(virt), dropin_name,
1877 	    FC_SVC_NAME_LEN - 1, NULL))  {
1878 		FC_DEBUG1(1, CE_CONT, "opl_get_fcode_size: "
1879 		    "fault copying in drop in name %p\n", virt);
1880 		len = 0;
1881 	} else {
1882 		FC_DEBUG1(1, CE_CONT, "opl_get_fcode_size: %s\n", dropin_name);
1883 
1884 		len = prom_get_fcode_size(dropin_name);
1885 	}
1886 
1887 	kmem_free(dropin_name, FC_SVC_NAME_LEN);
1888 
1889 	FC_DEBUG1(1, CE_CONT, "opl_get_fcode_size: fcode_len = %d\n", len);
1890 
1891 	cp->nresults = fc_int2cell(1);
1892 	fc_result(cp, 0) = len;
1893 
1894 	return (fc_success_op(ap, rp, cp));
1895 }
1896 
1897 static int
1898 opl_map_phys(dev_info_t *dip, struct regspec *phys_spec,
1899     caddr_t *addrp, ddi_device_acc_attr_t *accattrp,
1900     ddi_acc_handle_t *handlep)
1901 {
1902 	ddi_map_req_t 	mapreq;
1903 	ddi_acc_hdl_t	*acc_handlep;
1904 	int		result;
1905 	struct regspec	*rspecp;
1906 
1907 	*handlep = impl_acc_hdl_alloc(KM_SLEEP, NULL);
1908 	acc_handlep = impl_acc_hdl_get(*handlep);
1909 	acc_handlep->ah_vers = VERS_ACCHDL;
1910 	acc_handlep->ah_dip = dip;
1911 	acc_handlep->ah_rnumber = 0;
1912 	acc_handlep->ah_offset = 0;
1913 	acc_handlep->ah_len = 0;
1914 	acc_handlep->ah_acc = *accattrp;
1915 	rspecp = kmem_zalloc(sizeof (struct regspec), KM_SLEEP);
1916 	*rspecp = *phys_spec;
1917 	/*
1918 	 * cache a copy of the reg spec
1919 	 */
1920 	acc_handlep->ah_bus_private = rspecp;
1921 
1922 	mapreq.map_op = DDI_MO_MAP_LOCKED;
1923 	mapreq.map_type = DDI_MT_REGSPEC;
1924 	mapreq.map_obj.rp = (struct regspec *)phys_spec;
1925 	mapreq.map_prot = PROT_READ | PROT_WRITE;
1926 	mapreq.map_flags = DDI_MF_KERNEL_MAPPING;
1927 	mapreq.map_handlep = acc_handlep;
1928 	mapreq.map_vers = DDI_MAP_VERSION;
1929 
1930 	result = ddi_map(dip, &mapreq, 0, 0, addrp);
1931 
1932 	if (result != DDI_SUCCESS) {
1933 		impl_acc_hdl_free(*handlep);
1934 		kmem_free(rspecp, sizeof (struct regspec));
1935 		*handlep = (ddi_acc_handle_t)NULL;
1936 	} else {
1937 		acc_handlep->ah_addr = *addrp;
1938 	}
1939 
1940 	return (result);
1941 }
1942 
1943 static void
1944 opl_unmap_phys(ddi_acc_handle_t *handlep)
1945 {
1946 	ddi_map_req_t	mapreq;
1947 	ddi_acc_hdl_t	*acc_handlep;
1948 	struct regspec	*rspecp;
1949 
1950 	acc_handlep = impl_acc_hdl_get(*handlep);
1951 	ASSERT(acc_handlep);
1952 	rspecp = acc_handlep->ah_bus_private;
1953 
1954 	mapreq.map_op = DDI_MO_UNMAP;
1955 	mapreq.map_type = DDI_MT_REGSPEC;
1956 	mapreq.map_obj.rp = (struct regspec *)rspecp;
1957 	mapreq.map_prot = PROT_READ | PROT_WRITE;
1958 	mapreq.map_flags = DDI_MF_KERNEL_MAPPING;
1959 	mapreq.map_handlep = acc_handlep;
1960 	mapreq.map_vers = DDI_MAP_VERSION;
1961 
1962 	(void) ddi_map(acc_handlep->ah_dip, &mapreq, acc_handlep->ah_offset,
1963 	    acc_handlep->ah_len, &acc_handlep->ah_addr);
1964 
1965 	impl_acc_hdl_free(*handlep);
1966 	/*
1967 	 * Free the cached copy
1968 	 */
1969 	kmem_free(rspecp, sizeof (struct regspec));
1970 	*handlep = (ddi_acc_handle_t)NULL;
1971 }
1972 
1973 static int
1974 opl_get_hwd_va(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
1975 {
1976 	uint32_t	portid;
1977 	void		*hwd_virt;
1978 	hwd_header_t	*hwd_h = NULL;
1979 	hwd_sb_t	*hwd_sb = NULL;
1980 	int		lsb, ch, leaf;
1981 	int		status = 1;
1982 
1983 	/* Check the argument */
1984 	if (fc_cell2int(cp->nargs) != 2)
1985 		return (fc_syntax_error(cp, "nargs must be 2"));
1986 
1987 	if (fc_cell2int(cp->nresults) < 1)
1988 		return (fc_syntax_error(cp, "nresults must be >= 1"));
1989 
1990 	/* Get the parameters */
1991 	portid = fc_cell2uint32_t(fc_arg(cp, 0));
1992 	hwd_virt = (void *)fc_cell2ptr(fc_arg(cp, 1));
1993 
1994 	/* Get the ID numbers */
1995 	lsb  = OPL_IO_PORTID_TO_LSB(portid);
1996 	ch   = OPL_PORTID_TO_CHANNEL(portid);
1997 	leaf = OPL_PORTID_TO_LEAF(portid);
1998 	ASSERT(OPL_IO_PORTID(lsb, ch, leaf) == portid);
1999 
2000 	/* Set the pointer of hwd. */
2001 	if ((hwd_h = (hwd_header_t *)opl_boards[lsb].cfg_hwd) == NULL) {
2002 		return (fc_priv_error(cp, "null hwd header"));
2003 	}
2004 	/* Set the pointer of hwd sb. */
2005 	if ((hwd_sb = (hwd_sb_t *)((char *)hwd_h + hwd_h->hdr_sb_info_offset))
2006 	    == NULL) {
2007 		return (fc_priv_error(cp, "null hwd sb"));
2008 	}
2009 
2010 	if (ch == OPL_CMU_CHANNEL) {
2011 		/* Copyout CMU-CH HW Descriptor */
2012 		if (copyout((void *)&hwd_sb->sb_cmu.cmu_ch,
2013 		    (void *)hwd_virt, sizeof (hwd_cmu_chan_t))) {
2014 			cmn_err(CE_WARN, "opl_get_hwd_va: "
2015 			"Unable to copy out cmuch descriptor for %x",
2016 			    portid);
2017 			status = 0;
2018 		}
2019 	} else {
2020 		/* Copyout PCI-CH HW Descriptor */
2021 		if (copyout((void *)&hwd_sb->sb_pci_ch[ch].pci_leaf[leaf],
2022 		    (void *)hwd_virt, sizeof (hwd_leaf_t))) {
2023 			cmn_err(CE_WARN, "opl_get_hwd_va: "
2024 			"Unable to copy out pcich descriptor for %x",
2025 			    portid);
2026 			status = 0;
2027 		}
2028 	}
2029 
2030 	cp->nresults = fc_int2cell(1);
2031 	fc_result(cp, 0) = status;
2032 
2033 	return (fc_success_op(ap, rp, cp));
2034 }
2035 
2036 /*
2037  * After Solaris boots, a user can enter OBP using L1A, etc. While in OBP,
2038  * interrupts may be received from PCI devices. These interrupts
2039  * cannot be handled meaningfully since the system is in OBP. These
2040  * interrupts need to be cleared on the CPU side so that the CPU may
2041  * continue with whatever it is doing. Devices that have raised the
2042  * interrupts are expected to reraise the interrupts after sometime
2043  * as they have not been handled. At that time, Solaris will have a
2044  * chance to properly service the interrupts.
2045  *
2046  * The location of the interrupt registers depends on what is present
2047  * at a port. OPL currently supports the Oberon and the CMU channel.
2048  * The following handler handles both kinds of ports and computes
2049  * interrupt register addresses from the specifications and Jupiter Bus
2050  * device bindings.
2051  *
2052  * Fcode drivers install their interrupt handler via a "master-interrupt"
2053  * service. For boot time devices, this takes place within OBP. In the case
2054  * of DR, OPL uses IKP. The Fcode drivers that run within the efcode framework
2055  * attempt to install their handler via the "master-interrupt" service.
2056  * However, we cannot meaningfully install the Fcode driver's handler.
2057  * Instead, we install our own handler in OBP which does the same thing.
2058  *
2059  * Note that the only handling done for interrupts here is to clear it
2060  * on the CPU side. If any device in the future requires more special
2061  * handling, we would have to put in some kind of framework for adding
2062  * device-specific handlers. This is *highly* unlikely, but possible.
2063  *
2064  * Finally, OBP provides a hook called "unix-interrupt-handler" to install
2065  * a Solaris-defined master-interrupt handler for a port. The default
2066  * definition for this method does nothing. Solaris may override this
2067  * with its own definition. This is the way the following handler gets
2068  * control from OBP when interrupts happen at a port after L1A, etc.
2069  */
2070 
2071 static char define_master_interrupt_handler[] =
2072 
2073 /*
2074  * This method translates an Oberon port id to the base (physical) address
2075  * of the interrupt clear registers for that port id.
2076  */
2077 
2078 ": pcich-mid>clear-int-pa   ( mid -- pa ) "
2079 "   dup 1 >> 7 and          ( mid ch# ) "
2080 "   over 4 >> h# 1f and     ( mid ch# lsb# ) "
2081 "   1 d# 46 <<              ( mid ch# lsb# pa ) "
2082 "   swap d# 40 << or        ( mid ch# pa ) "
2083 "   swap d# 37 << or        ( mid pa ) "
2084 "   swap 1 and if h# 70.0000 else h# 60.0000 then "
2085 "   or h# 1400 or           ( pa ) "
2086 "; "
2087 
2088 /*
2089  * This method translates a CMU channel port id to the base (physical) address
2090  * of the interrupt clear registers for that port id. There are two classes of
2091  * interrupts that need to be handled for a CMU channel:
2092  *	- obio interrupts
2093  *	- pci interrupts
2094  * So, there are two addresses that need to be computed.
2095  */
2096 
2097 ": cmuch-mid>clear-int-pa   ( mid -- obio-pa pci-pa ) "
2098 "   dup 1 >> 7 and          ( mid ch# ) "
2099 "   over 4 >> h# 1f and     ( mid ch# lsb# ) "
2100 "   1 d# 46 <<              ( mid ch# lsb# pa ) "
2101 "   swap d# 40 << or        ( mid ch# pa ) "
2102 "   swap d# 37 << or        ( mid pa ) "
2103 "   nip dup h# 1800 +       ( pa obio-pa ) "
2104 "   swap h# 1400 +          ( obio-pa pci-pa ) "
2105 "; "
2106 
2107 /*
2108  * This method checks if a given I/O port ID is valid or not.
2109  * For a given LSB,
2110  *	Oberon ports range from 0 - 3
2111  *	CMU ch ports range from 4 - 4
2112  *
2113  * Also, the Oberon supports leaves 0 and 1.
2114  * The CMU ch supports only one leaf, leaf 0.
2115  */
2116 
2117 ": valid-io-mid? ( mid -- flag ) "
2118 "   dup 1 >> 7 and                     ( mid ch# ) "
2119 "   dup 4 > if 2drop false exit then   ( mid ch# ) "
2120 "   4 = swap 1 and 1 = and not "
2121 "; "
2122 
2123 /*
2124  * This method checks if a given port id is a CMU ch.
2125  */
2126 
2127 ": cmuch? ( mid -- flag ) 1 >> 7 and 4 = ; "
2128 
2129 /*
2130  * Given the base address of the array of interrupt clear registers for
2131  * a port id, this method iterates over the given interrupt number bitmap
2132  * and resets the interrupt on the CPU side for every interrupt number
2133  * in the bitmap. Note that physical addresses are used to perform the
2134  * writes, not virtual addresses. This allows the handler to work without
2135  * any involvement from Solaris.
2136  */
2137 
2138 ": clear-ints ( pa bitmap count -- ) "
2139 "   0 do                            ( pa bitmap ) "
2140 "      dup 0= if 2drop unloop exit then "
2141 "      tuck                         ( bitmap pa bitmap ) "
2142 "      1 and if                     ( bitmap pa ) "
2143 "	 dup i 8 * + 0 swap         ( bitmap pa 0 pa' ) "
2144 "	 h# 15 spacex!              ( bitmap pa ) "
2145 "      then                         ( bitmap pa ) "
2146 "      swap 1 >>                    ( pa bitmap ) "
2147 "   loop "
2148 "; "
2149 
2150 /*
2151  * This method replaces the master-interrupt handler in OBP. Once
2152  * this method is plumbed into OBP, OBP transfers control to this
2153  * handler while returning to Solaris from OBP after L1A. This method's
2154  * task is to simply reset received interrupts on the CPU side.
2155  * When the devices reassert the interrupts later, Solaris will
2156  * be able to see them and handle them.
2157  *
2158  * For each port ID that has interrupts, this method is called
2159  * once by OBP. The input arguments are:
2160  *	mid	portid
2161  *	bitmap	bitmap of interrupts that have happened
2162  *
2163  * This method returns true, if it is able to handle the interrupts.
2164  * OBP does nothing further.
2165  *
2166  * This method returns false, if it encountered a problem. Currently,
2167  * the only problem could be an invalid port id. OBP needs to do
2168  * its own processing in that case. If this method returns false,
2169  * it preserves the mid and bitmap arguments for OBP.
2170  */
2171 
2172 ": unix-resend-mondos ( mid bitmap -- [ mid bitmap false ] | true ) "
2173 
2174 /*
2175  * Uncomment the following line if you want to display the input arguments.
2176  * This is meant for debugging.
2177  * "   .\" Bitmap=\" dup u. .\" MID=\" over u. cr "
2178  */
2179 
2180 /*
2181  * If the port id is not valid (according to the Oberon and CMU ch
2182  * specifications, then return false to OBP to continue further
2183  * processing.
2184  */
2185 
2186 "   over valid-io-mid? not if       ( mid bitmap ) "
2187 "      false exit "
2188 "   then "
2189 
2190 /*
2191  * If the port is a CMU ch, then the 64-bit bitmap represents
2192  * 2 32-bit bitmaps:
2193  *	- obio interrupt bitmap (20 bits)
2194  *	- pci interrupt bitmap (32 bits)
2195  *
2196  * - Split the bitmap into two
2197  * - Compute the base addresses of the interrupt clear registers
2198  *   for both pci interrupts and obio interrupts
2199  * - Clear obio interrupts
2200  * - Clear pci interrupts
2201  */
2202 
2203 "   over cmuch? if                  ( mid bitmap ) "
2204 "      xlsplit                      ( mid pci-bit obio-bit ) "
2205 "      rot cmuch-mid>clear-int-pa   ( pci-bit obio-bit obio-pa pci-pa ) "
2206 "      >r                           ( pci-bit obio-bit obio-pa ) ( r: pci-pa ) "
2207 "      swap d# 20 clear-ints        ( pci-bit ) ( r: pci-pa ) "
2208 "      r> swap d# 32 clear-ints     (  ) ( r: ) "
2209 
2210 /*
2211  * If the port is an Oberon, then the 64-bit bitmap is used fully.
2212  *
2213  * - Compute the base address of the interrupt clear registers
2214  * - Clear interrupts
2215  */
2216 
2217 "   else                            ( mid bitmap ) "
2218 "      swap pcich-mid>clear-int-pa  ( bitmap pa ) "
2219 "      swap d# 64 clear-ints        (  ) "
2220 "   then "
2221 
2222 /*
2223  * Always return true from here.
2224  */
2225 
2226 "   true                            ( true ) "
2227 "; "
2228 ;
2229 
2230 static char	install_master_interrupt_handler[] =
2231 	"' unix-resend-mondos to unix-interrupt-handler";
2232 static char	handler[] = "unix-interrupt-handler";
2233 static char	handler_defined[] = "p\" %s\" find nip swap l! ";
2234 
2235 /*ARGSUSED*/
2236 static int
2237 master_interrupt_init(uint32_t portid, uint32_t xt)
2238 {
2239 	uint_t	defined;
2240 	char	buf[sizeof (handler) + sizeof (handler_defined)];
2241 
2242 	if (master_interrupt_inited)
2243 		return (1);
2244 
2245 	/*
2246 	 * Check if the defer word "unix-interrupt-handler" is defined.
2247 	 * This must be defined for OPL systems. So, this is only a
2248 	 * sanity check.
2249 	 */
2250 	(void) sprintf(buf, handler_defined, handler);
2251 	prom_interpret(buf, (uintptr_t)&defined, 0, 0, 0, 0);
2252 	if (!defined) {
2253 		cmn_err(CE_WARN, "master_interrupt_init: "
2254 		    "%s is not defined\n", handler);
2255 		return (0);
2256 	}
2257 
2258 	/*
2259 	 * Install the generic master-interrupt handler. Note that
2260 	 * this is only done one time on the first DR operation.
2261 	 * This is because, for OPL, one, single generic handler
2262 	 * handles all ports (Oberon and CMU channel) and all
2263 	 * interrupt sources within each port.
2264 	 *
2265 	 * The current support is only for the Oberon and CMU-channel.
2266 	 * If any others need to be supported, the handler has to be
2267 	 * modified accordingly.
2268 	 */
2269 
2270 	/*
2271 	 * Define the OPL master interrupt handler
2272 	 */
2273 	prom_interpret(define_master_interrupt_handler, 0, 0, 0, 0, 0);
2274 
2275 	/*
2276 	 * Take over the master interrupt handler from OBP.
2277 	 */
2278 	prom_interpret(install_master_interrupt_handler, 0, 0, 0, 0, 0);
2279 
2280 	master_interrupt_inited = 1;
2281 
2282 	/*
2283 	 * prom_interpret() does not return a status. So, we assume
2284 	 * that the calls succeeded. In reality, the calls may fail
2285 	 * if there is a syntax error, etc in the strings.
2286 	 */
2287 
2288 	return (1);
2289 }
2290 
2291 /*
2292  * Install the master-interrupt handler for a device.
2293  */
2294 static int
2295 opl_master_interrupt(dev_info_t *ap, fco_handle_t rp, fc_ci_t *cp)
2296 {
2297 	uint32_t	portid, xt;
2298 	int		board, channel, leaf;
2299 	int		status;
2300 
2301 	/* Check the argument */
2302 	if (fc_cell2int(cp->nargs) != 2)
2303 		return (fc_syntax_error(cp, "nargs must be 2"));
2304 
2305 	if (fc_cell2int(cp->nresults) < 1)
2306 		return (fc_syntax_error(cp, "nresults must be >= 1"));
2307 
2308 	/* Get the parameters */
2309 	portid = fc_cell2uint32_t(fc_arg(cp, 0));
2310 	xt = fc_cell2uint32_t(fc_arg(cp, 1));
2311 
2312 	board = OPL_IO_PORTID_TO_LSB(portid);
2313 	channel = OPL_PORTID_TO_CHANNEL(portid);
2314 	leaf = OPL_PORTID_TO_LEAF(portid);
2315 
2316 	if ((board >= HWD_SBS_PER_DOMAIN) || !OPL_VALID_CHANNEL(channel) ||
2317 	    (OPL_OBERON_CHANNEL(channel) && !OPL_VALID_LEAF(leaf)) ||
2318 	    ((channel == OPL_CMU_CHANNEL) && (leaf != 0))) {
2319 		FC_DEBUG1(1, CE_CONT, "opl_master_interrupt: invalid port %x\n",
2320 		    portid);
2321 		status = 0;
2322 	} else {
2323 		status = master_interrupt_init(portid, xt);
2324 	}
2325 
2326 	cp->nresults = fc_int2cell(1);
2327 	fc_result(cp, 0) = status;
2328 
2329 	return (fc_success_op(ap, rp, cp));
2330 }
2331 
2332 /*
2333  * Set the properties for a leaf node (Oberon leaf or CMU channel leaf).
2334  */
2335 /*ARGSUSED*/
2336 static int
2337 opl_create_leaf(dev_info_t *node, void *arg, uint_t flags)
2338 {
2339 	int ret;
2340 
2341 	OPL_UPDATE_PROP(string, node, "name", OPL_PCI_LEAF_NODE);
2342 
2343 	OPL_UPDATE_PROP(string, node, "status", "okay");
2344 
2345 	return (DDI_WALK_TERMINATE);
2346 }
2347 
2348 static char *
2349 opl_get_probe_string(opl_probe_t *probe, int channel, int leaf)
2350 {
2351 	char 		*probe_string;
2352 	int		portid;
2353 
2354 	probe_string = kmem_zalloc(PROBE_STR_SIZE, KM_SLEEP);
2355 
2356 	if (channel == OPL_CMU_CHANNEL)
2357 		portid = probe->pr_sb->sb_cmu.cmu_ch.chan_portid;
2358 	else
2359 		portid = probe->
2360 		    pr_sb->sb_pci_ch[channel].pci_leaf[leaf].leaf_port_id;
2361 
2362 	(void) sprintf(probe_string, "%x", portid);
2363 
2364 	return (probe_string);
2365 }
2366 
2367 static int
2368 opl_probe_leaf(opl_probe_t *probe)
2369 {
2370 	int		channel, leaf, portid, error, circ;
2371 	int		board;
2372 	fco_handle_t	fco_handle, *cfg_handle;
2373 	dev_info_t	*parent, *leaf_node;
2374 	char		unit_address[UNIT_ADDR_SIZE];
2375 	char		*probe_string;
2376 	opl_board_cfg_t	*board_cfg;
2377 
2378 	board = probe->pr_board;
2379 	channel = probe->pr_channel;
2380 	leaf = probe->pr_leaf;
2381 	parent = ddi_root_node();
2382 	board_cfg = &opl_boards[board];
2383 
2384 	ASSERT(OPL_VALID_CHANNEL(channel));
2385 	ASSERT(OPL_VALID_LEAF(leaf));
2386 
2387 	if (channel == OPL_CMU_CHANNEL) {
2388 		portid = probe->pr_sb->sb_cmu.cmu_ch.chan_portid;
2389 		cfg_handle = &board_cfg->cfg_cmuch_handle;
2390 	} else {
2391 		portid = probe->
2392 		    pr_sb->sb_pci_ch[channel].pci_leaf[leaf].leaf_port_id;
2393 		cfg_handle = &board_cfg->cfg_pcich_handle[channel][leaf];
2394 	}
2395 
2396 	/*
2397 	 * Prevent any changes to leaf_node until we have bound
2398 	 * it to the correct driver.
2399 	 */
2400 	ndi_devi_enter(parent, &circ);
2401 
2402 	/*
2403 	 * Ideally, fcode would be run from the "sid_branch_create"
2404 	 * callback (that is the primary purpose of that callback).
2405 	 * However, the fcode interpreter was written with the
2406 	 * assumption that the "new_child" was linked into the
2407 	 * device tree. The callback is invoked with the devinfo node
2408 	 * in the DS_PROTO state. More investigation is needed before
2409 	 * we can invoke the interpreter from the callback. For now,
2410 	 * we create the "new_child" in the BOUND state, invoke the
2411 	 * fcode interpreter and then rebind the dip to use any
2412 	 * compatible properties created by fcode.
2413 	 */
2414 
2415 	probe->pr_parent = parent;
2416 	probe->pr_create = opl_create_leaf;
2417 	probe->pr_hold = 1;
2418 
2419 	leaf_node = opl_create_node(probe);
2420 	if (leaf_node == NULL) {
2421 
2422 		cmn_err(CE_WARN, "IKP: create leaf (%d-%d-%d) failed",
2423 			probe->pr_board, probe->pr_channel, probe->pr_leaf);
2424 		ndi_devi_exit(parent, circ);
2425 		return (-1);
2426 	}
2427 
2428 	/*
2429 	 * The platform DR interfaces created the dip in
2430 	 * bound state. Bring devinfo node down to linked
2431 	 * state and hold it there until compatible
2432 	 * properties are created.
2433 	 */
2434 	e_ddi_branch_rele(leaf_node);
2435 	(void) i_ndi_unconfig_node(leaf_node, DS_LINKED, 0);
2436 	ASSERT(i_ddi_node_state(leaf_node) == DS_LINKED);
2437 	e_ddi_branch_hold(leaf_node);
2438 
2439 	mutex_enter(&DEVI(leaf_node)->devi_lock);
2440 	DEVI(leaf_node)->devi_flags |= DEVI_NO_BIND;
2441 	mutex_exit(&DEVI(leaf_node)->devi_lock);
2442 
2443 	/*
2444 	 * Drop the busy-hold on parent before calling
2445 	 * fcode_interpreter to prevent potential deadlocks
2446 	 */
2447 	ndi_devi_exit(parent, circ);
2448 
2449 	(void) sprintf(unit_address, "%x", portid);
2450 
2451 	/*
2452 	 * Get the probe string
2453 	 */
2454 	probe_string = opl_get_probe_string(probe, channel, leaf);
2455 
2456 	/*
2457 	 * The fcode pointer specified here is NULL and the fcode
2458 	 * size specified here is 0. This causes the user-level
2459 	 * fcode interpreter to issue a request to the fcode
2460 	 * driver to get the Oberon/cmu-ch fcode.
2461 	 */
2462 	fco_handle = opl_fc_ops_alloc_handle(parent, leaf_node,
2463 	    NULL, 0, unit_address, probe_string);
2464 
2465 	error = fcode_interpreter(parent, &opl_fc_do_op, fco_handle);
2466 
2467 	if (error != 0) {
2468 		cmn_err(CE_WARN, "IKP: Unable to probe PCI leaf (%d-%d-%d)",
2469 			probe->pr_board, probe->pr_channel, probe->pr_leaf);
2470 
2471 		opl_fc_ops_free_handle(fco_handle);
2472 
2473 		if (probe_string != NULL)
2474 			kmem_free(probe_string, PROBE_STR_SIZE);
2475 
2476 		(void) opl_destroy_node(leaf_node);
2477 	} else {
2478 		*cfg_handle = fco_handle;
2479 
2480 		if (channel == OPL_CMU_CHANNEL)
2481 			board_cfg->cfg_cmuch_probe_str = probe_string;
2482 		else
2483 			board_cfg->cfg_pcich_probe_str[channel][leaf]
2484 			    = probe_string;
2485 
2486 		/*
2487 		 * Compatible properties (if any) have been created,
2488 		 * so bind driver.
2489 		 */
2490 		ndi_devi_enter(parent, &circ);
2491 		ASSERT(i_ddi_node_state(leaf_node) <= DS_LINKED);
2492 
2493 		mutex_enter(&DEVI(leaf_node)->devi_lock);
2494 		DEVI(leaf_node)->devi_flags &= ~DEVI_NO_BIND;
2495 		mutex_exit(&DEVI(leaf_node)->devi_lock);
2496 
2497 		ndi_devi_exit(parent, circ);
2498 
2499 		if (ndi_devi_bind_driver(leaf_node, 0) !=
2500 			DDI_SUCCESS) {
2501 			cmn_err(CE_WARN,
2502 				"IKP: Unable to bind PCI leaf (%d-%d-%d)",
2503 				probe->pr_board, probe->pr_channel,
2504 				probe->pr_leaf);
2505 		}
2506 	}
2507 
2508 	if ((error != 0) && (channel == OPL_CMU_CHANNEL))
2509 		return (-1);
2510 
2511 	return (0);
2512 }
2513 
2514 static void
2515 opl_init_leaves(int myboard)
2516 {
2517 	dev_info_t	*parent, *node;
2518 	char		*name;
2519 	int 		circ, ret;
2520 	int		len, portid, board, channel, leaf;
2521 	opl_board_cfg_t	*cfg;
2522 
2523 	parent = ddi_root_node();
2524 
2525 	/*
2526 	 * Hold parent node busy to walk its child list
2527 	 */
2528 	ndi_devi_enter(parent, &circ);
2529 
2530 	for (node = ddi_get_child(parent);
2531 		(node != NULL);
2532 		node = ddi_get_next_sibling(node)) {
2533 
2534 		ret = OPL_GET_PROP(string, node, "name", &name, &len);
2535 		if (ret != DDI_PROP_SUCCESS) {
2536 			/*
2537 			 * The property does not exist for this node.
2538 			 */
2539 			continue;
2540 		}
2541 
2542 		if (strncmp(name, OPL_PCI_LEAF_NODE, len) == 0) {
2543 
2544 			ret = OPL_GET_PROP(int, node, "portid", &portid, -1);
2545 			if (ret == DDI_PROP_SUCCESS) {
2546 
2547 				ret = OPL_GET_PROP(int, node, "board#",
2548 				    &board, -1);
2549 				if ((ret != DDI_PROP_SUCCESS) ||
2550 				    (board != myboard)) {
2551 					kmem_free(name, len);
2552 					continue;
2553 				}
2554 
2555 				cfg = &opl_boards[board];
2556 				channel = OPL_PORTID_TO_CHANNEL(portid);
2557 				if (channel == OPL_CMU_CHANNEL) {
2558 
2559 					if (cfg->cfg_cmuch_handle != NULL)
2560 						cfg->cfg_cmuch_leaf = node;
2561 
2562 				} else {
2563 
2564 					leaf = OPL_PORTID_TO_LEAF(portid);
2565 					if (cfg->cfg_pcich_handle
2566 						[channel][leaf] != NULL)
2567 						cfg->cfg_pcich_leaf
2568 							[channel][leaf] = node;
2569 				}
2570 			}
2571 		}
2572 
2573 		kmem_free(name, len);
2574 		if (ret != DDI_PROP_SUCCESS)
2575 			break;
2576 	}
2577 
2578 	ndi_devi_exit(parent, circ);
2579 }
2580 
2581 /*
2582  * Create "pci" node and hierarchy for the Oberon channels and the
2583  * CMU channel.
2584  */
2585 /*ARGSUSED*/
2586 static int
2587 opl_probe_io(opl_probe_t *probe)
2588 {
2589 
2590 	int		i, j;
2591 	hwd_pci_ch_t	*channels;
2592 
2593 	if (HWD_STATUS_OK(probe->pr_sb->sb_cmu.cmu_ch.chan_status)) {
2594 
2595 		probe->pr_channel = HWD_CMU_CHANNEL;
2596 		probe->pr_channel_status =
2597 		    probe->pr_sb->sb_cmu.cmu_ch.chan_status;
2598 		probe->pr_leaf = 0;
2599 		probe->pr_leaf_status = probe->pr_channel_status;
2600 
2601 		if (opl_probe_leaf(probe) != 0)
2602 			return (-1);
2603 	}
2604 
2605 	channels = &probe->pr_sb->sb_pci_ch[0];
2606 
2607 	for (i = 0; i < HWD_PCI_CHANNELS_PER_SB; i++) {
2608 
2609 		if (!HWD_STATUS_OK(channels[i].pci_status))
2610 			continue;
2611 
2612 		probe->pr_channel = i;
2613 		probe->pr_channel_status = channels[i].pci_status;
2614 
2615 		for (j = 0; j < HWD_LEAVES_PER_PCI_CHANNEL; j++) {
2616 
2617 			probe->pr_leaf = j;
2618 			probe->pr_leaf_status =
2619 				channels[i].pci_leaf[j].leaf_status;
2620 
2621 			if (!HWD_STATUS_OK(probe->pr_leaf_status))
2622 				continue;
2623 
2624 			(void) opl_probe_leaf(probe);
2625 		}
2626 	}
2627 	opl_init_leaves(probe->pr_board);
2628 	return (0);
2629 }
2630 
2631 /*
2632  * Perform the probe in the following order:
2633  *
2634  *	processors
2635  *	memory
2636  *	IO
2637  *
2638  * Each probe function returns 0 on sucess and a non-zero value on failure.
2639  * What is a failure is determined by the implementor of the probe function.
2640  * For example, while probing CPUs, any error encountered during probe
2641  * is considered a failure and causes the whole probe operation to fail.
2642  * However, for I/O, an error encountered while probing one device
2643  * should not prevent other devices from being probed. It should not cause
2644  * the whole probe operation to fail.
2645  */
2646 int
2647 opl_probe_sb(int board)
2648 {
2649 	opl_probe_t	*probe;
2650 	int		ret;
2651 
2652 	if ((board < 0) || (board >= HWD_SBS_PER_DOMAIN))
2653 		return (-1);
2654 
2655 	ASSERT(opl_cfg_inited != 0);
2656 
2657 	/*
2658 	 * If the previous probe failed and left a partially configured
2659 	 * board, we need to unprobe the board and start with a clean slate.
2660 	 */
2661 	if ((opl_boards[board].cfg_hwd != NULL) &&
2662 	    (opl_unprobe_sb(board) != 0))
2663 		return (-1);
2664 
2665 	ret = 0;
2666 
2667 	probe = kmem_zalloc(sizeof (opl_probe_t), KM_SLEEP);
2668 	probe->pr_board = board;
2669 
2670 	if ((opl_probe_init(probe) != 0) ||
2671 
2672 	    (opl_probe_cpu_chips(probe) != 0) ||
2673 
2674 	    (opl_probe_memory(probe) != 0) ||
2675 
2676 	    (opl_probe_io(probe) != 0)) {
2677 
2678 		/*
2679 		 * Probe failed. Perform cleanup.
2680 		 */
2681 		(void) opl_unprobe_sb(board);
2682 		ret = -1;
2683 	}
2684 
2685 	kmem_free(probe, sizeof (opl_probe_t));
2686 
2687 	return (ret);
2688 }
2689 
2690 /*
2691  * This unprobing also includes CMU-CH.
2692  */
2693 /*ARGSUSED*/
2694 static int
2695 opl_unprobe_io(int board)
2696 {
2697 	int		i, j, ret;
2698 	opl_board_cfg_t	*board_cfg;
2699 	dev_info_t	**node;
2700 	fco_handle_t	*hand;
2701 	char		**probe_str;
2702 
2703 	board_cfg = &opl_boards[board];
2704 
2705 	for (i = 0; i < HWD_PCI_CHANNELS_PER_SB; i++) {
2706 
2707 		for (j = 0; j < HWD_LEAVES_PER_PCI_CHANNEL; j++) {
2708 
2709 			node = &board_cfg->cfg_pcich_leaf[i][j];
2710 			hand = &board_cfg->cfg_pcich_handle[i][j];
2711 			probe_str = &board_cfg->cfg_pcich_probe_str[i][j];
2712 
2713 			if (*node == NULL)
2714 				continue;
2715 
2716 			if (*hand != NULL) {
2717 				opl_fc_ops_free_handle(*hand);
2718 				*hand = NULL;
2719 			}
2720 
2721 			if (*probe_str != NULL) {
2722 				kmem_free(*probe_str, PROBE_STR_SIZE);
2723 				*probe_str = NULL;
2724 			}
2725 
2726 			ret = opl_destroy_node(*node);
2727 			if (ret != 0) {
2728 
2729 				cmn_err(CE_WARN,
2730 					"IKP: destroy pci (%d-%d-%d) failed",
2731 					board, i, j);
2732 				return (-1);
2733 			}
2734 
2735 			*node = NULL;
2736 
2737 		}
2738 	}
2739 
2740 	node = &board_cfg->cfg_cmuch_leaf;
2741 	hand = &board_cfg->cfg_cmuch_handle;
2742 	probe_str = &board_cfg->cfg_cmuch_probe_str;
2743 
2744 	if (*node == NULL)
2745 		return (0);
2746 
2747 	if (*hand != NULL) {
2748 		opl_fc_ops_free_handle(*hand);
2749 		*hand = NULL;
2750 	}
2751 
2752 	if (*probe_str != NULL) {
2753 		kmem_free(*probe_str, PROBE_STR_SIZE);
2754 		*probe_str = NULL;
2755 	}
2756 
2757 	if (opl_destroy_node(*node) != 0) {
2758 
2759 		cmn_err(CE_WARN, "IKP: destroy pci (%d-%d-%d) failed",
2760 			board, OPL_CMU_CHANNEL, 0);
2761 		return (-1);
2762 	}
2763 
2764 	*node = NULL;
2765 
2766 	return (0);
2767 }
2768 
2769 /*
2770  * Destroy the "pseudo-mc" node for a board.
2771  */
2772 static int
2773 opl_unprobe_memory(int board)
2774 {
2775 	opl_board_cfg_t	*board_cfg;
2776 
2777 	board_cfg = &opl_boards[board];
2778 
2779 	if (board_cfg->cfg_pseudo_mc == NULL)
2780 		return (0);
2781 
2782 	if (opl_destroy_node(board_cfg->cfg_pseudo_mc) != 0) {
2783 
2784 		cmn_err(CE_WARN, "IKP: destroy pseudo-mc (%d) failed", board);
2785 		return (-1);
2786 	}
2787 
2788 	board_cfg->cfg_pseudo_mc = NULL;
2789 
2790 	return (0);
2791 }
2792 
2793 /*
2794  * Destroy the "cmp" nodes for a board. This also destroys the "core"
2795  * and "cpu" nodes below the "cmp" nodes.
2796  */
2797 static int
2798 opl_unprobe_processors(int board)
2799 {
2800 	int		i;
2801 	dev_info_t	**cfg_cpu_chips;
2802 
2803 	cfg_cpu_chips = opl_boards[board].cfg_cpu_chips;
2804 
2805 	for (i = 0; i < HWD_CPU_CHIPS_PER_CMU; i++) {
2806 
2807 		if (cfg_cpu_chips[i] == NULL)
2808 			continue;
2809 
2810 		if (opl_destroy_node(cfg_cpu_chips[i]) != 0) {
2811 
2812 			cmn_err(CE_WARN,
2813 				"IKP: destroy chip (%d-%d) failed", board, i);
2814 			return (-1);
2815 		}
2816 
2817 		cfg_cpu_chips[i] = NULL;
2818 	}
2819 
2820 	return (0);
2821 }
2822 
2823 /*
2824  * Perform the unprobe in the following order:
2825  *
2826  *	IO
2827  *	memory
2828  *	processors
2829  */
2830 int
2831 opl_unprobe_sb(int board)
2832 {
2833 	if ((board < 0) || (board >= HWD_SBS_PER_DOMAIN))
2834 		return (-1);
2835 
2836 	ASSERT(opl_cfg_inited != 0);
2837 
2838 	if ((opl_unprobe_io(board) != 0) ||
2839 
2840 	    (opl_unprobe_memory(board) != 0) ||
2841 
2842 	    (opl_unprobe_processors(board) != 0))
2843 
2844 		return (-1);
2845 
2846 	if (opl_boards[board].cfg_hwd != NULL) {
2847 #ifdef UCTEST
2848 		size_t			size = 0xA000;
2849 #endif
2850 		/* Release the memory for the HWD */
2851 		void *hwdp = opl_boards[board].cfg_hwd;
2852 		opl_boards[board].cfg_hwd = NULL;
2853 #ifdef UCTEST
2854 		hwdp = (void *)((char *)hwdp - 0x1000);
2855 		hat_unload(kas.a_hat, hwdp, size, HAT_UNLOAD_UNLOCK);
2856 		vmem_free(heap_arena, hwdp, size);
2857 #else
2858 		kmem_free(hwdp, HWD_DATA_SIZE);
2859 #endif
2860 	}
2861 	return (0);
2862 }
2863 
2864 /*
2865  * For MAC patrol support, we need to update the PA-related properties
2866  * when there is a copy-rename event.  This should be called after the
2867  * physical copy and rename has been done by DR, and before the MAC
2868  * patrol is restarted.
2869  */
2870 int
2871 oplcfg_pa_swap(int from, int to)
2872 {
2873 	dev_info_t *from_node = opl_boards[from].cfg_pseudo_mc;
2874 	dev_info_t *to_node = opl_boards[to].cfg_pseudo_mc;
2875 	opl_range_t *rangef, *ranget;
2876 	int elems;
2877 	int ret;
2878 
2879 	if ((OPL_GET_PROP_ARRAY(int, from_node, "sb-mem-ranges", rangef,
2880 	    elems) != DDI_SUCCESS) || (elems != 4)) {
2881 		/* XXX -- bad news */
2882 		return (-1);
2883 	}
2884 	if ((OPL_GET_PROP_ARRAY(int, to_node, "sb-mem-ranges", ranget,
2885 	    elems) != DDI_SUCCESS) || (elems != 4)) {
2886 		/* XXX -- bad news */
2887 		return (-1);
2888 	}
2889 	OPL_UPDATE_PROP_ARRAY(int, from_node, "sb-mem-ranges", (int *)ranget,
2890 	    4);
2891 	OPL_UPDATE_PROP_ARRAY(int, to_node, "sb-mem-ranges", (int *)rangef,
2892 	    4);
2893 
2894 	OPL_FREE_PROP(ranget);
2895 	OPL_FREE_PROP(rangef);
2896 
2897 	return (0);
2898 }
2899