17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate * CDDL HEADER START
37c478bd9Sstevel@tonic-gate *
47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the
5e12a8a13Ssusans * Common Development and Distribution License (the "License").
6e12a8a13Ssusans * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate *
87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate * and limitations under the License.
127c478bd9Sstevel@tonic-gate *
137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate *
197c478bd9Sstevel@tonic-gate * CDDL HEADER END
207c478bd9Sstevel@tonic-gate */
2107d06da5SSurya Prakki
227c478bd9Sstevel@tonic-gate /*
2307d06da5SSurya Prakki * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
247c478bd9Sstevel@tonic-gate * Use is subject to license terms.
257c478bd9Sstevel@tonic-gate */
267c478bd9Sstevel@tonic-gate
277c478bd9Sstevel@tonic-gate #include <sys/cpuvar.h>
287c478bd9Sstevel@tonic-gate #include <sys/param.h>
297c478bd9Sstevel@tonic-gate #include <sys/systm.h>
307c478bd9Sstevel@tonic-gate #include <sys/sunddi.h>
317c478bd9Sstevel@tonic-gate #include <sys/ddi.h>
323611c136Smb158278 #include <sys/esunddi.h>
337c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h>
347c478bd9Sstevel@tonic-gate #include <sys/note.h>
357c478bd9Sstevel@tonic-gate
367c478bd9Sstevel@tonic-gate #include <sys/modctl.h> /* for modload() */
377c478bd9Sstevel@tonic-gate #include <sys/platform_module.h>
387c478bd9Sstevel@tonic-gate #include <sys/errno.h>
397c478bd9Sstevel@tonic-gate #include <sys/daktari.h>
407c478bd9Sstevel@tonic-gate #include <sys/machsystm.h>
417c478bd9Sstevel@tonic-gate #include <sys/promif.h>
427c478bd9Sstevel@tonic-gate #include <vm/page.h>
437c478bd9Sstevel@tonic-gate #include <sys/memnode.h>
447c478bd9Sstevel@tonic-gate #include <vm/vm_dep.h>
457c478bd9Sstevel@tonic-gate
467c478bd9Sstevel@tonic-gate /* I2C Stuff */
477c478bd9Sstevel@tonic-gate #include <sys/i2c/clients/i2c_client.h>
487c478bd9Sstevel@tonic-gate
497c478bd9Sstevel@tonic-gate
507c478bd9Sstevel@tonic-gate int (*p2get_mem_unum)(int, uint64_t, char *, int, int *);
517c478bd9Sstevel@tonic-gate
527c478bd9Sstevel@tonic-gate /* Daktari Keyswitch Information */
537c478bd9Sstevel@tonic-gate #define DAK_KEY_POLL_PORT 3
547c478bd9Sstevel@tonic-gate #define DAK_KEY_POLL_BIT 2
557c478bd9Sstevel@tonic-gate #define DAK_KEY_POLL_INTVL 10
567c478bd9Sstevel@tonic-gate
577c478bd9Sstevel@tonic-gate static boolean_t key_locked_bit;
587c478bd9Sstevel@tonic-gate static clock_t keypoll_timeout_hz;
597c478bd9Sstevel@tonic-gate
607c478bd9Sstevel@tonic-gate /*
6113bb8906Slm66018 * Table that maps memory slices to a specific memnode.
6213bb8906Slm66018 */
6313bb8906Slm66018 int slice_to_memnode[DAK_MAX_SLICE];
6413bb8906Slm66018
6513bb8906Slm66018 /*
667c478bd9Sstevel@tonic-gate * For software memory interleaving support.
677c478bd9Sstevel@tonic-gate */
687c478bd9Sstevel@tonic-gate static void update_mem_bounds(int, int, int, uint64_t, uint64_t);
697c478bd9Sstevel@tonic-gate
707c478bd9Sstevel@tonic-gate static uint64_t
717c478bd9Sstevel@tonic-gate slice_table[DAK_SBD_SLOTS][DAK_CPUS_PER_BOARD][DAK_BANKS_PER_MC][2];
727c478bd9Sstevel@tonic-gate
737c478bd9Sstevel@tonic-gate #define SLICE_PA 0
747c478bd9Sstevel@tonic-gate #define SLICE_SPAN 1
757c478bd9Sstevel@tonic-gate
767c478bd9Sstevel@tonic-gate int (*daktari_ssc050_get_port_bit) (dev_info_t *, int, int, uint8_t *, int);
777c478bd9Sstevel@tonic-gate extern void (*abort_seq_handler)();
787c478bd9Sstevel@tonic-gate static int daktari_dev_search(dev_info_t *, void *);
797c478bd9Sstevel@tonic-gate static void keyswitch_poll(void *);
807c478bd9Sstevel@tonic-gate static void daktari_abort_seq_handler(char *msg);
817c478bd9Sstevel@tonic-gate
827c478bd9Sstevel@tonic-gate void
startup_platform(void)837c478bd9Sstevel@tonic-gate startup_platform(void)
847c478bd9Sstevel@tonic-gate {
857c478bd9Sstevel@tonic-gate /*
867c478bd9Sstevel@tonic-gate * Disable an active h/w watchdog timer
877c478bd9Sstevel@tonic-gate * upon exit to OBP.
887c478bd9Sstevel@tonic-gate */
897c478bd9Sstevel@tonic-gate extern int disable_watchdog_on_exit;
907c478bd9Sstevel@tonic-gate disable_watchdog_on_exit = 1;
917c478bd9Sstevel@tonic-gate }
927c478bd9Sstevel@tonic-gate
937c478bd9Sstevel@tonic-gate int
set_platform_tsb_spares()947c478bd9Sstevel@tonic-gate set_platform_tsb_spares()
957c478bd9Sstevel@tonic-gate {
967c478bd9Sstevel@tonic-gate return (0);
977c478bd9Sstevel@tonic-gate }
987c478bd9Sstevel@tonic-gate
997c478bd9Sstevel@tonic-gate #pragma weak mmu_init_large_pages
1007c478bd9Sstevel@tonic-gate
1017c478bd9Sstevel@tonic-gate void
set_platform_defaults(void)1027c478bd9Sstevel@tonic-gate set_platform_defaults(void)
1037c478bd9Sstevel@tonic-gate {
1047c478bd9Sstevel@tonic-gate extern void mmu_init_large_pages(size_t);
1057c478bd9Sstevel@tonic-gate
1067c478bd9Sstevel@tonic-gate if ((mmu_page_sizes == max_mmu_page_sizes) &&
107e12a8a13Ssusans (mmu_ism_pagesize != DEFAULT_ISM_PAGESIZE)) {
1087c478bd9Sstevel@tonic-gate if (&mmu_init_large_pages)
1097c478bd9Sstevel@tonic-gate mmu_init_large_pages(mmu_ism_pagesize);
1107c478bd9Sstevel@tonic-gate }
1117c478bd9Sstevel@tonic-gate }
1127c478bd9Sstevel@tonic-gate
1137c478bd9Sstevel@tonic-gate void
load_platform_modules(void)1147c478bd9Sstevel@tonic-gate load_platform_modules(void)
1157c478bd9Sstevel@tonic-gate {
1167c478bd9Sstevel@tonic-gate if (modload("misc", "pcihp") < 0) {
1177c478bd9Sstevel@tonic-gate cmn_err(CE_NOTE, "pcihp driver failed to load");
1187c478bd9Sstevel@tonic-gate }
1197c478bd9Sstevel@tonic-gate if (modload("drv", "pmc") < 0) {
1207c478bd9Sstevel@tonic-gate cmn_err(CE_NOTE, "pmc driver failed to load");
1217c478bd9Sstevel@tonic-gate }
1227c478bd9Sstevel@tonic-gate
1237c478bd9Sstevel@tonic-gate }
1247c478bd9Sstevel@tonic-gate
1257c478bd9Sstevel@tonic-gate void
load_platform_drivers(void)1267c478bd9Sstevel@tonic-gate load_platform_drivers(void)
1277c478bd9Sstevel@tonic-gate {
1287c478bd9Sstevel@tonic-gate char **drv;
1297c478bd9Sstevel@tonic-gate dev_info_t *keysw_dip;
1307c478bd9Sstevel@tonic-gate
1317c478bd9Sstevel@tonic-gate static char *boot_time_drivers[] = {
1327c478bd9Sstevel@tonic-gate "hpc3130",
1337c478bd9Sstevel@tonic-gate "todds1287",
1347c478bd9Sstevel@tonic-gate "mc-us3",
1357c478bd9Sstevel@tonic-gate "ssc050",
1367c478bd9Sstevel@tonic-gate "pcisch",
1377c478bd9Sstevel@tonic-gate NULL
1387c478bd9Sstevel@tonic-gate };
1397c478bd9Sstevel@tonic-gate
1407c478bd9Sstevel@tonic-gate for (drv = boot_time_drivers; *drv; drv++) {
1417c478bd9Sstevel@tonic-gate if (i_ddi_attach_hw_nodes(*drv) != DDI_SUCCESS)
1427c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "Failed to install \"%s\" driver.",
1437c478bd9Sstevel@tonic-gate *drv);
1447c478bd9Sstevel@tonic-gate }
1457c478bd9Sstevel@tonic-gate
1467c478bd9Sstevel@tonic-gate /*
1477c478bd9Sstevel@tonic-gate * mc-us3 & ssc050 must stay loaded for plat_get_mem_unum()
1487c478bd9Sstevel@tonic-gate * and keyswitch_poll()
1497c478bd9Sstevel@tonic-gate */
1507c478bd9Sstevel@tonic-gate (void) ddi_hold_driver(ddi_name_to_major("mc-us3"));
1517c478bd9Sstevel@tonic-gate (void) ddi_hold_driver(ddi_name_to_major("ssc050"));
1527c478bd9Sstevel@tonic-gate
1537c478bd9Sstevel@tonic-gate /* Gain access into the ssc050_get_port function */
1547c478bd9Sstevel@tonic-gate daktari_ssc050_get_port_bit = (int (*) (dev_info_t *, int, int,
1557c478bd9Sstevel@tonic-gate uint8_t *, int)) modgetsymvalue("ssc050_get_port_bit", 0);
1567c478bd9Sstevel@tonic-gate if (daktari_ssc050_get_port_bit == NULL) {
1577c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "cannot find ssc050_get_port_bit");
1587c478bd9Sstevel@tonic-gate return;
1597c478bd9Sstevel@tonic-gate }
1607c478bd9Sstevel@tonic-gate
1617c478bd9Sstevel@tonic-gate ddi_walk_devs(ddi_root_node(), daktari_dev_search, (void *)&keysw_dip);
1627c478bd9Sstevel@tonic-gate ASSERT(keysw_dip != NULL);
1637c478bd9Sstevel@tonic-gate
1643611c136Smb158278 /*
1653611c136Smb158278 * prevent detach of i2c-ssc050
1663611c136Smb158278 */
1673611c136Smb158278 e_ddi_hold_devi(keysw_dip);
1683611c136Smb158278
1697c478bd9Sstevel@tonic-gate keypoll_timeout_hz = drv_usectohz(10 * MICROSEC);
1707c478bd9Sstevel@tonic-gate keyswitch_poll(keysw_dip);
1717c478bd9Sstevel@tonic-gate abort_seq_handler = daktari_abort_seq_handler;
1727c478bd9Sstevel@tonic-gate }
1737c478bd9Sstevel@tonic-gate
1747c478bd9Sstevel@tonic-gate static int
daktari_dev_search(dev_info_t * dip,void * arg)1757c478bd9Sstevel@tonic-gate daktari_dev_search(dev_info_t *dip, void *arg)
1767c478bd9Sstevel@tonic-gate {
1777c478bd9Sstevel@tonic-gate char *compatible = NULL; /* Search tree for "i2c-ssc050" */
1787c478bd9Sstevel@tonic-gate int *dev_regs; /* Info about where the device is. */
1797c478bd9Sstevel@tonic-gate uint_t len;
1807c478bd9Sstevel@tonic-gate int err;
1817c478bd9Sstevel@tonic-gate
1827c478bd9Sstevel@tonic-gate if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1837c478bd9Sstevel@tonic-gate "compatible", &compatible) != DDI_PROP_SUCCESS)
1847c478bd9Sstevel@tonic-gate return (DDI_WALK_CONTINUE);
1857c478bd9Sstevel@tonic-gate
1867c478bd9Sstevel@tonic-gate if (strcmp(compatible, "i2c-ssc050") == 0) {
1877c478bd9Sstevel@tonic-gate ddi_prop_free(compatible);
1887c478bd9Sstevel@tonic-gate
1897c478bd9Sstevel@tonic-gate err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip,
1907c478bd9Sstevel@tonic-gate DDI_PROP_DONTPASS, "reg", &dev_regs, &len);
1917c478bd9Sstevel@tonic-gate if (err != DDI_PROP_SUCCESS) {
1927c478bd9Sstevel@tonic-gate return (DDI_WALK_CONTINUE);
1937c478bd9Sstevel@tonic-gate }
1947c478bd9Sstevel@tonic-gate /*
1957c478bd9Sstevel@tonic-gate * regs[0] contains the bus number and regs[1]
1967c478bd9Sstevel@tonic-gate * contains the device address of the i2c device.
1977c478bd9Sstevel@tonic-gate * 0x82 is the device address of the i2c device
1987c478bd9Sstevel@tonic-gate * from which the key switch position is read.
1997c478bd9Sstevel@tonic-gate */
2007c478bd9Sstevel@tonic-gate if (dev_regs[0] == 0 && dev_regs[1] == 0x82) {
2017c478bd9Sstevel@tonic-gate *((dev_info_t **)arg) = dip;
2027c478bd9Sstevel@tonic-gate ddi_prop_free(dev_regs);
2037c478bd9Sstevel@tonic-gate return (DDI_WALK_TERMINATE);
2047c478bd9Sstevel@tonic-gate }
2057c478bd9Sstevel@tonic-gate ddi_prop_free(dev_regs);
2067c478bd9Sstevel@tonic-gate } else {
2077c478bd9Sstevel@tonic-gate ddi_prop_free(compatible);
2087c478bd9Sstevel@tonic-gate }
2097c478bd9Sstevel@tonic-gate return (DDI_WALK_CONTINUE);
2107c478bd9Sstevel@tonic-gate }
2117c478bd9Sstevel@tonic-gate
2127c478bd9Sstevel@tonic-gate static void
keyswitch_poll(void * arg)2137c478bd9Sstevel@tonic-gate keyswitch_poll(void *arg)
2147c478bd9Sstevel@tonic-gate {
2157c478bd9Sstevel@tonic-gate dev_info_t *dip = arg;
2167c478bd9Sstevel@tonic-gate uchar_t port_byte;
2177c478bd9Sstevel@tonic-gate int port = DAK_KEY_POLL_PORT;
2187c478bd9Sstevel@tonic-gate int bit = DAK_KEY_POLL_BIT;
2197c478bd9Sstevel@tonic-gate int err;
2207c478bd9Sstevel@tonic-gate
2217c478bd9Sstevel@tonic-gate err = daktari_ssc050_get_port_bit(dip, port, bit,
2227c478bd9Sstevel@tonic-gate &port_byte, I2C_NOSLEEP);
2237c478bd9Sstevel@tonic-gate if (err != 0) {
2243611c136Smb158278 cmn_err(CE_WARN, "keyswitch polling disabled: "
2253611c136Smb158278 "errno=%d while reading ssc050", err);
2267c478bd9Sstevel@tonic-gate return;
2277c478bd9Sstevel@tonic-gate }
2287c478bd9Sstevel@tonic-gate
2297c478bd9Sstevel@tonic-gate key_locked_bit = (boolean_t)((port_byte & 0x1));
23007d06da5SSurya Prakki (void) timeout(keyswitch_poll, (caddr_t)dip, keypoll_timeout_hz);
2317c478bd9Sstevel@tonic-gate }
2327c478bd9Sstevel@tonic-gate
2337c478bd9Sstevel@tonic-gate static void
daktari_abort_seq_handler(char * msg)2347c478bd9Sstevel@tonic-gate daktari_abort_seq_handler(char *msg)
2357c478bd9Sstevel@tonic-gate {
2367c478bd9Sstevel@tonic-gate if (key_locked_bit == 0)
2377c478bd9Sstevel@tonic-gate cmn_err(CE_CONT, "KEY in LOCKED position, "
2387c478bd9Sstevel@tonic-gate "ignoring debug enter sequence");
2397c478bd9Sstevel@tonic-gate else {
2407c478bd9Sstevel@tonic-gate debug_enter(msg);
2417c478bd9Sstevel@tonic-gate }
2427c478bd9Sstevel@tonic-gate }
2437c478bd9Sstevel@tonic-gate
2447c478bd9Sstevel@tonic-gate
2457c478bd9Sstevel@tonic-gate int
plat_cpu_poweron(struct cpu * cp)2467c478bd9Sstevel@tonic-gate plat_cpu_poweron(struct cpu *cp)
2477c478bd9Sstevel@tonic-gate {
2487c478bd9Sstevel@tonic-gate _NOTE(ARGUNUSED(cp))
2497c478bd9Sstevel@tonic-gate return (ENOTSUP);
2507c478bd9Sstevel@tonic-gate }
2517c478bd9Sstevel@tonic-gate
2527c478bd9Sstevel@tonic-gate int
plat_cpu_poweroff(struct cpu * cp)2537c478bd9Sstevel@tonic-gate plat_cpu_poweroff(struct cpu *cp)
2547c478bd9Sstevel@tonic-gate {
2557c478bd9Sstevel@tonic-gate _NOTE(ARGUNUSED(cp))
2567c478bd9Sstevel@tonic-gate return (ENOTSUP);
2577c478bd9Sstevel@tonic-gate }
2587c478bd9Sstevel@tonic-gate
2597c478bd9Sstevel@tonic-gate /*
2607c478bd9Sstevel@tonic-gate * Given a pfn, return the board and beginning/end of the page's
2617c478bd9Sstevel@tonic-gate * memory controller's address range.
2627c478bd9Sstevel@tonic-gate */
2637c478bd9Sstevel@tonic-gate static int
plat_discover_slice(pfn_t pfn,pfn_t * first,pfn_t * last)2647c478bd9Sstevel@tonic-gate plat_discover_slice(pfn_t pfn, pfn_t *first, pfn_t *last)
2657c478bd9Sstevel@tonic-gate {
2667c478bd9Sstevel@tonic-gate int bd, cpu, bank;
2677c478bd9Sstevel@tonic-gate
2687c478bd9Sstevel@tonic-gate for (bd = 0; bd < DAK_SBD_SLOTS; bd++) {
2697c478bd9Sstevel@tonic-gate for (cpu = 0; cpu < DAK_CPUS_PER_BOARD; cpu++) {
2707c478bd9Sstevel@tonic-gate for (bank = 0; bank < DAK_BANKS_PER_MC; bank++) {
2717c478bd9Sstevel@tonic-gate uint64_t *slice = slice_table[bd][cpu][bank];
2727c478bd9Sstevel@tonic-gate uint64_t base = btop(slice[SLICE_PA]);
2737c478bd9Sstevel@tonic-gate uint64_t len = btop(slice[SLICE_SPAN]);
2747c478bd9Sstevel@tonic-gate if (len && pfn >= base && pfn < (base + len)) {
2757c478bd9Sstevel@tonic-gate *first = base;
2767c478bd9Sstevel@tonic-gate *last = base + len - 1;
2777c478bd9Sstevel@tonic-gate return (bd);
2787c478bd9Sstevel@tonic-gate }
2797c478bd9Sstevel@tonic-gate }
2807c478bd9Sstevel@tonic-gate }
2817c478bd9Sstevel@tonic-gate }
2827c478bd9Sstevel@tonic-gate panic("plat_discover_slice: no slice for pfn 0x%lx\n", pfn);
2837c478bd9Sstevel@tonic-gate /* NOTREACHED */
2847c478bd9Sstevel@tonic-gate }
2857c478bd9Sstevel@tonic-gate
28613bb8906Slm66018 /*ARGSUSED*/
2877c478bd9Sstevel@tonic-gate void
plat_freelist_process(int mnode)2887c478bd9Sstevel@tonic-gate plat_freelist_process(int mnode)
28913bb8906Slm66018 {}
2907c478bd9Sstevel@tonic-gate
2917c478bd9Sstevel@tonic-gate
2927c478bd9Sstevel@tonic-gate /*
2937c478bd9Sstevel@tonic-gate * Called for each board/cpu/PA range detected in plat_fill_mc().
2947c478bd9Sstevel@tonic-gate */
2957c478bd9Sstevel@tonic-gate static void
update_mem_bounds(int boardid,int cpuid,int bankid,uint64_t base,uint64_t size)2967c478bd9Sstevel@tonic-gate update_mem_bounds(int boardid, int cpuid, int bankid,
2977c478bd9Sstevel@tonic-gate uint64_t base, uint64_t size)
2987c478bd9Sstevel@tonic-gate {
29913bb8906Slm66018 uint64_t end;
30013bb8906Slm66018 int mnode;
30113bb8906Slm66018
3027c478bd9Sstevel@tonic-gate slice_table[boardid][cpuid][bankid][SLICE_PA] = base;
3037c478bd9Sstevel@tonic-gate slice_table[boardid][cpuid][bankid][SLICE_SPAN] = size;
30413bb8906Slm66018
30513bb8906Slm66018 end = base + size - 1;
30613bb8906Slm66018
30713bb8906Slm66018 /*
30813bb8906Slm66018 * First see if this board already has a memnode associated
30913bb8906Slm66018 * with it. If not, see if this slice has a memnode. This
31013bb8906Slm66018 * covers the cases where a single slice covers multiple
31113bb8906Slm66018 * boards (cross-board interleaving) and where a single
31213bb8906Slm66018 * board has multiple slices (1+GB DIMMs).
31313bb8906Slm66018 */
31413bb8906Slm66018 if ((mnode = plat_lgrphand_to_mem_node(boardid)) == -1) {
31513bb8906Slm66018 if ((mnode = slice_to_memnode[PA_2_SLICE(base)]) == -1)
31613bb8906Slm66018 mnode = mem_node_alloc();
31713bb8906Slm66018
31813bb8906Slm66018 ASSERT(mnode >= 0);
31913bb8906Slm66018 ASSERT(mnode < MAX_MEM_NODES);
32013bb8906Slm66018 plat_assign_lgrphand_to_mem_node(boardid, mnode);
32113bb8906Slm66018 }
32213bb8906Slm66018
32313bb8906Slm66018 base = P2ALIGN(base, (1ul << PA_SLICE_SHIFT));
32413bb8906Slm66018
32513bb8906Slm66018 while (base < end) {
32613bb8906Slm66018 slice_to_memnode[PA_2_SLICE(base)] = mnode;
32713bb8906Slm66018 base += (1ul << PA_SLICE_SHIFT);
32813bb8906Slm66018 }
3297c478bd9Sstevel@tonic-gate }
3307c478bd9Sstevel@tonic-gate
3317c478bd9Sstevel@tonic-gate /*
3327c478bd9Sstevel@tonic-gate * Dynamically detect memory slices in the system by decoding
3337c478bd9Sstevel@tonic-gate * the cpu memory decoder registers at boot time.
3347c478bd9Sstevel@tonic-gate */
3357c478bd9Sstevel@tonic-gate void
plat_fill_mc(pnode_t nodeid)336fa9e4066Sahrens plat_fill_mc(pnode_t nodeid)
3377c478bd9Sstevel@tonic-gate {
3387c478bd9Sstevel@tonic-gate uint64_t mc_addr, saf_addr;
3397c478bd9Sstevel@tonic-gate uint64_t mc_decode[DAK_BANKS_PER_MC];
3407c478bd9Sstevel@tonic-gate uint64_t base, size;
3417c478bd9Sstevel@tonic-gate uint64_t saf_mask;
3427c478bd9Sstevel@tonic-gate uint64_t offset;
3437c478bd9Sstevel@tonic-gate uint32_t regs[4];
3447c478bd9Sstevel@tonic-gate int len;
3457c478bd9Sstevel@tonic-gate int local_mc;
3467c478bd9Sstevel@tonic-gate int portid;
3477c478bd9Sstevel@tonic-gate int boardid;
3487c478bd9Sstevel@tonic-gate int cpuid;
3497c478bd9Sstevel@tonic-gate int i;
3507c478bd9Sstevel@tonic-gate
3517c478bd9Sstevel@tonic-gate if ((prom_getprop(nodeid, "portid", (caddr_t)&portid) < 0) ||
3527c478bd9Sstevel@tonic-gate (portid == -1))
3537c478bd9Sstevel@tonic-gate return;
3547c478bd9Sstevel@tonic-gate
3557c478bd9Sstevel@tonic-gate /*
3567c478bd9Sstevel@tonic-gate * Decode the board number from the MC portid. Assumes
3577c478bd9Sstevel@tonic-gate * portid == safari agentid.
3587c478bd9Sstevel@tonic-gate */
3597c478bd9Sstevel@tonic-gate boardid = DAK_GETSLOT(portid);
3607c478bd9Sstevel@tonic-gate cpuid = DAK_GETSID(portid);
3617c478bd9Sstevel@tonic-gate
3627c478bd9Sstevel@tonic-gate /*
3637c478bd9Sstevel@tonic-gate * The "reg" property returns 4 32-bit values. The first two are
3647c478bd9Sstevel@tonic-gate * combined to form a 64-bit address. The second two are for a
3657c478bd9Sstevel@tonic-gate * 64-bit size, but we don't actually need to look at that value.
3667c478bd9Sstevel@tonic-gate */
3677c478bd9Sstevel@tonic-gate len = prom_getproplen(nodeid, "reg");
3687c478bd9Sstevel@tonic-gate if (len != (sizeof (uint32_t) * 4)) {
3697c478bd9Sstevel@tonic-gate prom_printf("Warning: malformed 'reg' property\n");
3707c478bd9Sstevel@tonic-gate return;
3717c478bd9Sstevel@tonic-gate }
3727c478bd9Sstevel@tonic-gate if (prom_getprop(nodeid, "reg", (caddr_t)regs) < 0)
3737c478bd9Sstevel@tonic-gate return;
3747c478bd9Sstevel@tonic-gate mc_addr = ((uint64_t)regs[0]) << 32;
3757c478bd9Sstevel@tonic-gate mc_addr |= (uint64_t)regs[1];
3767c478bd9Sstevel@tonic-gate
3777c478bd9Sstevel@tonic-gate /*
3787c478bd9Sstevel@tonic-gate * Figure out whether the memory controller we are examining
3797c478bd9Sstevel@tonic-gate * belongs to this CPU or a different one.
3807c478bd9Sstevel@tonic-gate */
3817c478bd9Sstevel@tonic-gate saf_addr = lddsafaddr(8);
3827c478bd9Sstevel@tonic-gate saf_mask = (uint64_t)SAF_MASK;
3837c478bd9Sstevel@tonic-gate if ((mc_addr & saf_mask) == saf_addr)
3847c478bd9Sstevel@tonic-gate local_mc = 1;
3857c478bd9Sstevel@tonic-gate else
3867c478bd9Sstevel@tonic-gate local_mc = 0;
3877c478bd9Sstevel@tonic-gate
3887c478bd9Sstevel@tonic-gate for (i = 0; i < DAK_BANKS_PER_MC; i++) {
3897c478bd9Sstevel@tonic-gate /*
3907c478bd9Sstevel@tonic-gate * Memory decode masks are at offsets 0x10 - 0x28.
3917c478bd9Sstevel@tonic-gate */
3927c478bd9Sstevel@tonic-gate offset = 0x10 + (i << 3);
3937c478bd9Sstevel@tonic-gate
3947c478bd9Sstevel@tonic-gate /*
3957c478bd9Sstevel@tonic-gate * If the memory controller is local to this CPU, we use
3967c478bd9Sstevel@tonic-gate * the special ASI to read the decode registers.
3977c478bd9Sstevel@tonic-gate * Otherwise, we load the values from a magic address in
3987c478bd9Sstevel@tonic-gate * I/O space.
3997c478bd9Sstevel@tonic-gate */
4007c478bd9Sstevel@tonic-gate if (local_mc)
4017c478bd9Sstevel@tonic-gate mc_decode[i] = lddmcdecode(offset);
4027c478bd9Sstevel@tonic-gate else
4037c478bd9Sstevel@tonic-gate mc_decode[i] = lddphysio(mc_addr | offset);
4047c478bd9Sstevel@tonic-gate
4057c478bd9Sstevel@tonic-gate /*
4067c478bd9Sstevel@tonic-gate * If the upper bit is set, we have a valid mask
4077c478bd9Sstevel@tonic-gate */
4087c478bd9Sstevel@tonic-gate if ((int64_t)mc_decode[i] < 0) {
4097c478bd9Sstevel@tonic-gate /*
4107c478bd9Sstevel@tonic-gate * The memory decode register is a bitmask field,
4117c478bd9Sstevel@tonic-gate * so we can decode that into both a base and
4127c478bd9Sstevel@tonic-gate * a span.
4137c478bd9Sstevel@tonic-gate */
4147c478bd9Sstevel@tonic-gate base = MC_BASE(mc_decode[i]) << PHYS2UM_SHIFT;
4157c478bd9Sstevel@tonic-gate size = MC_UK2SPAN(mc_decode[i]);
4167c478bd9Sstevel@tonic-gate update_mem_bounds(boardid, cpuid, i, base, size);
4177c478bd9Sstevel@tonic-gate }
4187c478bd9Sstevel@tonic-gate }
4197c478bd9Sstevel@tonic-gate }
4207c478bd9Sstevel@tonic-gate
42113bb8906Slm66018
42213bb8906Slm66018 /*
42313bb8906Slm66018 * This routine is run midway through the boot process. By the time we get
42413bb8906Slm66018 * here, we know about all the active CPU boards in the system, and we have
42513bb8906Slm66018 * extracted information about each board's memory from the memory
42613bb8906Slm66018 * controllers. We have also figured out which ranges of memory will be
42713bb8906Slm66018 * assigned to which memnodes, so we walk the slice table to build the table
42813bb8906Slm66018 * of memnodes.
42913bb8906Slm66018 */
43013bb8906Slm66018 /* ARGSUSED */
43113bb8906Slm66018 void
plat_build_mem_nodes(prom_memlist_t * list,size_t nelems)432986fd29aSsetje plat_build_mem_nodes(prom_memlist_t *list, size_t nelems)
43313bb8906Slm66018 {
43413bb8906Slm66018 int slice;
43513bb8906Slm66018 pfn_t basepfn;
43613bb8906Slm66018 pgcnt_t npgs;
43713bb8906Slm66018
43813bb8906Slm66018 mem_node_pfn_shift = PFN_SLICE_SHIFT;
43913bb8906Slm66018 mem_node_physalign = (1ull << PA_SLICE_SHIFT);
44013bb8906Slm66018 npgs = 1ull << PFN_SLICE_SHIFT;
44113bb8906Slm66018
44213bb8906Slm66018 for (slice = 0; slice < DAK_MAX_SLICE; slice++) {
44313bb8906Slm66018 if (slice_to_memnode[slice] == -1)
44413bb8906Slm66018 continue;
44513bb8906Slm66018 basepfn = (uint64_t)slice << PFN_SLICE_SHIFT;
44613bb8906Slm66018 mem_node_add_slice(basepfn, basepfn + npgs - 1);
44713bb8906Slm66018 }
44813bb8906Slm66018 }
44913bb8906Slm66018
45013bb8906Slm66018
45113bb8906Slm66018
45213bb8906Slm66018 /*
45313bb8906Slm66018 * Daktari support for lgroups.
45413bb8906Slm66018 *
45513bb8906Slm66018 * On Daktari, an lgroup platform handle == slot number.
45613bb8906Slm66018 *
45713bb8906Slm66018 * Mappings between lgroup handles and memnodes are managed
45813bb8906Slm66018 * in addition to mappings between memory slices and memnodes
45913bb8906Slm66018 * to support cross-board interleaving as well as multiple
46013bb8906Slm66018 * slices per board (e.g. >1GB DIMMs). The initial mapping
46113bb8906Slm66018 * of memnodes to lgroup handles is determined at boot time.
46213bb8906Slm66018 */
46313bb8906Slm66018 int
plat_pfn_to_mem_node(pfn_t pfn)46413bb8906Slm66018 plat_pfn_to_mem_node(pfn_t pfn)
46513bb8906Slm66018 {
46613bb8906Slm66018 return (slice_to_memnode[PFN_2_SLICE(pfn)]);
46713bb8906Slm66018 }
46813bb8906Slm66018
46913bb8906Slm66018 /*
47013bb8906Slm66018 * Return the platform handle for the lgroup containing the given CPU
47113bb8906Slm66018 *
47213bb8906Slm66018 * For Daktari, lgroup platform handle == slot number
47313bb8906Slm66018 */
47413bb8906Slm66018 lgrp_handle_t
plat_lgrp_cpu_to_hand(processorid_t id)47513bb8906Slm66018 plat_lgrp_cpu_to_hand(processorid_t id)
47613bb8906Slm66018 {
47713bb8906Slm66018 return (DAK_GETSLOT(id));
47813bb8906Slm66018 }
47913bb8906Slm66018
48013bb8906Slm66018 /*
48113bb8906Slm66018 * Platform specific lgroup initialization
48213bb8906Slm66018 */
48313bb8906Slm66018 void
plat_lgrp_init(void)48413bb8906Slm66018 plat_lgrp_init(void)
48513bb8906Slm66018 {
48613bb8906Slm66018 int i;
48713bb8906Slm66018
48813bb8906Slm66018 /*
48913bb8906Slm66018 * Initialize lookup tables to invalid values so we catch
49013bb8906Slm66018 * any illegal use of them.
49113bb8906Slm66018 */
49213bb8906Slm66018 for (i = 0; i < DAK_MAX_SLICE; i++) {
49313bb8906Slm66018 slice_to_memnode[i] = -1;
49413bb8906Slm66018 }
49513bb8906Slm66018 }
49613bb8906Slm66018
49713bb8906Slm66018 /*
49813bb8906Slm66018 * Return latency between "from" and "to" lgroups
49913bb8906Slm66018 *
50013bb8906Slm66018 * This latency number can only be used for relative comparison
50113bb8906Slm66018 * between lgroups on the running system, cannot be used across platforms,
50213bb8906Slm66018 * and may not reflect the actual latency. It is platform and implementation
50313bb8906Slm66018 * specific, so platform gets to decide its value. It would be nice if the
50413bb8906Slm66018 * number was at least proportional to make comparisons more meaningful though.
50513bb8906Slm66018 * NOTE: The numbers below are supposed to be load latencies for uncached
50613bb8906Slm66018 * memory divided by 10.
50713bb8906Slm66018 */
50813bb8906Slm66018 int
plat_lgrp_latency(lgrp_handle_t from,lgrp_handle_t to)50913bb8906Slm66018 plat_lgrp_latency(lgrp_handle_t from, lgrp_handle_t to)
51013bb8906Slm66018 {
51113bb8906Slm66018 /*
51213bb8906Slm66018 * Return min remote latency when there are more than two lgroups
51313bb8906Slm66018 * (root and child) and getting latency between two different lgroups
51413bb8906Slm66018 * or root is involved
51513bb8906Slm66018 */
51613bb8906Slm66018 if (lgrp_optimizations() && (from != to ||
51713bb8906Slm66018 from == LGRP_DEFAULT_HANDLE || to == LGRP_DEFAULT_HANDLE))
51813bb8906Slm66018 return (21);
51913bb8906Slm66018 else
52013bb8906Slm66018 return (19);
52113bb8906Slm66018 }
5227c478bd9Sstevel@tonic-gate /*
5237c478bd9Sstevel@tonic-gate * No platform drivers on this platform
5247c478bd9Sstevel@tonic-gate */
5257c478bd9Sstevel@tonic-gate char *platform_module_list[] = {
5267c478bd9Sstevel@tonic-gate (char *)0
5277c478bd9Sstevel@tonic-gate };
5287c478bd9Sstevel@tonic-gate
5297c478bd9Sstevel@tonic-gate /*ARGSUSED*/
5307c478bd9Sstevel@tonic-gate void
plat_tod_fault(enum tod_fault_type tod_bad)5317c478bd9Sstevel@tonic-gate plat_tod_fault(enum tod_fault_type tod_bad)
5327c478bd9Sstevel@tonic-gate {
5337c478bd9Sstevel@tonic-gate }
5347c478bd9Sstevel@tonic-gate
5357c478bd9Sstevel@tonic-gate /*ARGSUSED*/
5367c478bd9Sstevel@tonic-gate int
plat_get_mem_unum(int synd_code,uint64_t flt_addr,int flt_bus_id,int flt_in_memory,ushort_t flt_status,char * buf,int buflen,int * lenp)5377c478bd9Sstevel@tonic-gate plat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id,
5387c478bd9Sstevel@tonic-gate int flt_in_memory, ushort_t flt_status, char *buf, int buflen, int *lenp)
5397c478bd9Sstevel@tonic-gate {
5407c478bd9Sstevel@tonic-gate if (flt_in_memory && (p2get_mem_unum != NULL))
5417c478bd9Sstevel@tonic-gate return (p2get_mem_unum(synd_code, P2ALIGN(flt_addr, 8),
5427c478bd9Sstevel@tonic-gate buf, buflen, lenp));
5437c478bd9Sstevel@tonic-gate else
5447c478bd9Sstevel@tonic-gate return (ENOTSUP);
5457c478bd9Sstevel@tonic-gate }
5467c478bd9Sstevel@tonic-gate
5477c478bd9Sstevel@tonic-gate /*
5487c478bd9Sstevel@tonic-gate * This platform hook gets called from mc_add_mem_unum_label() in the mc-us3
5497c478bd9Sstevel@tonic-gate * driver giving each platform the opportunity to add platform
5507c478bd9Sstevel@tonic-gate * specific label information to the unum for ECC error logging purposes.
5517c478bd9Sstevel@tonic-gate */
5527c478bd9Sstevel@tonic-gate void
plat_add_mem_unum_label(char * unum,int mcid,int bank,int dimm)5537c478bd9Sstevel@tonic-gate plat_add_mem_unum_label(char *unum, int mcid, int bank, int dimm)
5547c478bd9Sstevel@tonic-gate {
5557c478bd9Sstevel@tonic-gate _NOTE(ARGUNUSED(bank, dimm))
5567c478bd9Sstevel@tonic-gate
5577c478bd9Sstevel@tonic-gate char board = DAK_GETSLOT_LABEL(mcid);
5587c478bd9Sstevel@tonic-gate char old_unum[UNUM_NAMLEN];
5597c478bd9Sstevel@tonic-gate
56007d06da5SSurya Prakki (void) strcpy(old_unum, unum);
56107d06da5SSurya Prakki (void) snprintf(unum, UNUM_NAMLEN, "Slot %c: %s", board, old_unum);
5627c478bd9Sstevel@tonic-gate }
5637c478bd9Sstevel@tonic-gate
5647c478bd9Sstevel@tonic-gate int
plat_get_cpu_unum(int cpuid,char * buf,int buflen,int * lenp)5657c478bd9Sstevel@tonic-gate plat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp)
5667c478bd9Sstevel@tonic-gate {
5677c478bd9Sstevel@tonic-gate char board = DAK_GETSLOT_LABEL(cpuid);
5687c478bd9Sstevel@tonic-gate
5697c478bd9Sstevel@tonic-gate if (snprintf(buf, buflen, "Slot %c", board) >= buflen) {
5707c478bd9Sstevel@tonic-gate return (ENOSPC);
5717c478bd9Sstevel@tonic-gate } else {
5727c478bd9Sstevel@tonic-gate *lenp = strlen(buf);
5737c478bd9Sstevel@tonic-gate return (0);
5747c478bd9Sstevel@tonic-gate }
5757c478bd9Sstevel@tonic-gate }
5767c478bd9Sstevel@tonic-gate
5777c478bd9Sstevel@tonic-gate /*
578*7509ca60SJosef 'Jeff' Sipek * The zuluvm module required a dmv interrupt for each installed
579*7509ca60SJosef 'Jeff' Sipek * Zulu/XVR-4000 board. The following has not been updated during the
580*7509ca60SJosef 'Jeff' Sipek * removal of zuluvm and therefore it may be suboptimal.
5817c478bd9Sstevel@tonic-gate */
5827c478bd9Sstevel@tonic-gate void
plat_dmv_params(uint_t * hwint,uint_t * swint)5837c478bd9Sstevel@tonic-gate plat_dmv_params(uint_t *hwint, uint_t *swint)
5847c478bd9Sstevel@tonic-gate {
5857c478bd9Sstevel@tonic-gate *hwint = 0;
5867c478bd9Sstevel@tonic-gate *swint = DAK_SBD_SLOTS - 1;
5877c478bd9Sstevel@tonic-gate }
588