xref: /illumos-gate/usr/src/uts/sun4u/daktari/ml/daktari_asm.S (revision ddb365bfc9e868ad24ccdcb0dc91af18b10df082)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#include "assym.h"
28
29#include <sys/asm_linkage.h>
30#include <sys/param.h>
31#include <sys/privregs.h>
32#include <sys/machasi.h>
33#include <sys/mmu.h>
34#include <sys/machthread.h>
35#include <sys/pte.h>
36#include <sys/stack.h>
37#include <sys/vis.h>
38#include <sys/param.h>
39#include <sys/errno.h>
40#include <sys/vtrace.h>
41#include <sys/clock.h>
42#include <sys/asi.h>
43#include <sys/fsr.h>
44#include <sys/cheetahregs.h>
45
46!
47! Load the safari address for a specific cpu
48!
49!
50	ENTRY(lddsafaddr)
51#ifndef __sparcv9
52	sllx	%o0, 32, %o0	! shift upper 32 bits
53	srl	%o1, 0, %o1	! clear upper 32 bits
54	or	%o0, %o1, %o0	! form 64 bit physaddr in %o0 using (%o0,%o1)
55#endif
56	rdpr	%pstate, %o4
57	andn	%o4, PSTATE_IE | PSTATE_AM, %o5
58	wrpr	%o5, 0, %pstate	! clear IE, AM bits
59#ifdef __sparcv9
60	ldxa	[%o0]ASI_SAFARI_CONFIG, %o0
61#else
62	ldxa	[%o0]ASI_SAFARI_CONFIG, %g1
63	srlx	%g1, 32, %o0	! put the high 32 bits in low part of o0
64	srl	%g1, 0, %o1	! put lower 32 bits in o1, clear upper 32 bits
65#endif
66	retl
67	wrpr	%g0, %o4, %pstate	! restore earlier pstate register value
68	SET_SIZE(lddsafaddr)
69
70!
71! Load the mc_decode reg for this cpu.
72!
73!
74	ENTRY(lddmcdecode)
75#ifndef __sparcv9
76	sllx	%o0, 32, %o0	! shift upper 32 bits
77	srl	%o1, 0, %o1	! clear upper 32 bits
78	or	%o0, %o1, %o0	! form 64 bit physaddr in %o0 using (%o0,%o1)
79#endif
80	rdpr	%pstate, %o4
81	andn	%o4, PSTATE_IE | PSTATE_AM, %o5
82	wrpr	%o5, 0, %pstate	! clear IE, AM bits
83#ifdef __sparcv9
84	ldxa	[%o0]ASI_MC_DECODE, %o0
85#else
86	ldxa	[%o0]ASI_MC_DECODE, %g1
87	srlx	%g1, 32, %o0	! put the high 32 bits in low part of o0
88	srl	%g1, 0, %o1	! put lower 32 bits in o1, clear upper 32 bits
89#endif
90	retl
91	wrpr	%g0, %o4, %pstate	! restore earlier pstate register value
92	SET_SIZE(lddmcdecode)
93
94