17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 57aadd8d4Skini * Common Development and Distribution License (the "License"). 67aadd8d4Skini * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 2209b1eac2SEvan Yan * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 267c478bd9Sstevel@tonic-gate /* 277c478bd9Sstevel@tonic-gate * PCI Express nexus driver interface 287c478bd9Sstevel@tonic-gate */ 297c478bd9Sstevel@tonic-gate 307c478bd9Sstevel@tonic-gate #include <sys/types.h> 317c478bd9Sstevel@tonic-gate #include <sys/conf.h> /* nulldev */ 327c478bd9Sstevel@tonic-gate #include <sys/stat.h> /* devctl */ 337c478bd9Sstevel@tonic-gate #include <sys/kmem.h> 347c478bd9Sstevel@tonic-gate #include <sys/sunddi.h> 357c478bd9Sstevel@tonic-gate #include <sys/sunndi.h> 367c478bd9Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 377c478bd9Sstevel@tonic-gate #include <sys/ddi_subrdefs.h> 381a887b2eSjchu #include <sys/spl.h> 397c478bd9Sstevel@tonic-gate #include <sys/epm.h> 407c478bd9Sstevel@tonic-gate #include <sys/iommutsb.h> 41b65731f1Skini #include <sys/hotplug/pci/pcihp.h> 42b65731f1Skini #include <sys/hotplug/pci/pciehpc.h> 437c478bd9Sstevel@tonic-gate #include "px_obj.h" 4469cd775fSschwartz #include <sys/pci_tools.h> 45d4476ccbSschwartz #include "px_tools_ext.h" 46d4bc0535SKrishna Elango #include <sys/pcie_pwr.h> 477c478bd9Sstevel@tonic-gate 487c478bd9Sstevel@tonic-gate /*LINTLIBRARY*/ 497c478bd9Sstevel@tonic-gate 507c478bd9Sstevel@tonic-gate /* 517c478bd9Sstevel@tonic-gate * function prototypes for dev ops routines: 527c478bd9Sstevel@tonic-gate */ 537c478bd9Sstevel@tonic-gate static int px_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 547c478bd9Sstevel@tonic-gate static int px_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 557c478bd9Sstevel@tonic-gate static int px_info(dev_info_t *dip, ddi_info_cmd_t infocmd, 567c478bd9Sstevel@tonic-gate void *arg, void **result); 5701689544Sjchu static int px_cb_attach(px_t *); 5801689544Sjchu static void px_cb_detach(px_t *); 597c478bd9Sstevel@tonic-gate static int px_pwr_setup(dev_info_t *dip); 607c478bd9Sstevel@tonic-gate static void px_pwr_teardown(dev_info_t *dip); 617c478bd9Sstevel@tonic-gate 620114761dSAlan Adamson, SD OSSD static void px_set_mps(px_t *px_p); 630114761dSAlan Adamson, SD OSSD 640114761dSAlan Adamson, SD OSSD extern int pcie_max_mps; 650114761dSAlan Adamson, SD OSSD 667c478bd9Sstevel@tonic-gate /* 67b65731f1Skini * function prototypes for hotplug routines: 68b65731f1Skini */ 69055d7c80Scarlsonj static int px_init_hotplug(px_t *px_p); 70055d7c80Scarlsonj static int px_uninit_hotplug(dev_info_t *dip); 71b65731f1Skini 72b65731f1Skini /* 737c478bd9Sstevel@tonic-gate * bus ops and dev ops structures: 747c478bd9Sstevel@tonic-gate */ 757c478bd9Sstevel@tonic-gate static struct bus_ops px_bus_ops = { 767c478bd9Sstevel@tonic-gate BUSO_REV, 777c478bd9Sstevel@tonic-gate px_map, 787c478bd9Sstevel@tonic-gate 0, 797c478bd9Sstevel@tonic-gate 0, 807c478bd9Sstevel@tonic-gate 0, 817c478bd9Sstevel@tonic-gate i_ddi_map_fault, 827c478bd9Sstevel@tonic-gate px_dma_setup, 837c478bd9Sstevel@tonic-gate px_dma_allochdl, 847c478bd9Sstevel@tonic-gate px_dma_freehdl, 857c478bd9Sstevel@tonic-gate px_dma_bindhdl, 867c478bd9Sstevel@tonic-gate px_dma_unbindhdl, 877c478bd9Sstevel@tonic-gate px_lib_dma_sync, 887c478bd9Sstevel@tonic-gate px_dma_win, 897c478bd9Sstevel@tonic-gate px_dma_ctlops, 907c478bd9Sstevel@tonic-gate px_ctlops, 917c478bd9Sstevel@tonic-gate ddi_bus_prop_op, 927c478bd9Sstevel@tonic-gate ndi_busop_get_eventcookie, 937c478bd9Sstevel@tonic-gate ndi_busop_add_eventcall, 947c478bd9Sstevel@tonic-gate ndi_busop_remove_eventcall, 957c478bd9Sstevel@tonic-gate ndi_post_event, 967c478bd9Sstevel@tonic-gate NULL, 977c478bd9Sstevel@tonic-gate NULL, /* (*bus_config)(); */ 987c478bd9Sstevel@tonic-gate NULL, /* (*bus_unconfig)(); */ 997c478bd9Sstevel@tonic-gate px_fm_init_child, /* (*bus_fm_init)(); */ 1007c478bd9Sstevel@tonic-gate NULL, /* (*bus_fm_fini)(); */ 101f8d2de6bSjchu px_bus_enter, /* (*bus_fm_access_enter)(); */ 102f8d2de6bSjchu px_bus_exit, /* (*bus_fm_access_fini)(); */ 1037c478bd9Sstevel@tonic-gate pcie_bus_power, /* (*bus_power)(); */ 1047c478bd9Sstevel@tonic-gate px_intr_ops /* (*bus_intr_op)(); */ 1057c478bd9Sstevel@tonic-gate }; 1067c478bd9Sstevel@tonic-gate 1077c478bd9Sstevel@tonic-gate extern struct cb_ops px_cb_ops; 1087c478bd9Sstevel@tonic-gate 1097c478bd9Sstevel@tonic-gate static struct dev_ops px_ops = { 1107c478bd9Sstevel@tonic-gate DEVO_REV, 1117c478bd9Sstevel@tonic-gate 0, 1127c478bd9Sstevel@tonic-gate px_info, 1137c478bd9Sstevel@tonic-gate nulldev, 1147c478bd9Sstevel@tonic-gate 0, 1157c478bd9Sstevel@tonic-gate px_attach, 1167c478bd9Sstevel@tonic-gate px_detach, 1177c478bd9Sstevel@tonic-gate nodev, 1187c478bd9Sstevel@tonic-gate &px_cb_ops, 1197c478bd9Sstevel@tonic-gate &px_bus_ops, 12019397407SSherry Moore nulldev, 12119397407SSherry Moore ddi_quiesce_not_needed, /* quiesce */ 1227c478bd9Sstevel@tonic-gate }; 1237c478bd9Sstevel@tonic-gate 1247c478bd9Sstevel@tonic-gate /* 1257c478bd9Sstevel@tonic-gate * module definitions: 1267c478bd9Sstevel@tonic-gate */ 1277c478bd9Sstevel@tonic-gate #include <sys/modctl.h> 1287c478bd9Sstevel@tonic-gate extern struct mod_ops mod_driverops; 1297c478bd9Sstevel@tonic-gate 1307c478bd9Sstevel@tonic-gate static struct modldrv modldrv = { 1317c478bd9Sstevel@tonic-gate &mod_driverops, /* Type of module - driver */ 1320114761dSAlan Adamson, SD OSSD "PCI Express nexus driver", /* Name of module. */ 1337c478bd9Sstevel@tonic-gate &px_ops, /* driver ops */ 1347c478bd9Sstevel@tonic-gate }; 1357c478bd9Sstevel@tonic-gate 1367c478bd9Sstevel@tonic-gate static struct modlinkage modlinkage = { 1377c478bd9Sstevel@tonic-gate MODREV_1, (void *)&modldrv, NULL 1387c478bd9Sstevel@tonic-gate }; 1397c478bd9Sstevel@tonic-gate 1407c478bd9Sstevel@tonic-gate /* driver soft state */ 1417c478bd9Sstevel@tonic-gate void *px_state_p; 1427c478bd9Sstevel@tonic-gate 1437c478bd9Sstevel@tonic-gate int 1447c478bd9Sstevel@tonic-gate _init(void) 1457c478bd9Sstevel@tonic-gate { 1467c478bd9Sstevel@tonic-gate int e; 1477c478bd9Sstevel@tonic-gate 1487c478bd9Sstevel@tonic-gate /* 1497c478bd9Sstevel@tonic-gate * Initialize per-px bus soft state pointer. 1507c478bd9Sstevel@tonic-gate */ 1517c478bd9Sstevel@tonic-gate e = ddi_soft_state_init(&px_state_p, sizeof (px_t), 1); 1527c478bd9Sstevel@tonic-gate if (e != DDI_SUCCESS) 1537c478bd9Sstevel@tonic-gate return (e); 1547c478bd9Sstevel@tonic-gate 1557c478bd9Sstevel@tonic-gate /* 1567c478bd9Sstevel@tonic-gate * Install the module. 1577c478bd9Sstevel@tonic-gate */ 1587c478bd9Sstevel@tonic-gate e = mod_install(&modlinkage); 1597c478bd9Sstevel@tonic-gate if (e != DDI_SUCCESS) 1607c478bd9Sstevel@tonic-gate ddi_soft_state_fini(&px_state_p); 1617c478bd9Sstevel@tonic-gate return (e); 1627c478bd9Sstevel@tonic-gate } 1637c478bd9Sstevel@tonic-gate 1647c478bd9Sstevel@tonic-gate int 1657c478bd9Sstevel@tonic-gate _fini(void) 1667c478bd9Sstevel@tonic-gate { 1677c478bd9Sstevel@tonic-gate int e; 1687c478bd9Sstevel@tonic-gate 1697c478bd9Sstevel@tonic-gate /* 1707c478bd9Sstevel@tonic-gate * Remove the module. 1717c478bd9Sstevel@tonic-gate */ 1727c478bd9Sstevel@tonic-gate e = mod_remove(&modlinkage); 1737c478bd9Sstevel@tonic-gate if (e != DDI_SUCCESS) 1747c478bd9Sstevel@tonic-gate return (e); 1757c478bd9Sstevel@tonic-gate 1767c478bd9Sstevel@tonic-gate /* Free px soft state */ 1777c478bd9Sstevel@tonic-gate ddi_soft_state_fini(&px_state_p); 1787c478bd9Sstevel@tonic-gate 1797c478bd9Sstevel@tonic-gate return (e); 1807c478bd9Sstevel@tonic-gate } 1817c478bd9Sstevel@tonic-gate 1827c478bd9Sstevel@tonic-gate int 1837c478bd9Sstevel@tonic-gate _info(struct modinfo *modinfop) 1847c478bd9Sstevel@tonic-gate { 1857c478bd9Sstevel@tonic-gate return (mod_info(&modlinkage, modinfop)); 1867c478bd9Sstevel@tonic-gate } 1877c478bd9Sstevel@tonic-gate 1887c478bd9Sstevel@tonic-gate /* ARGSUSED */ 1897c478bd9Sstevel@tonic-gate static int 1907c478bd9Sstevel@tonic-gate px_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result) 1917c478bd9Sstevel@tonic-gate { 1927c478bd9Sstevel@tonic-gate int instance = getminor((dev_t)arg); 1937c478bd9Sstevel@tonic-gate px_t *px_p = INST_TO_STATE(instance); 1947c478bd9Sstevel@tonic-gate 1957c478bd9Sstevel@tonic-gate /* 1967c478bd9Sstevel@tonic-gate * Allow hotplug to deal with ones it manages 1977c478bd9Sstevel@tonic-gate * Hot Plug will be done later. 1987c478bd9Sstevel@tonic-gate */ 199b65731f1Skini if (px_p && (px_p->px_dev_caps & PX_HOTPLUG_CAPABLE)) 2007c478bd9Sstevel@tonic-gate return (pcihp_info(dip, infocmd, arg, result)); 2017c478bd9Sstevel@tonic-gate 2027c478bd9Sstevel@tonic-gate /* non-hotplug or not attached */ 2037c478bd9Sstevel@tonic-gate switch (infocmd) { 2047c478bd9Sstevel@tonic-gate case DDI_INFO_DEVT2INSTANCE: 205b40cec45Skrishnae *result = (void *)(intptr_t)instance; 2067c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 2077c478bd9Sstevel@tonic-gate 2087c478bd9Sstevel@tonic-gate case DDI_INFO_DEVT2DEVINFO: 2097c478bd9Sstevel@tonic-gate if (px_p == NULL) 2107c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 2117c478bd9Sstevel@tonic-gate *result = (void *)px_p->px_dip; 2127c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 2137c478bd9Sstevel@tonic-gate 2147c478bd9Sstevel@tonic-gate default: 2157c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 2167c478bd9Sstevel@tonic-gate } 2177c478bd9Sstevel@tonic-gate } 2187c478bd9Sstevel@tonic-gate 2197c478bd9Sstevel@tonic-gate /* device driver entry points */ 2207c478bd9Sstevel@tonic-gate /* 2217c478bd9Sstevel@tonic-gate * attach entry point: 2227c478bd9Sstevel@tonic-gate */ 2237c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 2247c478bd9Sstevel@tonic-gate static int 2257c478bd9Sstevel@tonic-gate px_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 2267c478bd9Sstevel@tonic-gate { 2277c478bd9Sstevel@tonic-gate px_t *px_p; /* per bus state pointer */ 2287c478bd9Sstevel@tonic-gate int instance = DIP_TO_INST(dip); 2297c478bd9Sstevel@tonic-gate int ret = DDI_SUCCESS; 2307c478bd9Sstevel@tonic-gate devhandle_t dev_hdl = NULL; 2317c478bd9Sstevel@tonic-gate 2327c478bd9Sstevel@tonic-gate switch (cmd) { 2337c478bd9Sstevel@tonic-gate case DDI_ATTACH: 2347c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "DDI_ATTACH\n"); 2357c478bd9Sstevel@tonic-gate 2367c478bd9Sstevel@tonic-gate /* 2377c478bd9Sstevel@tonic-gate * Allocate and get the per-px soft state structure. 2387c478bd9Sstevel@tonic-gate */ 2397c478bd9Sstevel@tonic-gate if (ddi_soft_state_zalloc(px_state_p, instance) 2407c478bd9Sstevel@tonic-gate != DDI_SUCCESS) { 2417c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d: can't allocate px state", 2427c478bd9Sstevel@tonic-gate ddi_driver_name(dip), instance); 2437c478bd9Sstevel@tonic-gate goto err_bad_px_softstate; 2447c478bd9Sstevel@tonic-gate } 2457c478bd9Sstevel@tonic-gate px_p = INST_TO_STATE(instance); 2467c478bd9Sstevel@tonic-gate px_p->px_dip = dip; 2477c478bd9Sstevel@tonic-gate mutex_init(&px_p->px_mutex, NULL, MUTEX_DRIVER, NULL); 2487c478bd9Sstevel@tonic-gate px_p->px_soft_state = PX_SOFT_STATE_CLOSED; 2497c478bd9Sstevel@tonic-gate px_p->px_open_count = 0; 2507c478bd9Sstevel@tonic-gate 251b65731f1Skini (void) ddi_prop_update_string(DDI_DEV_T_NONE, dip, 252b65731f1Skini "device_type", "pciex"); 253bf8fc234Set142600 254bf8fc234Set142600 /* Initialize px_dbg for high pil printing */ 255bf8fc234Set142600 px_dbg_attach(dip, &px_p->px_dbg_hdl); 256bf8fc234Set142600 2577c478bd9Sstevel@tonic-gate /* 2587c478bd9Sstevel@tonic-gate * Get key properties of the pci bridge node and 2597c478bd9Sstevel@tonic-gate * determine it's type (psycho, schizo, etc ...). 2607c478bd9Sstevel@tonic-gate */ 2617c478bd9Sstevel@tonic-gate if (px_get_props(px_p, dip) == DDI_FAILURE) 2627c478bd9Sstevel@tonic-gate goto err_bad_px_prop; 2637c478bd9Sstevel@tonic-gate 2647c478bd9Sstevel@tonic-gate if (px_lib_dev_init(dip, &dev_hdl) != DDI_SUCCESS) 2657c478bd9Sstevel@tonic-gate goto err_bad_dev_init; 2667c478bd9Sstevel@tonic-gate 26720036fe5Segillett /* Initialize device handle */ 2687c478bd9Sstevel@tonic-gate px_p->px_dev_hdl = dev_hdl; 2697c478bd9Sstevel@tonic-gate 2707ea9b230Set142600 /* Cache the BDF of the root port nexus */ 2717ea9b230Set142600 px_p->px_bdf = px_lib_get_bdf(px_p); 2727ea9b230Set142600 2737c478bd9Sstevel@tonic-gate /* 2747c478bd9Sstevel@tonic-gate * Initialize interrupt block. Note that this 2757c478bd9Sstevel@tonic-gate * initialize error handling for the PEC as well. 2767c478bd9Sstevel@tonic-gate */ 2777c478bd9Sstevel@tonic-gate if ((ret = px_ib_attach(px_p)) != DDI_SUCCESS) 2787c478bd9Sstevel@tonic-gate goto err_bad_ib; 2797c478bd9Sstevel@tonic-gate 2807c478bd9Sstevel@tonic-gate if (px_cb_attach(px_p) != DDI_SUCCESS) 2817c478bd9Sstevel@tonic-gate goto err_bad_cb; 2827c478bd9Sstevel@tonic-gate 2837c478bd9Sstevel@tonic-gate /* 2847c478bd9Sstevel@tonic-gate * Start creating the modules. 2857c478bd9Sstevel@tonic-gate * Note that attach() routines should 2867c478bd9Sstevel@tonic-gate * register and enable their own interrupts. 2877c478bd9Sstevel@tonic-gate */ 2887c478bd9Sstevel@tonic-gate 2897c478bd9Sstevel@tonic-gate if ((px_mmu_attach(px_p)) != DDI_SUCCESS) 2907c478bd9Sstevel@tonic-gate goto err_bad_mmu; 2917c478bd9Sstevel@tonic-gate 2927c478bd9Sstevel@tonic-gate if ((px_msiq_attach(px_p)) != DDI_SUCCESS) 2937c478bd9Sstevel@tonic-gate goto err_bad_msiq; 2947c478bd9Sstevel@tonic-gate 2957c478bd9Sstevel@tonic-gate if ((px_msi_attach(px_p)) != DDI_SUCCESS) 2967c478bd9Sstevel@tonic-gate goto err_bad_msi; 2977c478bd9Sstevel@tonic-gate 2987c478bd9Sstevel@tonic-gate if ((px_pec_attach(px_p)) != DDI_SUCCESS) 2997c478bd9Sstevel@tonic-gate goto err_bad_pec; 3007c478bd9Sstevel@tonic-gate 3017c478bd9Sstevel@tonic-gate if ((px_dma_attach(px_p)) != DDI_SUCCESS) 3029c81f298Sjchu goto err_bad_dma; /* nothing to uninitialize on DMA */ 3037c478bd9Sstevel@tonic-gate 3043c4226f9Spjha if ((px_fm_attach(px_p)) != DDI_SUCCESS) 3053c4226f9Spjha goto err_bad_dma; 3063c4226f9Spjha 3077c478bd9Sstevel@tonic-gate /* 3087c478bd9Sstevel@tonic-gate * All of the error handlers have been registered 3097c478bd9Sstevel@tonic-gate * by now so it's time to activate the interrupt. 3107c478bd9Sstevel@tonic-gate */ 311f8d2de6bSjchu if ((ret = px_err_add_intr(&px_p->px_fault)) != DDI_SUCCESS) 3123c4226f9Spjha goto err_bad_intr; 3137c478bd9Sstevel@tonic-gate 314b65731f1Skini (void) px_init_hotplug(px_p); 315b65731f1Skini 3160114761dSAlan Adamson, SD OSSD (void) px_set_mps(px_p); 3170114761dSAlan Adamson, SD OSSD 3187c478bd9Sstevel@tonic-gate /* 3197c478bd9Sstevel@tonic-gate * Create the "devctl" node for hotplug and pcitool support. 3207c478bd9Sstevel@tonic-gate * For non-hotplug bus, we still need ":devctl" to 3217c478bd9Sstevel@tonic-gate * support DEVCTL_DEVICE_* and DEVCTL_BUS_* ioctls. 3227c478bd9Sstevel@tonic-gate */ 3237c478bd9Sstevel@tonic-gate if (ddi_create_minor_node(dip, "devctl", S_IFCHR, 3247c478bd9Sstevel@tonic-gate PCIHP_AP_MINOR_NUM(instance, PCIHP_DEVCTL_MINOR), 3257c478bd9Sstevel@tonic-gate DDI_NT_NEXUS, 0) != DDI_SUCCESS) { 3267c478bd9Sstevel@tonic-gate goto err_bad_devctl_node; 3277c478bd9Sstevel@tonic-gate } 32869cd775fSschwartz 32969cd775fSschwartz if (pxtool_init(dip) != DDI_SUCCESS) 33069cd775fSschwartz goto err_bad_pcitool_node; 33169cd775fSschwartz 3327c478bd9Sstevel@tonic-gate /* 3337c478bd9Sstevel@tonic-gate * power management setup. Even if it fails, attach will 3347c478bd9Sstevel@tonic-gate * succeed as this is a optional feature. Since we are 3357c478bd9Sstevel@tonic-gate * always at full power, this is not critical. 3367c478bd9Sstevel@tonic-gate */ 3377c478bd9Sstevel@tonic-gate if (pwr_common_setup(dip) != DDI_SUCCESS) { 3387c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "pwr_common_setup failed\n"); 3397c478bd9Sstevel@tonic-gate } else if (px_pwr_setup(dip) != DDI_SUCCESS) { 3407c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "px_pwr_setup failed \n"); 3417c478bd9Sstevel@tonic-gate pwr_common_teardown(dip); 3427c478bd9Sstevel@tonic-gate } 3437c478bd9Sstevel@tonic-gate 344817a6df8Sjchu /* 345817a6df8Sjchu * add cpr callback 346817a6df8Sjchu */ 347817a6df8Sjchu px_cpr_add_callb(px_p); 348817a6df8Sjchu 3497c478bd9Sstevel@tonic-gate ddi_report_dev(dip); 3507c478bd9Sstevel@tonic-gate 3517c478bd9Sstevel@tonic-gate px_p->px_state = PX_ATTACHED; 3527c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "attach success\n"); 3537c478bd9Sstevel@tonic-gate break; 3547c478bd9Sstevel@tonic-gate 35569cd775fSschwartz err_bad_pcitool_node: 35669cd775fSschwartz ddi_remove_minor_node(dip, "devctl"); 3577c478bd9Sstevel@tonic-gate err_bad_devctl_node: 358f8d2de6bSjchu px_err_rem_intr(&px_p->px_fault); 3593c4226f9Spjha err_bad_intr: 3603c4226f9Spjha px_fm_detach(px_p); 3619c81f298Sjchu err_bad_dma: 3627c478bd9Sstevel@tonic-gate px_pec_detach(px_p); 3637c478bd9Sstevel@tonic-gate err_bad_pec: 3647c478bd9Sstevel@tonic-gate px_msi_detach(px_p); 3657c478bd9Sstevel@tonic-gate err_bad_msi: 3667c478bd9Sstevel@tonic-gate px_msiq_detach(px_p); 3677c478bd9Sstevel@tonic-gate err_bad_msiq: 3687c478bd9Sstevel@tonic-gate px_mmu_detach(px_p); 3697c478bd9Sstevel@tonic-gate err_bad_mmu: 3707c478bd9Sstevel@tonic-gate px_cb_detach(px_p); 3717c478bd9Sstevel@tonic-gate err_bad_cb: 3727c478bd9Sstevel@tonic-gate px_ib_detach(px_p); 3737c478bd9Sstevel@tonic-gate err_bad_ib: 374d8d130aeSanbui if (px_lib_dev_fini(dip) != DDI_SUCCESS) { 375d8d130aeSanbui DBG(DBG_ATTACH, dip, "px_lib_dev_fini failed\n"); 376d8d130aeSanbui } 3777c478bd9Sstevel@tonic-gate err_bad_dev_init: 3787c478bd9Sstevel@tonic-gate px_free_props(px_p); 3797c478bd9Sstevel@tonic-gate err_bad_px_prop: 380bf8fc234Set142600 px_dbg_detach(dip, &px_p->px_dbg_hdl); 3817c478bd9Sstevel@tonic-gate mutex_destroy(&px_p->px_mutex); 3827c478bd9Sstevel@tonic-gate ddi_soft_state_free(px_state_p, instance); 3837c478bd9Sstevel@tonic-gate err_bad_px_softstate: 3847c478bd9Sstevel@tonic-gate ret = DDI_FAILURE; 3857c478bd9Sstevel@tonic-gate break; 3867c478bd9Sstevel@tonic-gate 3877c478bd9Sstevel@tonic-gate case DDI_RESUME: 3887c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "DDI_RESUME\n"); 3897c478bd9Sstevel@tonic-gate 3907c478bd9Sstevel@tonic-gate px_p = INST_TO_STATE(instance); 3917c478bd9Sstevel@tonic-gate 3927c478bd9Sstevel@tonic-gate mutex_enter(&px_p->px_mutex); 3937c478bd9Sstevel@tonic-gate 3947c478bd9Sstevel@tonic-gate /* suspend might have not succeeded */ 3957c478bd9Sstevel@tonic-gate if (px_p->px_state != PX_SUSPENDED) { 3967c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, px_p->px_dip, 3977c478bd9Sstevel@tonic-gate "instance NOT suspended\n"); 3987c478bd9Sstevel@tonic-gate ret = DDI_FAILURE; 3997c478bd9Sstevel@tonic-gate break; 4007c478bd9Sstevel@tonic-gate } 4017c478bd9Sstevel@tonic-gate 402023ccc1eSegillett px_msiq_resume(px_p); 4037c478bd9Sstevel@tonic-gate px_lib_resume(dip); 4047c478bd9Sstevel@tonic-gate (void) pcie_pwr_resume(dip); 4057c478bd9Sstevel@tonic-gate px_p->px_state = PX_ATTACHED; 4067c478bd9Sstevel@tonic-gate 4077c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4087c478bd9Sstevel@tonic-gate 4097c478bd9Sstevel@tonic-gate break; 4107c478bd9Sstevel@tonic-gate default: 4117c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "unsupported attach op\n"); 4127c478bd9Sstevel@tonic-gate ret = DDI_FAILURE; 4137c478bd9Sstevel@tonic-gate break; 4147c478bd9Sstevel@tonic-gate } 4157c478bd9Sstevel@tonic-gate 4167c478bd9Sstevel@tonic-gate return (ret); 4177c478bd9Sstevel@tonic-gate } 4187c478bd9Sstevel@tonic-gate 4197c478bd9Sstevel@tonic-gate /* 4207c478bd9Sstevel@tonic-gate * detach entry point: 4217c478bd9Sstevel@tonic-gate */ 4227c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 4237c478bd9Sstevel@tonic-gate static int 4247c478bd9Sstevel@tonic-gate px_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 4257c478bd9Sstevel@tonic-gate { 4267c478bd9Sstevel@tonic-gate int instance = ddi_get_instance(dip); 4277c478bd9Sstevel@tonic-gate px_t *px_p = INST_TO_STATE(instance); 4287c478bd9Sstevel@tonic-gate int ret; 4297c478bd9Sstevel@tonic-gate 4307c478bd9Sstevel@tonic-gate /* 4317c478bd9Sstevel@tonic-gate * Make sure we are currently attached 4327c478bd9Sstevel@tonic-gate */ 4337c478bd9Sstevel@tonic-gate if (px_p->px_state != PX_ATTACHED) { 43401689544Sjchu DBG(DBG_DETACH, dip, "Instance not attached\n"); 4357c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 4367c478bd9Sstevel@tonic-gate } 4377c478bd9Sstevel@tonic-gate 4387c478bd9Sstevel@tonic-gate mutex_enter(&px_p->px_mutex); 4397c478bd9Sstevel@tonic-gate 4407c478bd9Sstevel@tonic-gate switch (cmd) { 4417c478bd9Sstevel@tonic-gate case DDI_DETACH: 4427c478bd9Sstevel@tonic-gate DBG(DBG_DETACH, dip, "DDI_DETACH\n"); 4437c478bd9Sstevel@tonic-gate 444817a6df8Sjchu /* 445817a6df8Sjchu * remove cpr callback 446817a6df8Sjchu */ 447817a6df8Sjchu px_cpr_rem_callb(px_p); 448817a6df8Sjchu 449b65731f1Skini if (px_p->px_dev_caps & PX_HOTPLUG_CAPABLE) 450b65731f1Skini if (px_uninit_hotplug(dip) != DDI_SUCCESS) { 4517c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4527c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 4537c478bd9Sstevel@tonic-gate } 4547c478bd9Sstevel@tonic-gate 4557c478bd9Sstevel@tonic-gate /* 4567c478bd9Sstevel@tonic-gate * things which used to be done in obj_destroy 4577c478bd9Sstevel@tonic-gate * are now in-lined here. 4587c478bd9Sstevel@tonic-gate */ 4597c478bd9Sstevel@tonic-gate 4607c478bd9Sstevel@tonic-gate px_p->px_state = PX_DETACHED; 4617c478bd9Sstevel@tonic-gate 46269cd775fSschwartz pxtool_uninit(dip); 46369cd775fSschwartz 4647c478bd9Sstevel@tonic-gate ddi_remove_minor_node(dip, "devctl"); 465f8d2de6bSjchu px_err_rem_intr(&px_p->px_fault); 4663c4226f9Spjha px_fm_detach(px_p); 4677c478bd9Sstevel@tonic-gate px_pec_detach(px_p); 4689c75c6bfSgovinda px_pwr_teardown(dip); 4699c75c6bfSgovinda pwr_common_teardown(dip); 4707c478bd9Sstevel@tonic-gate px_msi_detach(px_p); 4717c478bd9Sstevel@tonic-gate px_msiq_detach(px_p); 4727c478bd9Sstevel@tonic-gate px_mmu_detach(px_p); 4737c478bd9Sstevel@tonic-gate px_cb_detach(px_p); 4747c478bd9Sstevel@tonic-gate px_ib_detach(px_p); 475d8d130aeSanbui if (px_lib_dev_fini(dip) != DDI_SUCCESS) { 476d8d130aeSanbui DBG(DBG_DETACH, dip, "px_lib_dev_fini failed\n"); 477d8d130aeSanbui } 4787c478bd9Sstevel@tonic-gate 4797c478bd9Sstevel@tonic-gate /* 4807c478bd9Sstevel@tonic-gate * Free the px soft state structure and the rest of the 4817c478bd9Sstevel@tonic-gate * resources it's using. 4827c478bd9Sstevel@tonic-gate */ 4837c478bd9Sstevel@tonic-gate px_free_props(px_p); 484bf8fc234Set142600 px_dbg_detach(dip, &px_p->px_dbg_hdl); 4857c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4867c478bd9Sstevel@tonic-gate mutex_destroy(&px_p->px_mutex); 4877c478bd9Sstevel@tonic-gate 488eae2e508Skrishnae /* Free the interrupt-priorities prop if we created it. */ 489eae2e508Skrishnae { 4907c478bd9Sstevel@tonic-gate int len; 4917c478bd9Sstevel@tonic-gate 4927c478bd9Sstevel@tonic-gate if (ddi_getproplen(DDI_DEV_T_ANY, dip, 4937c478bd9Sstevel@tonic-gate DDI_PROP_NOTPROM | DDI_PROP_DONTPASS, 4947c478bd9Sstevel@tonic-gate "interrupt-priorities", &len) == DDI_PROP_SUCCESS) 4957c478bd9Sstevel@tonic-gate (void) ddi_prop_remove(DDI_DEV_T_NONE, dip, 4967c478bd9Sstevel@tonic-gate "interrupt-priorities"); 4977c478bd9Sstevel@tonic-gate } 4987c478bd9Sstevel@tonic-gate 4997c478bd9Sstevel@tonic-gate px_p->px_dev_hdl = NULL; 500dabea0dbSschwartz ddi_soft_state_free(px_state_p, instance); 5017c478bd9Sstevel@tonic-gate 5027c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 5037c478bd9Sstevel@tonic-gate 5047c478bd9Sstevel@tonic-gate case DDI_SUSPEND: 5057c478bd9Sstevel@tonic-gate if (pcie_pwr_suspend(dip) != DDI_SUCCESS) { 5067c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 5077c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 5087c478bd9Sstevel@tonic-gate } 5097c478bd9Sstevel@tonic-gate if ((ret = px_lib_suspend(dip)) == DDI_SUCCESS) 5107c478bd9Sstevel@tonic-gate px_p->px_state = PX_SUSPENDED; 5117c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 5127c478bd9Sstevel@tonic-gate 5137c478bd9Sstevel@tonic-gate return (ret); 5147c478bd9Sstevel@tonic-gate 5157c478bd9Sstevel@tonic-gate default: 5167c478bd9Sstevel@tonic-gate DBG(DBG_DETACH, dip, "unsupported detach op\n"); 5177c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 5187c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 5197c478bd9Sstevel@tonic-gate } 5207c478bd9Sstevel@tonic-gate } 5217c478bd9Sstevel@tonic-gate 52201689544Sjchu int 52301689544Sjchu px_cb_attach(px_t *px_p) 52401689544Sjchu { 52501689544Sjchu px_fault_t *fault_p = &px_p->px_cb_fault; 52601689544Sjchu dev_info_t *dip = px_p->px_dip; 52701689544Sjchu sysino_t sysino; 52801689544Sjchu 52901689544Sjchu if (px_lib_intr_devino_to_sysino(dip, 53001689544Sjchu px_p->px_inos[PX_INTR_XBC], &sysino) != DDI_SUCCESS) 53101689544Sjchu return (DDI_FAILURE); 53201689544Sjchu 53301689544Sjchu fault_p->px_fh_dip = dip; 53401689544Sjchu fault_p->px_fh_sysino = sysino; 53501689544Sjchu fault_p->px_err_func = px_err_cb_intr; 53601689544Sjchu fault_p->px_intr_ino = px_p->px_inos[PX_INTR_XBC]; 53701689544Sjchu 53801689544Sjchu return (px_cb_add_intr(fault_p)); 53901689544Sjchu } 54001689544Sjchu 54101689544Sjchu void 54201689544Sjchu px_cb_detach(px_t *px_p) 54301689544Sjchu { 54401689544Sjchu px_cb_rem_intr(&px_p->px_cb_fault); 54501689544Sjchu } 54601689544Sjchu 5477c478bd9Sstevel@tonic-gate /* 5487c478bd9Sstevel@tonic-gate * power management related initialization specific to px 5497c478bd9Sstevel@tonic-gate * called by px_attach() 5507c478bd9Sstevel@tonic-gate */ 5517c478bd9Sstevel@tonic-gate static int 5527c478bd9Sstevel@tonic-gate px_pwr_setup(dev_info_t *dip) 5537c478bd9Sstevel@tonic-gate { 5547c478bd9Sstevel@tonic-gate pcie_pwr_t *pwr_p; 5551a887b2eSjchu int instance = ddi_get_instance(dip); 5561a887b2eSjchu px_t *px_p = INST_TO_STATE(instance); 5577c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t hdl; 5587c478bd9Sstevel@tonic-gate 5597c478bd9Sstevel@tonic-gate ASSERT(PCIE_PMINFO(dip)); 5607c478bd9Sstevel@tonic-gate pwr_p = PCIE_NEXUS_PMINFO(dip); 5617c478bd9Sstevel@tonic-gate ASSERT(pwr_p); 5627c478bd9Sstevel@tonic-gate 5637c478bd9Sstevel@tonic-gate /* 5647c478bd9Sstevel@tonic-gate * indicate support LDI (Layered Driver Interface) 5657c478bd9Sstevel@tonic-gate * Create the property, if it is not already there 5667c478bd9Sstevel@tonic-gate */ 5677c478bd9Sstevel@tonic-gate if (!ddi_prop_exists(DDI_DEV_T_NONE, dip, DDI_PROP_DONTPASS, 5687c478bd9Sstevel@tonic-gate DDI_KERNEL_IOCTL)) { 5697c478bd9Sstevel@tonic-gate if (ddi_prop_create(DDI_DEV_T_NONE, dip, DDI_PROP_CANSLEEP, 5707c478bd9Sstevel@tonic-gate DDI_KERNEL_IOCTL, NULL, 0) != DDI_PROP_SUCCESS) { 5717c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "can't create kernel ioctl prop\n"); 5727c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 5737c478bd9Sstevel@tonic-gate } 5747c478bd9Sstevel@tonic-gate } 5757c478bd9Sstevel@tonic-gate /* No support for device PM. We are always at full power */ 5767c478bd9Sstevel@tonic-gate pwr_p->pwr_func_lvl = PM_LEVEL_D0; 5777c478bd9Sstevel@tonic-gate 5781a887b2eSjchu mutex_init(&px_p->px_l23ready_lock, NULL, MUTEX_DRIVER, 579a195726fSgovinda DDI_INTR_PRI(px_pwr_pil)); 5801a887b2eSjchu cv_init(&px_p->px_l23ready_cv, NULL, CV_DRIVER, NULL); 5811a887b2eSjchu 58220036fe5Segillett /* Initialize handle */ 58320036fe5Segillett bzero(&hdl, sizeof (ddi_intr_handle_impl_t)); 5841a887b2eSjchu hdl.ih_cb_arg1 = px_p; 5857c478bd9Sstevel@tonic-gate hdl.ih_ver = DDI_INTR_VERSION; 5867c478bd9Sstevel@tonic-gate hdl.ih_state = DDI_IHDL_STATE_ALLOC; 5877c478bd9Sstevel@tonic-gate hdl.ih_dip = dip; 5887c478bd9Sstevel@tonic-gate hdl.ih_pri = px_pwr_pil; 5897c478bd9Sstevel@tonic-gate 5907c478bd9Sstevel@tonic-gate /* Add PME_TO_ACK message handler */ 5911a887b2eSjchu hdl.ih_cb_func = (ddi_intr_handler_t *)px_pmeq_intr; 5927c478bd9Sstevel@tonic-gate if (px_add_msiq_intr(dip, dip, &hdl, MSG_REC, 59309b1eac2SEvan Yan (msgcode_t)PCIE_PME_ACK_MSG, -1, 59409b1eac2SEvan Yan &px_p->px_pm_msiq_id) != DDI_SUCCESS) { 5951a887b2eSjchu DBG(DBG_PWR, dip, "px_pwr_setup: couldn't add " 5961a887b2eSjchu " PME_TO_ACK intr\n"); 597f9721e07Sjchu goto pwr_setup_err1; 5987c478bd9Sstevel@tonic-gate } 5991a887b2eSjchu px_lib_msg_setmsiq(dip, PCIE_PME_ACK_MSG, px_p->px_pm_msiq_id); 6007c478bd9Sstevel@tonic-gate px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_VALID); 6017c478bd9Sstevel@tonic-gate 60236fe4a92Segillett if (px_ib_update_intr_state(px_p, px_p->px_dip, hdl.ih_inum, 603b0fc0e77Sgovinda px_msiqid_to_devino(px_p, px_p->px_pm_msiq_id), px_pwr_pil, 60436fe4a92Segillett PX_INTR_STATE_ENABLE, MSG_REC, PCIE_PME_ACK_MSG) != DDI_SUCCESS) { 60536fe4a92Segillett DBG(DBG_PWR, dip, "px_pwr_setup: PME_TO_ACK update interrupt" 60636fe4a92Segillett " state failed\n"); 60736fe4a92Segillett goto px_pwrsetup_err_state; 60836fe4a92Segillett } 60936fe4a92Segillett 6107c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 6117c478bd9Sstevel@tonic-gate 61236fe4a92Segillett px_pwrsetup_err_state: 61336fe4a92Segillett px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_INVALID); 61436fe4a92Segillett (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG, 61536fe4a92Segillett px_p->px_pm_msiq_id); 6161a887b2eSjchu pwr_setup_err1: 6171a887b2eSjchu mutex_destroy(&px_p->px_l23ready_lock); 6181a887b2eSjchu cv_destroy(&px_p->px_l23ready_cv); 6191a887b2eSjchu 6207c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 6217c478bd9Sstevel@tonic-gate } 6227c478bd9Sstevel@tonic-gate 6237c478bd9Sstevel@tonic-gate /* 6247c478bd9Sstevel@tonic-gate * undo whatever is done in px_pwr_setup. called by px_detach() 6257c478bd9Sstevel@tonic-gate */ 6267c478bd9Sstevel@tonic-gate static void 6277c478bd9Sstevel@tonic-gate px_pwr_teardown(dev_info_t *dip) 6287c478bd9Sstevel@tonic-gate { 6291a887b2eSjchu int instance = ddi_get_instance(dip); 6301a887b2eSjchu px_t *px_p = INST_TO_STATE(instance); 6317c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t hdl; 6327c478bd9Sstevel@tonic-gate 6331a887b2eSjchu if (!PCIE_PMINFO(dip) || !PCIE_NEXUS_PMINFO(dip)) 6347c478bd9Sstevel@tonic-gate return; 6357c478bd9Sstevel@tonic-gate 63620036fe5Segillett /* Initialize handle */ 63720036fe5Segillett bzero(&hdl, sizeof (ddi_intr_handle_impl_t)); 6387c478bd9Sstevel@tonic-gate hdl.ih_ver = DDI_INTR_VERSION; 6397c478bd9Sstevel@tonic-gate hdl.ih_state = DDI_IHDL_STATE_ALLOC; 6407c478bd9Sstevel@tonic-gate hdl.ih_dip = dip; 641665a7fcaSgovinda hdl.ih_pri = px_pwr_pil; 6427c478bd9Sstevel@tonic-gate 6437c478bd9Sstevel@tonic-gate px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_INVALID); 6447c478bd9Sstevel@tonic-gate (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG, 6451a887b2eSjchu px_p->px_pm_msiq_id); 6467c478bd9Sstevel@tonic-gate 64736fe4a92Segillett (void) px_ib_update_intr_state(px_p, px_p->px_dip, hdl.ih_inum, 648b0fc0e77Sgovinda px_msiqid_to_devino(px_p, px_p->px_pm_msiq_id), px_pwr_pil, 64936fe4a92Segillett PX_INTR_STATE_DISABLE, MSG_REC, PCIE_PME_ACK_MSG); 65036fe4a92Segillett 651055d7c80Scarlsonj px_p->px_pm_msiq_id = (msiqid_t)-1; 6527c478bd9Sstevel@tonic-gate 6531a887b2eSjchu cv_destroy(&px_p->px_l23ready_cv); 6541a887b2eSjchu mutex_destroy(&px_p->px_l23ready_lock); 6557c478bd9Sstevel@tonic-gate } 6567c478bd9Sstevel@tonic-gate 6577c478bd9Sstevel@tonic-gate /* bus driver entry points */ 6587c478bd9Sstevel@tonic-gate 6597c478bd9Sstevel@tonic-gate /* 6607c478bd9Sstevel@tonic-gate * bus map entry point: 6617c478bd9Sstevel@tonic-gate * 6627c478bd9Sstevel@tonic-gate * if map request is for an rnumber 6637c478bd9Sstevel@tonic-gate * get the corresponding regspec from device node 6647c478bd9Sstevel@tonic-gate * build a new regspec in our parent's format 6657c478bd9Sstevel@tonic-gate * build a new map_req with the new regspec 6667c478bd9Sstevel@tonic-gate * call up the tree to complete the mapping 6677c478bd9Sstevel@tonic-gate */ 6687c478bd9Sstevel@tonic-gate int 6697c478bd9Sstevel@tonic-gate px_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 6707c478bd9Sstevel@tonic-gate off_t off, off_t len, caddr_t *addrp) 6717c478bd9Sstevel@tonic-gate { 6727c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 6737c478bd9Sstevel@tonic-gate struct regspec p_regspec; 6747c478bd9Sstevel@tonic-gate ddi_map_req_t p_mapreq; 6757c478bd9Sstevel@tonic-gate int reglen, rval, r_no; 6767c478bd9Sstevel@tonic-gate pci_regspec_t reloc_reg, *rp = &reloc_reg; 6777c478bd9Sstevel@tonic-gate 6787c478bd9Sstevel@tonic-gate DBG(DBG_MAP, dip, "rdip=%s%d:", 6797c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 6807c478bd9Sstevel@tonic-gate 6817c478bd9Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) 6827c478bd9Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 6837c478bd9Sstevel@tonic-gate 6847c478bd9Sstevel@tonic-gate switch (mp->map_type) { 6857c478bd9Sstevel@tonic-gate case DDI_MT_REGSPEC: 6867c478bd9Sstevel@tonic-gate reloc_reg = *(pci_regspec_t *)mp->map_obj.rp; /* dup whole */ 6877c478bd9Sstevel@tonic-gate break; 6887c478bd9Sstevel@tonic-gate 6897c478bd9Sstevel@tonic-gate case DDI_MT_RNUMBER: 6907c478bd9Sstevel@tonic-gate r_no = mp->map_obj.rnumber; 6917c478bd9Sstevel@tonic-gate DBG(DBG_MAP | DBG_CONT, dip, " r#=%x", r_no); 6927c478bd9Sstevel@tonic-gate 693a3282898Scth if (ddi_getlongprop(DDI_DEV_T_ANY, rdip, DDI_PROP_DONTPASS, 6947c478bd9Sstevel@tonic-gate "reg", (caddr_t)&rp, ®len) != DDI_SUCCESS) 6957c478bd9Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 6967c478bd9Sstevel@tonic-gate 6977c478bd9Sstevel@tonic-gate if (r_no < 0 || r_no >= reglen / sizeof (pci_regspec_t)) { 6987c478bd9Sstevel@tonic-gate kmem_free(rp, reglen); 6997c478bd9Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 7007c478bd9Sstevel@tonic-gate } 7017c478bd9Sstevel@tonic-gate rp += r_no; 7027c478bd9Sstevel@tonic-gate break; 7037c478bd9Sstevel@tonic-gate 7047c478bd9Sstevel@tonic-gate default: 7057c478bd9Sstevel@tonic-gate return (DDI_ME_INVAL); 7067c478bd9Sstevel@tonic-gate } 7077c478bd9Sstevel@tonic-gate DBG(DBG_MAP | DBG_CONT, dip, "\n"); 7087c478bd9Sstevel@tonic-gate 7097c478bd9Sstevel@tonic-gate if ((rp->pci_phys_hi & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG) { 7107c478bd9Sstevel@tonic-gate /* 7117c478bd9Sstevel@tonic-gate * There may be a need to differentiate between PCI 7127c478bd9Sstevel@tonic-gate * and PCI-Ex devices so the following range check is 7137c478bd9Sstevel@tonic-gate * done correctly, depending on the implementation of 714d4bc0535SKrishna Elango * pcieb bridge nexus driver. 7157c478bd9Sstevel@tonic-gate */ 7167c478bd9Sstevel@tonic-gate if ((off >= PCIE_CONF_HDR_SIZE) || 7177c478bd9Sstevel@tonic-gate (len > PCIE_CONF_HDR_SIZE) || 7187c478bd9Sstevel@tonic-gate (off + len > PCIE_CONF_HDR_SIZE)) 7197c478bd9Sstevel@tonic-gate return (DDI_ME_INVAL); 7207c478bd9Sstevel@tonic-gate /* 7217c478bd9Sstevel@tonic-gate * the following function returning a DDI_FAILURE assumes 7227c478bd9Sstevel@tonic-gate * that there are no virtual config space access services 7237c478bd9Sstevel@tonic-gate * defined in this layer. Otherwise it is availed right 7247c478bd9Sstevel@tonic-gate * here and we return. 7257c478bd9Sstevel@tonic-gate */ 7267c478bd9Sstevel@tonic-gate rval = px_lib_map_vconfig(dip, mp, off, rp, addrp); 7277c478bd9Sstevel@tonic-gate if (rval == DDI_SUCCESS) 7287c478bd9Sstevel@tonic-gate goto done; 7297c478bd9Sstevel@tonic-gate } 7307c478bd9Sstevel@tonic-gate 7317c478bd9Sstevel@tonic-gate /* 7327c478bd9Sstevel@tonic-gate * No virtual config space services or we are mapping 7337c478bd9Sstevel@tonic-gate * a region of memory mapped config/IO/memory space, so proceed 7347c478bd9Sstevel@tonic-gate * to the parent. 7357c478bd9Sstevel@tonic-gate */ 7367c478bd9Sstevel@tonic-gate 7377c478bd9Sstevel@tonic-gate /* relocate within 64-bit pci space through "assigned-addresses" */ 7387c478bd9Sstevel@tonic-gate if (rval = px_reloc_reg(dip, rdip, px_p, rp)) 7397c478bd9Sstevel@tonic-gate goto done; 7407c478bd9Sstevel@tonic-gate 7417c478bd9Sstevel@tonic-gate if (len) /* adjust regspec according to mapping request */ 7427c478bd9Sstevel@tonic-gate rp->pci_size_low = len; /* MIN ? */ 7437c478bd9Sstevel@tonic-gate rp->pci_phys_low += off; 7447c478bd9Sstevel@tonic-gate 7457c478bd9Sstevel@tonic-gate /* translate relocated pci regspec into parent space through "ranges" */ 7467c478bd9Sstevel@tonic-gate if (rval = px_xlate_reg(px_p, rp, &p_regspec)) 7477c478bd9Sstevel@tonic-gate goto done; 7487c478bd9Sstevel@tonic-gate 7497c478bd9Sstevel@tonic-gate p_mapreq = *mp; /* dup the whole structure */ 7507c478bd9Sstevel@tonic-gate p_mapreq.map_type = DDI_MT_REGSPEC; 7517c478bd9Sstevel@tonic-gate p_mapreq.map_obj.rp = &p_regspec; 7524fbb58f6Sjchu px_lib_map_attr_check(&p_mapreq); 7537c478bd9Sstevel@tonic-gate rval = ddi_map(dip, &p_mapreq, 0, 0, addrp); 7547c478bd9Sstevel@tonic-gate 7557c478bd9Sstevel@tonic-gate if (rval == DDI_SUCCESS) { 7567c478bd9Sstevel@tonic-gate /* 7577c478bd9Sstevel@tonic-gate * Set-up access functions for FM access error capable drivers. 7587c478bd9Sstevel@tonic-gate */ 759eae2e508Skrishnae if (DDI_FM_ACC_ERR_CAP(ddi_fm_capable(rdip))) 760eae2e508Skrishnae px_fm_acc_setup(mp, rdip, rp); 7617c478bd9Sstevel@tonic-gate } 7627c478bd9Sstevel@tonic-gate 7637c478bd9Sstevel@tonic-gate done: 7647c478bd9Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) 7657c478bd9Sstevel@tonic-gate kmem_free(rp - r_no, reglen); 7667c478bd9Sstevel@tonic-gate 7677c478bd9Sstevel@tonic-gate return (rval); 7687c478bd9Sstevel@tonic-gate } 7697c478bd9Sstevel@tonic-gate 7707c478bd9Sstevel@tonic-gate /* 7717c478bd9Sstevel@tonic-gate * bus dma map entry point 7727c478bd9Sstevel@tonic-gate * return value: 7737c478bd9Sstevel@tonic-gate * DDI_DMA_PARTIAL_MAP 1 7747c478bd9Sstevel@tonic-gate * DDI_DMA_MAPOK 0 7757c478bd9Sstevel@tonic-gate * DDI_DMA_MAPPED 0 7767c478bd9Sstevel@tonic-gate * DDI_DMA_NORESOURCES -1 7777c478bd9Sstevel@tonic-gate * DDI_DMA_NOMAPPING -2 7787c478bd9Sstevel@tonic-gate * DDI_DMA_TOOBIG -3 7797c478bd9Sstevel@tonic-gate */ 7807c478bd9Sstevel@tonic-gate int 7817c478bd9Sstevel@tonic-gate px_dma_setup(dev_info_t *dip, dev_info_t *rdip, ddi_dma_req_t *dmareq, 7827c478bd9Sstevel@tonic-gate ddi_dma_handle_t *handlep) 7837c478bd9Sstevel@tonic-gate { 7847c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 7857c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 7867c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp; 7877c478bd9Sstevel@tonic-gate int ret; 7887c478bd9Sstevel@tonic-gate 7897c478bd9Sstevel@tonic-gate DBG(DBG_DMA_MAP, dip, "mapping - rdip=%s%d type=%s\n", 7907c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), 7917c478bd9Sstevel@tonic-gate handlep ? "alloc" : "advisory"); 7927c478bd9Sstevel@tonic-gate 7937c478bd9Sstevel@tonic-gate if (!(mp = px_dma_lmts2hdl(dip, rdip, mmu_p, dmareq))) 7947c478bd9Sstevel@tonic-gate return (DDI_DMA_NORESOURCES); 7957c478bd9Sstevel@tonic-gate if (mp == (ddi_dma_impl_t *)DDI_DMA_NOMAPPING) 7967c478bd9Sstevel@tonic-gate return (DDI_DMA_NOMAPPING); 7977c478bd9Sstevel@tonic-gate if (ret = px_dma_type(px_p, dmareq, mp)) 7987c478bd9Sstevel@tonic-gate goto freehandle; 7997c478bd9Sstevel@tonic-gate if (ret = px_dma_pfn(px_p, dmareq, mp)) 8007c478bd9Sstevel@tonic-gate goto freehandle; 8017c478bd9Sstevel@tonic-gate 8027c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 80336fe4a92Segillett case PX_DMAI_FLAGS_DVMA: /* LINTED E_EQUALITY_NOT_ASSIGNMENT */ 8047c478bd9Sstevel@tonic-gate if ((ret = px_dvma_win(px_p, dmareq, mp)) || !handlep) 8057c478bd9Sstevel@tonic-gate goto freehandle; 8067c478bd9Sstevel@tonic-gate if (!PX_DMA_CANCACHE(mp)) { /* try fast track */ 8077c478bd9Sstevel@tonic-gate if (PX_DMA_CANFAST(mp)) { 8087c478bd9Sstevel@tonic-gate if (!px_dvma_map_fast(mmu_p, mp)) 8097c478bd9Sstevel@tonic-gate break; 8107c478bd9Sstevel@tonic-gate /* LINTED E_NOP_ELSE_STMT */ 8117c478bd9Sstevel@tonic-gate } else { 8127c478bd9Sstevel@tonic-gate PX_DVMA_FASTTRAK_PROF(mp); 8137c478bd9Sstevel@tonic-gate } 8147c478bd9Sstevel@tonic-gate } 8157c478bd9Sstevel@tonic-gate if (ret = px_dvma_map(mp, dmareq, mmu_p)) 8167c478bd9Sstevel@tonic-gate goto freehandle; 8177c478bd9Sstevel@tonic-gate break; 81836fe4a92Segillett case PX_DMAI_FLAGS_PTP: /* LINTED E_EQUALITY_NOT_ASSIGNMENT */ 8197c478bd9Sstevel@tonic-gate if ((ret = px_dma_physwin(px_p, dmareq, mp)) || !handlep) 8207c478bd9Sstevel@tonic-gate goto freehandle; 8217c478bd9Sstevel@tonic-gate break; 82236fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 8237c478bd9Sstevel@tonic-gate default: 8247c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_setup: bad dma type 0x%x", 8257c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), 8267c478bd9Sstevel@tonic-gate PX_DMA_TYPE(mp)); 8277c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 8287c478bd9Sstevel@tonic-gate } 8297c478bd9Sstevel@tonic-gate *handlep = (ddi_dma_handle_t)mp; 83036fe4a92Segillett mp->dmai_flags |= PX_DMAI_FLAGS_INUSE; 8317c478bd9Sstevel@tonic-gate px_dump_dma_handle(DBG_DMA_MAP, dip, mp); 8327c478bd9Sstevel@tonic-gate 8337c478bd9Sstevel@tonic-gate return ((mp->dmai_nwin == 1) ? DDI_DMA_MAPPED : DDI_DMA_PARTIAL_MAP); 8347c478bd9Sstevel@tonic-gate freehandle: 8357c478bd9Sstevel@tonic-gate if (ret == DDI_DMA_NORESOURCES) 8367c478bd9Sstevel@tonic-gate px_dma_freemp(mp); /* don't run_callback() */ 8377c478bd9Sstevel@tonic-gate else 8387c478bd9Sstevel@tonic-gate (void) px_dma_freehdl(dip, rdip, (ddi_dma_handle_t)mp); 8397c478bd9Sstevel@tonic-gate return (ret); 8407c478bd9Sstevel@tonic-gate } 8417c478bd9Sstevel@tonic-gate 8427c478bd9Sstevel@tonic-gate 8437c478bd9Sstevel@tonic-gate /* 8447c478bd9Sstevel@tonic-gate * bus dma alloc handle entry point: 8457c478bd9Sstevel@tonic-gate */ 8467c478bd9Sstevel@tonic-gate int 8477c478bd9Sstevel@tonic-gate px_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attrp, 8487c478bd9Sstevel@tonic-gate int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 8497c478bd9Sstevel@tonic-gate { 8507c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 8517c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp; 8527c478bd9Sstevel@tonic-gate int rval; 8537c478bd9Sstevel@tonic-gate 8547c478bd9Sstevel@tonic-gate DBG(DBG_DMA_ALLOCH, dip, "rdip=%s%d\n", 8557c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 8567c478bd9Sstevel@tonic-gate 8577c478bd9Sstevel@tonic-gate if (attrp->dma_attr_version != DMA_ATTR_V0) 8587c478bd9Sstevel@tonic-gate return (DDI_DMA_BADATTR); 8597c478bd9Sstevel@tonic-gate 8607c478bd9Sstevel@tonic-gate if (!(mp = px_dma_allocmp(dip, rdip, waitfp, arg))) 8617c478bd9Sstevel@tonic-gate return (DDI_DMA_NORESOURCES); 8627c478bd9Sstevel@tonic-gate 8637c478bd9Sstevel@tonic-gate /* 8647c478bd9Sstevel@tonic-gate * Save requestor's information 8657c478bd9Sstevel@tonic-gate */ 8667c478bd9Sstevel@tonic-gate mp->dmai_attr = *attrp; /* whole object - augmented later */ 86736fe4a92Segillett *PX_DEV_ATTR(mp) = *attrp; /* whole object - device orig attr */ 8687c478bd9Sstevel@tonic-gate DBG(DBG_DMA_ALLOCH, dip, "mp=%p\n", mp); 8697c478bd9Sstevel@tonic-gate 8707c478bd9Sstevel@tonic-gate /* check and convert dma attributes to handle parameters */ 8717c478bd9Sstevel@tonic-gate if (rval = px_dma_attr2hdl(px_p, mp)) { 8727c478bd9Sstevel@tonic-gate px_dma_freehdl(dip, rdip, (ddi_dma_handle_t)mp); 8737c478bd9Sstevel@tonic-gate *handlep = NULL; 8747c478bd9Sstevel@tonic-gate return (rval); 8757c478bd9Sstevel@tonic-gate } 8767c478bd9Sstevel@tonic-gate *handlep = (ddi_dma_handle_t)mp; 8777c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 8787c478bd9Sstevel@tonic-gate } 8797c478bd9Sstevel@tonic-gate 8807c478bd9Sstevel@tonic-gate 8817c478bd9Sstevel@tonic-gate /* 8827c478bd9Sstevel@tonic-gate * bus dma free handle entry point: 8837c478bd9Sstevel@tonic-gate */ 8847c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 8857c478bd9Sstevel@tonic-gate int 8867c478bd9Sstevel@tonic-gate px_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 8877c478bd9Sstevel@tonic-gate { 8887c478bd9Sstevel@tonic-gate DBG(DBG_DMA_FREEH, dip, "rdip=%s%d mp=%p\n", 8897c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), handle); 8907c478bd9Sstevel@tonic-gate px_dma_freemp((ddi_dma_impl_t *)handle); 8917c478bd9Sstevel@tonic-gate 8927c478bd9Sstevel@tonic-gate if (px_kmem_clid) { 8937c478bd9Sstevel@tonic-gate DBG(DBG_DMA_FREEH, dip, "run handle callback\n"); 8947c478bd9Sstevel@tonic-gate ddi_run_callback(&px_kmem_clid); 8957c478bd9Sstevel@tonic-gate } 8967c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 8977c478bd9Sstevel@tonic-gate } 8987c478bd9Sstevel@tonic-gate 8997c478bd9Sstevel@tonic-gate 9007c478bd9Sstevel@tonic-gate /* 9017c478bd9Sstevel@tonic-gate * bus dma bind handle entry point: 9027c478bd9Sstevel@tonic-gate */ 9037c478bd9Sstevel@tonic-gate int 9047c478bd9Sstevel@tonic-gate px_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 9057c478bd9Sstevel@tonic-gate ddi_dma_handle_t handle, ddi_dma_req_t *dmareq, 9067c478bd9Sstevel@tonic-gate ddi_dma_cookie_t *cookiep, uint_t *ccountp) 9077c478bd9Sstevel@tonic-gate { 9087c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 9097c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 9107c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 9117c478bd9Sstevel@tonic-gate int ret; 9127c478bd9Sstevel@tonic-gate 9137c478bd9Sstevel@tonic-gate DBG(DBG_DMA_BINDH, dip, "rdip=%s%d mp=%p dmareq=%p\n", 9147c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), mp, dmareq); 9157c478bd9Sstevel@tonic-gate 91636fe4a92Segillett if (mp->dmai_flags & PX_DMAI_FLAGS_INUSE) 9177c478bd9Sstevel@tonic-gate return (DDI_DMA_INUSE); 9187c478bd9Sstevel@tonic-gate 91936fe4a92Segillett ASSERT((mp->dmai_flags & ~PX_DMAI_FLAGS_PRESERVE) == 0); 92036fe4a92Segillett mp->dmai_flags |= PX_DMAI_FLAGS_INUSE; 9217c478bd9Sstevel@tonic-gate 9227c478bd9Sstevel@tonic-gate if (ret = px_dma_type(px_p, dmareq, mp)) 9237c478bd9Sstevel@tonic-gate goto err; 9247c478bd9Sstevel@tonic-gate if (ret = px_dma_pfn(px_p, dmareq, mp)) 9257c478bd9Sstevel@tonic-gate goto err; 9267c478bd9Sstevel@tonic-gate 9277c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 92836fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 9297c478bd9Sstevel@tonic-gate if (ret = px_dvma_win(px_p, dmareq, mp)) 9307c478bd9Sstevel@tonic-gate goto map_err; 9317c478bd9Sstevel@tonic-gate if (!PX_DMA_CANCACHE(mp)) { /* try fast track */ 9327c478bd9Sstevel@tonic-gate if (PX_DMA_CANFAST(mp)) { 9337c478bd9Sstevel@tonic-gate if (!px_dvma_map_fast(mmu_p, mp)) 9347c478bd9Sstevel@tonic-gate goto mapped; /*LINTED E_NOP_ELSE_STMT*/ 9357c478bd9Sstevel@tonic-gate } else { 9367c478bd9Sstevel@tonic-gate PX_DVMA_FASTTRAK_PROF(mp); 9377c478bd9Sstevel@tonic-gate } 9387c478bd9Sstevel@tonic-gate } 9397c478bd9Sstevel@tonic-gate if (ret = px_dvma_map(mp, dmareq, mmu_p)) 9407c478bd9Sstevel@tonic-gate goto map_err; 9417c478bd9Sstevel@tonic-gate mapped: 9427c478bd9Sstevel@tonic-gate *ccountp = 1; 9437c478bd9Sstevel@tonic-gate MAKE_DMA_COOKIE(cookiep, mp->dmai_mapping, mp->dmai_size); 9447c478bd9Sstevel@tonic-gate break; 94536fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 94636fe4a92Segillett case PX_DMAI_FLAGS_PTP: 9477c478bd9Sstevel@tonic-gate if (ret = px_dma_physwin(px_p, dmareq, mp)) 9487c478bd9Sstevel@tonic-gate goto map_err; 94936fe4a92Segillett *ccountp = PX_WINLST(mp)->win_ncookies; 95036fe4a92Segillett *cookiep = 95136fe4a92Segillett *(ddi_dma_cookie_t *)(PX_WINLST(mp) + 1); /* wholeobj */ 9527c478bd9Sstevel@tonic-gate break; 9537c478bd9Sstevel@tonic-gate default: 9547c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_bindhdl(%p): bad dma type", 9557c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), mp); 9567c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 9577c478bd9Sstevel@tonic-gate } 95869cd775fSschwartz DBG(DBG_DMA_BINDH, dip, "cookie %" PRIx64 "+%x\n", 95969cd775fSschwartz cookiep->dmac_address, cookiep->dmac_size); 9607c478bd9Sstevel@tonic-gate px_dump_dma_handle(DBG_DMA_MAP, dip, mp); 961f8d2de6bSjchu 962f8d2de6bSjchu /* insert dma handle into FMA cache */ 96300d0963fSdilpreet if (mp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 964f8d2de6bSjchu (void) ndi_fmc_insert(rdip, DMA_HANDLE, mp, NULL); 965eae2e508Skrishnae mp->dmai_error.err_cf = px_err_dma_hdl_check; 96600d0963fSdilpreet } 967f8d2de6bSjchu 9687c478bd9Sstevel@tonic-gate return (mp->dmai_nwin == 1 ? DDI_DMA_MAPPED : DDI_DMA_PARTIAL_MAP); 9697c478bd9Sstevel@tonic-gate map_err: 9707c478bd9Sstevel@tonic-gate px_dma_freepfn(mp); 9717c478bd9Sstevel@tonic-gate err: 97236fe4a92Segillett mp->dmai_flags &= PX_DMAI_FLAGS_PRESERVE; 9737c478bd9Sstevel@tonic-gate return (ret); 9747c478bd9Sstevel@tonic-gate } 9757c478bd9Sstevel@tonic-gate 9767c478bd9Sstevel@tonic-gate 9777c478bd9Sstevel@tonic-gate /* 9787c478bd9Sstevel@tonic-gate * bus dma unbind handle entry point: 9797c478bd9Sstevel@tonic-gate */ 9807c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 9817c478bd9Sstevel@tonic-gate int 9827c478bd9Sstevel@tonic-gate px_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 9837c478bd9Sstevel@tonic-gate { 9847c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 9857c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 9867c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 9877c478bd9Sstevel@tonic-gate 9887c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "rdip=%s%d, mp=%p\n", 9897c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), handle); 99036fe4a92Segillett if ((mp->dmai_flags & PX_DMAI_FLAGS_INUSE) == 0) { 9917c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "handle not inuse\n"); 9927c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 9937c478bd9Sstevel@tonic-gate } 9947c478bd9Sstevel@tonic-gate 995f8d2de6bSjchu /* remove dma handle from FMA cache */ 996f8d2de6bSjchu if (mp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 997f8d2de6bSjchu if (DEVI(rdip)->devi_fmhdl != NULL && 998f8d2de6bSjchu DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap)) { 999f8d2de6bSjchu (void) ndi_fmc_remove(rdip, DMA_HANDLE, mp); 1000f8d2de6bSjchu } 1001f8d2de6bSjchu } 1002f8d2de6bSjchu 10037c478bd9Sstevel@tonic-gate /* 10047c478bd9Sstevel@tonic-gate * Here if the handle is using the iommu. Unload all the iommu 10057c478bd9Sstevel@tonic-gate * translations. 10067c478bd9Sstevel@tonic-gate */ 10077c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 100836fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 10097c478bd9Sstevel@tonic-gate px_mmu_unmap_window(mmu_p, mp); 10107c478bd9Sstevel@tonic-gate px_dvma_unmap(mmu_p, mp); 10117c478bd9Sstevel@tonic-gate px_dma_freepfn(mp); 10127c478bd9Sstevel@tonic-gate break; 101336fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 101436fe4a92Segillett case PX_DMAI_FLAGS_PTP: 10157c478bd9Sstevel@tonic-gate px_dma_freewin(mp); 10167c478bd9Sstevel@tonic-gate break; 10177c478bd9Sstevel@tonic-gate default: 10187c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_unbindhdl:bad dma type %p", 10197c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), mp); 10207c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 10217c478bd9Sstevel@tonic-gate } 10227c478bd9Sstevel@tonic-gate if (mmu_p->mmu_dvma_clid != 0) { 10237c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "run dvma callback\n"); 10247c478bd9Sstevel@tonic-gate ddi_run_callback(&mmu_p->mmu_dvma_clid); 10257c478bd9Sstevel@tonic-gate } 10267c478bd9Sstevel@tonic-gate if (px_kmem_clid) { 10277c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "run handle callback\n"); 10287c478bd9Sstevel@tonic-gate ddi_run_callback(&px_kmem_clid); 10297c478bd9Sstevel@tonic-gate } 103036fe4a92Segillett mp->dmai_flags &= PX_DMAI_FLAGS_PRESERVE; 1031f8d2de6bSjchu 10327c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 10337c478bd9Sstevel@tonic-gate } 10347c478bd9Sstevel@tonic-gate 10357c478bd9Sstevel@tonic-gate /* 10367c478bd9Sstevel@tonic-gate * bus dma win entry point: 10377c478bd9Sstevel@tonic-gate */ 10387c478bd9Sstevel@tonic-gate int 10397c478bd9Sstevel@tonic-gate px_dma_win(dev_info_t *dip, dev_info_t *rdip, 10407c478bd9Sstevel@tonic-gate ddi_dma_handle_t handle, uint_t win, off_t *offp, 10417c478bd9Sstevel@tonic-gate size_t *lenp, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 10427c478bd9Sstevel@tonic-gate { 10437c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 10447c478bd9Sstevel@tonic-gate int ret; 10457c478bd9Sstevel@tonic-gate 10467c478bd9Sstevel@tonic-gate DBG(DBG_DMA_WIN, dip, "rdip=%s%d\n", 10477c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 10487c478bd9Sstevel@tonic-gate 10497c478bd9Sstevel@tonic-gate px_dump_dma_handle(DBG_DMA_WIN, dip, mp); 10507c478bd9Sstevel@tonic-gate if (win >= mp->dmai_nwin) { 10517c478bd9Sstevel@tonic-gate DBG(DBG_DMA_WIN, dip, "%x out of range\n", win); 10527c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 10537c478bd9Sstevel@tonic-gate } 10547c478bd9Sstevel@tonic-gate 10557c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 105636fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 10577c478bd9Sstevel@tonic-gate if (win != PX_DMA_CURWIN(mp)) { 10587c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 10597c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 10607c478bd9Sstevel@tonic-gate px_mmu_unmap_window(mmu_p, mp); 10617c478bd9Sstevel@tonic-gate 10627c478bd9Sstevel@tonic-gate /* map_window sets dmai_mapping/size/offset */ 10637c478bd9Sstevel@tonic-gate px_mmu_map_window(mmu_p, mp, win); 10647c478bd9Sstevel@tonic-gate if ((ret = px_mmu_map_window(mmu_p, 10657c478bd9Sstevel@tonic-gate mp, win)) != DDI_SUCCESS) 10667c478bd9Sstevel@tonic-gate return (ret); 10677c478bd9Sstevel@tonic-gate } 10687c478bd9Sstevel@tonic-gate if (cookiep) 10697c478bd9Sstevel@tonic-gate MAKE_DMA_COOKIE(cookiep, mp->dmai_mapping, 10707c478bd9Sstevel@tonic-gate mp->dmai_size); 10717c478bd9Sstevel@tonic-gate if (ccountp) 10727c478bd9Sstevel@tonic-gate *ccountp = 1; 10737c478bd9Sstevel@tonic-gate break; 107436fe4a92Segillett case PX_DMAI_FLAGS_PTP: 107536fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: { 10767c478bd9Sstevel@tonic-gate int i; 10777c478bd9Sstevel@tonic-gate ddi_dma_cookie_t *ck_p; 10787c478bd9Sstevel@tonic-gate px_dma_win_t *win_p = mp->dmai_winlst; 10797c478bd9Sstevel@tonic-gate 1080eae2e508Skrishnae for (i = 0; i < win; win_p = win_p->win_next, i++) {}; 10817c478bd9Sstevel@tonic-gate ck_p = (ddi_dma_cookie_t *)(win_p + 1); 10827c478bd9Sstevel@tonic-gate *cookiep = *ck_p; 10837c478bd9Sstevel@tonic-gate mp->dmai_offset = win_p->win_offset; 10847c478bd9Sstevel@tonic-gate mp->dmai_size = win_p->win_size; 10857c478bd9Sstevel@tonic-gate mp->dmai_mapping = ck_p->dmac_laddress; 10867c478bd9Sstevel@tonic-gate mp->dmai_cookie = ck_p + 1; 10877c478bd9Sstevel@tonic-gate win_p->win_curseg = 0; 10887c478bd9Sstevel@tonic-gate if (ccountp) 10897c478bd9Sstevel@tonic-gate *ccountp = win_p->win_ncookies; 10907c478bd9Sstevel@tonic-gate } 10917c478bd9Sstevel@tonic-gate break; 10927c478bd9Sstevel@tonic-gate default: 10937c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d: px_dma_win:bad dma type 0x%x", 10947c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), 10957c478bd9Sstevel@tonic-gate PX_DMA_TYPE(mp)); 10967c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 10977c478bd9Sstevel@tonic-gate } 10987c478bd9Sstevel@tonic-gate if (cookiep) 10997c478bd9Sstevel@tonic-gate DBG(DBG_DMA_WIN, dip, 11007c478bd9Sstevel@tonic-gate "cookie - dmac_address=%x dmac_size=%x\n", 11017c478bd9Sstevel@tonic-gate cookiep->dmac_address, cookiep->dmac_size); 11027c478bd9Sstevel@tonic-gate if (offp) 11037c478bd9Sstevel@tonic-gate *offp = (off_t)mp->dmai_offset; 11047c478bd9Sstevel@tonic-gate if (lenp) 11057c478bd9Sstevel@tonic-gate *lenp = mp->dmai_size; 11067c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 11077c478bd9Sstevel@tonic-gate } 11087c478bd9Sstevel@tonic-gate 11097c478bd9Sstevel@tonic-gate #ifdef DEBUG 11107c478bd9Sstevel@tonic-gate static char *px_dmactl_str[] = { 11117c478bd9Sstevel@tonic-gate "DDI_DMA_FREE", 11127c478bd9Sstevel@tonic-gate "DDI_DMA_SYNC", 11137c478bd9Sstevel@tonic-gate "DDI_DMA_HTOC", 11147c478bd9Sstevel@tonic-gate "DDI_DMA_KVADDR", 11157c478bd9Sstevel@tonic-gate "DDI_DMA_MOVWIN", 11167c478bd9Sstevel@tonic-gate "DDI_DMA_REPWIN", 11177c478bd9Sstevel@tonic-gate "DDI_DMA_GETERR", 11187c478bd9Sstevel@tonic-gate "DDI_DMA_COFF", 11197c478bd9Sstevel@tonic-gate "DDI_DMA_NEXTWIN", 11207c478bd9Sstevel@tonic-gate "DDI_DMA_NEXTSEG", 11217c478bd9Sstevel@tonic-gate "DDI_DMA_SEGTOC", 11227c478bd9Sstevel@tonic-gate "DDI_DMA_RESERVE", 11237c478bd9Sstevel@tonic-gate "DDI_DMA_RELEASE", 11247c478bd9Sstevel@tonic-gate "DDI_DMA_RESETH", 11257c478bd9Sstevel@tonic-gate "DDI_DMA_CKSYNC", 11267c478bd9Sstevel@tonic-gate "DDI_DMA_IOPB_ALLOC", 11277c478bd9Sstevel@tonic-gate "DDI_DMA_IOPB_FREE", 11287c478bd9Sstevel@tonic-gate "DDI_DMA_SMEM_ALLOC", 11297c478bd9Sstevel@tonic-gate "DDI_DMA_SMEM_FREE", 11307c478bd9Sstevel@tonic-gate "DDI_DMA_SET_SBUS64" 11317c478bd9Sstevel@tonic-gate }; 11327c478bd9Sstevel@tonic-gate #endif /* DEBUG */ 11337c478bd9Sstevel@tonic-gate 11347c478bd9Sstevel@tonic-gate /* 11357c478bd9Sstevel@tonic-gate * bus dma control entry point: 11367c478bd9Sstevel@tonic-gate */ 11377c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 11387c478bd9Sstevel@tonic-gate int 11397c478bd9Sstevel@tonic-gate px_dma_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 11407c478bd9Sstevel@tonic-gate enum ddi_dma_ctlops cmd, off_t *offp, size_t *lenp, caddr_t *objp, 11417c478bd9Sstevel@tonic-gate uint_t cache_flags) 11427c478bd9Sstevel@tonic-gate { 11437c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 11447c478bd9Sstevel@tonic-gate 11457c478bd9Sstevel@tonic-gate #ifdef DEBUG 11467c478bd9Sstevel@tonic-gate DBG(DBG_DMA_CTL, dip, "%s: rdip=%s%d\n", px_dmactl_str[cmd], 11477c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 11487c478bd9Sstevel@tonic-gate #endif /* DEBUG */ 11497c478bd9Sstevel@tonic-gate 11507c478bd9Sstevel@tonic-gate switch (cmd) { 11517c478bd9Sstevel@tonic-gate case DDI_DMA_FREE: 11527c478bd9Sstevel@tonic-gate (void) px_dma_unbindhdl(dip, rdip, handle); 11537c478bd9Sstevel@tonic-gate (void) px_dma_freehdl(dip, rdip, handle); 11547c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 11557c478bd9Sstevel@tonic-gate case DDI_DMA_RESERVE: { 11567c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 11577c478bd9Sstevel@tonic-gate return (px_fdvma_reserve(dip, rdip, px_p, 11587c478bd9Sstevel@tonic-gate (ddi_dma_req_t *)offp, (ddi_dma_handle_t *)objp)); 11597c478bd9Sstevel@tonic-gate } 11607c478bd9Sstevel@tonic-gate case DDI_DMA_RELEASE: { 11617c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 11627c478bd9Sstevel@tonic-gate return (px_fdvma_release(dip, px_p, mp)); 11637c478bd9Sstevel@tonic-gate } 11647c478bd9Sstevel@tonic-gate default: 11657c478bd9Sstevel@tonic-gate break; 11667c478bd9Sstevel@tonic-gate } 11677c478bd9Sstevel@tonic-gate 11687c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 116936fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 11707c478bd9Sstevel@tonic-gate return (px_dvma_ctl(dip, rdip, mp, cmd, offp, lenp, objp, 11717c478bd9Sstevel@tonic-gate cache_flags)); 117236fe4a92Segillett case PX_DMAI_FLAGS_PTP: 117336fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 11747c478bd9Sstevel@tonic-gate return (px_dma_ctl(dip, rdip, mp, cmd, offp, lenp, objp, 11757c478bd9Sstevel@tonic-gate cache_flags)); 11767c478bd9Sstevel@tonic-gate default: 11777c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_ctlops(%x):bad dma type %x", 11787c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), cmd, 11797c478bd9Sstevel@tonic-gate mp->dmai_flags); 11807c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 11817c478bd9Sstevel@tonic-gate } 1182b40cec45Skrishnae return (0); 11837c478bd9Sstevel@tonic-gate } 11847c478bd9Sstevel@tonic-gate 11857c478bd9Sstevel@tonic-gate /* 11867c478bd9Sstevel@tonic-gate * control ops entry point: 11877c478bd9Sstevel@tonic-gate * 11887c478bd9Sstevel@tonic-gate * Requests handled completely: 11897c478bd9Sstevel@tonic-gate * DDI_CTLOPS_INITCHILD see init_child() for details 11907c478bd9Sstevel@tonic-gate * DDI_CTLOPS_UNINITCHILD 11917c478bd9Sstevel@tonic-gate * DDI_CTLOPS_REPORTDEV see report_dev() for details 11927c478bd9Sstevel@tonic-gate * DDI_CTLOPS_IOMIN cache line size if streaming otherwise 1 11937c478bd9Sstevel@tonic-gate * DDI_CTLOPS_REGSIZE 11947c478bd9Sstevel@tonic-gate * DDI_CTLOPS_NREGS 11957c478bd9Sstevel@tonic-gate * DDI_CTLOPS_DVMAPAGESIZE 11967c478bd9Sstevel@tonic-gate * DDI_CTLOPS_POKE 11977c478bd9Sstevel@tonic-gate * DDI_CTLOPS_PEEK 11987c478bd9Sstevel@tonic-gate * 11997c478bd9Sstevel@tonic-gate * All others passed to parent. 12007c478bd9Sstevel@tonic-gate */ 12017c478bd9Sstevel@tonic-gate int 12027c478bd9Sstevel@tonic-gate px_ctlops(dev_info_t *dip, dev_info_t *rdip, 12037c478bd9Sstevel@tonic-gate ddi_ctl_enum_t op, void *arg, void *result) 12047c478bd9Sstevel@tonic-gate { 12057c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 12067c478bd9Sstevel@tonic-gate struct detachspec *ds; 12077c478bd9Sstevel@tonic-gate struct attachspec *as; 12087c478bd9Sstevel@tonic-gate 12097c478bd9Sstevel@tonic-gate switch (op) { 12107c478bd9Sstevel@tonic-gate case DDI_CTLOPS_INITCHILD: 12117c478bd9Sstevel@tonic-gate return (px_init_child(px_p, (dev_info_t *)arg)); 12127c478bd9Sstevel@tonic-gate 12137c478bd9Sstevel@tonic-gate case DDI_CTLOPS_UNINITCHILD: 12147c478bd9Sstevel@tonic-gate return (px_uninit_child(px_p, (dev_info_t *)arg)); 12157c478bd9Sstevel@tonic-gate 12167c478bd9Sstevel@tonic-gate case DDI_CTLOPS_ATTACH: 12176e8a7b44Sjchu if (!pcie_is_child(dip, rdip)) 12186e8a7b44Sjchu return (DDI_SUCCESS); 12196e8a7b44Sjchu 12207c478bd9Sstevel@tonic-gate as = (struct attachspec *)arg; 12217c478bd9Sstevel@tonic-gate switch (as->when) { 12227c478bd9Sstevel@tonic-gate case DDI_PRE: 12237c478bd9Sstevel@tonic-gate if (as->cmd == DDI_ATTACH) { 12247c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "PRE_ATTACH for %s@%d\n", 12257c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), 12267c478bd9Sstevel@tonic-gate ddi_get_instance(rdip)); 12277c478bd9Sstevel@tonic-gate return (pcie_pm_hold(dip)); 12287c478bd9Sstevel@tonic-gate } 12298bc7d88aSet142600 if (as->cmd == DDI_RESUME) { 12308bc7d88aSet142600 DBG(DBG_PWR, dip, "PRE_RESUME for %s@%d\n", 12318bc7d88aSet142600 ddi_driver_name(rdip), 12328bc7d88aSet142600 ddi_get_instance(rdip)); 12338bc7d88aSet142600 1234eae2e508Skrishnae pcie_clear_errors(rdip); 12358bc7d88aSet142600 } 12367c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12377c478bd9Sstevel@tonic-gate 12387c478bd9Sstevel@tonic-gate case DDI_POST: 12397c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "POST_ATTACH for %s@%d\n", 12407c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 1241*c2cc6e07SRamesh Chitrothu if (as->cmd == DDI_ATTACH && 1242*c2cc6e07SRamesh Chitrothu as->result != DDI_SUCCESS) { 1243*c2cc6e07SRamesh Chitrothu /* 1244*c2cc6e07SRamesh Chitrothu * Attach failed for the child device. The child 1245*c2cc6e07SRamesh Chitrothu * driver may have made PM calls before the 1246*c2cc6e07SRamesh Chitrothu * attach failed. pcie_pm_remove_child() should 1247*c2cc6e07SRamesh Chitrothu * cleanup PM state and holds (if any) 1248*c2cc6e07SRamesh Chitrothu * associated with the child device. 1249*c2cc6e07SRamesh Chitrothu */ 1250*c2cc6e07SRamesh Chitrothu return (pcie_pm_remove_child(dip, rdip)); 1251*c2cc6e07SRamesh Chitrothu } 125213683ea2Skrishnae 1253e0d05aa9Skrishnae if (as->result == DDI_SUCCESS) 12540c5eba8cSkrishnae pf_init(rdip, (void *)px_p->px_fm_ibc, as->cmd); 1255bf8fc234Set142600 125613683ea2Skrishnae (void) pcie_postattach_child(rdip); 125713683ea2Skrishnae 12587c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12597c478bd9Sstevel@tonic-gate default: 12607c478bd9Sstevel@tonic-gate break; 12617c478bd9Sstevel@tonic-gate } 12627c478bd9Sstevel@tonic-gate break; 12637c478bd9Sstevel@tonic-gate 12647c478bd9Sstevel@tonic-gate case DDI_CTLOPS_DETACH: 1265025c5d04Sjchu if (!pcie_is_child(dip, rdip)) 1266025c5d04Sjchu return (DDI_SUCCESS); 1267025c5d04Sjchu 12687c478bd9Sstevel@tonic-gate ds = (struct detachspec *)arg; 12697c478bd9Sstevel@tonic-gate switch (ds->when) { 12707c478bd9Sstevel@tonic-gate case DDI_POST: 12717c478bd9Sstevel@tonic-gate if (ds->cmd == DDI_DETACH && 12727c478bd9Sstevel@tonic-gate ds->result == DDI_SUCCESS) { 12737c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "POST_DETACH for %s@%d\n", 12747c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), 12757c478bd9Sstevel@tonic-gate ddi_get_instance(rdip)); 12767c478bd9Sstevel@tonic-gate return (pcie_pm_remove_child(dip, rdip)); 12777c478bd9Sstevel@tonic-gate } 12787c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 1279bf8fc234Set142600 case DDI_PRE: 12800c5eba8cSkrishnae pf_fini(rdip, ds->cmd); 1281bf8fc234Set142600 return (DDI_SUCCESS); 12827c478bd9Sstevel@tonic-gate default: 12837c478bd9Sstevel@tonic-gate break; 12847c478bd9Sstevel@tonic-gate } 12857c478bd9Sstevel@tonic-gate break; 12867c478bd9Sstevel@tonic-gate 12877c478bd9Sstevel@tonic-gate case DDI_CTLOPS_REPORTDEV: 12887c478bd9Sstevel@tonic-gate return (px_report_dev(rdip)); 12897c478bd9Sstevel@tonic-gate 12907c478bd9Sstevel@tonic-gate case DDI_CTLOPS_IOMIN: 12917c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12927c478bd9Sstevel@tonic-gate 12937c478bd9Sstevel@tonic-gate case DDI_CTLOPS_REGSIZE: 12947c478bd9Sstevel@tonic-gate *((off_t *)result) = px_get_reg_set_size(rdip, *((int *)arg)); 1295f8d2de6bSjchu return (*((off_t *)result) == 0 ? DDI_FAILURE : DDI_SUCCESS); 12967c478bd9Sstevel@tonic-gate 12977c478bd9Sstevel@tonic-gate case DDI_CTLOPS_NREGS: 12987c478bd9Sstevel@tonic-gate *((uint_t *)result) = px_get_nreg_set(rdip); 12997c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 13007c478bd9Sstevel@tonic-gate 13017c478bd9Sstevel@tonic-gate case DDI_CTLOPS_DVMAPAGESIZE: 13027c478bd9Sstevel@tonic-gate *((ulong_t *)result) = MMU_PAGE_SIZE; 13037c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 13047c478bd9Sstevel@tonic-gate 13057c478bd9Sstevel@tonic-gate case DDI_CTLOPS_POKE: /* platform dependent implementation. */ 13067c478bd9Sstevel@tonic-gate return (px_lib_ctlops_poke(dip, rdip, 13077c478bd9Sstevel@tonic-gate (peekpoke_ctlops_t *)arg)); 13087c478bd9Sstevel@tonic-gate 13097c478bd9Sstevel@tonic-gate case DDI_CTLOPS_PEEK: /* platform dependent implementation. */ 13107c478bd9Sstevel@tonic-gate return (px_lib_ctlops_peek(dip, rdip, 13117c478bd9Sstevel@tonic-gate (peekpoke_ctlops_t *)arg, result)); 13127c478bd9Sstevel@tonic-gate 13137c478bd9Sstevel@tonic-gate case DDI_CTLOPS_POWER: 13147c478bd9Sstevel@tonic-gate default: 13157c478bd9Sstevel@tonic-gate break; 13167c478bd9Sstevel@tonic-gate } 13177c478bd9Sstevel@tonic-gate 13187c478bd9Sstevel@tonic-gate /* 13197c478bd9Sstevel@tonic-gate * Now pass the request up to our parent. 13207c478bd9Sstevel@tonic-gate */ 13217c478bd9Sstevel@tonic-gate DBG(DBG_CTLOPS, dip, "passing request to parent: rdip=%s%d\n", 13227c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 13237c478bd9Sstevel@tonic-gate return (ddi_ctlops(dip, rdip, op, arg, result)); 13247c478bd9Sstevel@tonic-gate } 13257c478bd9Sstevel@tonic-gate 13267c478bd9Sstevel@tonic-gate /* ARGSUSED */ 13277c478bd9Sstevel@tonic-gate int 13287c478bd9Sstevel@tonic-gate px_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, 13297c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 13307c478bd9Sstevel@tonic-gate { 13317c478bd9Sstevel@tonic-gate int intr_types, ret = DDI_SUCCESS; 13327c478bd9Sstevel@tonic-gate 13337c478bd9Sstevel@tonic-gate DBG(DBG_INTROPS, dip, "px_intr_ops: rdip=%s%d\n", 13347c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 13357c478bd9Sstevel@tonic-gate 13367c478bd9Sstevel@tonic-gate /* Process DDI_INTROP_SUPPORTED_TYPES request here */ 13377c478bd9Sstevel@tonic-gate if (intr_op == DDI_INTROP_SUPPORTED_TYPES) { 1338a54f81fbSanish *(int *)result = i_ddi_get_intx_nintrs(rdip) ? 13397c478bd9Sstevel@tonic-gate DDI_INTR_TYPE_FIXED : 0; 13407c478bd9Sstevel@tonic-gate 13417c478bd9Sstevel@tonic-gate if ((pci_msi_get_supported_type(rdip, 13427c478bd9Sstevel@tonic-gate &intr_types)) == DDI_SUCCESS) { 13437c478bd9Sstevel@tonic-gate /* 13447c478bd9Sstevel@tonic-gate * Double check supported interrupt types vs. 13457c478bd9Sstevel@tonic-gate * what the host bridge supports. 13467c478bd9Sstevel@tonic-gate */ 134720036fe5Segillett *(int *)result |= intr_types; 13487c478bd9Sstevel@tonic-gate } 13497c478bd9Sstevel@tonic-gate 13507c478bd9Sstevel@tonic-gate return (ret); 13517c478bd9Sstevel@tonic-gate } 13527c478bd9Sstevel@tonic-gate 13537c478bd9Sstevel@tonic-gate /* 13547c478bd9Sstevel@tonic-gate * PCI-E nexus driver supports fixed, MSI and MSI-X interrupts. 13557c478bd9Sstevel@tonic-gate * Return failure if interrupt type is not supported. 13567c478bd9Sstevel@tonic-gate */ 13577c478bd9Sstevel@tonic-gate switch (hdlp->ih_type) { 13587c478bd9Sstevel@tonic-gate case DDI_INTR_TYPE_FIXED: 13597c478bd9Sstevel@tonic-gate ret = px_intx_ops(dip, rdip, intr_op, hdlp, result); 13607c478bd9Sstevel@tonic-gate break; 13617c478bd9Sstevel@tonic-gate case DDI_INTR_TYPE_MSI: 13627c478bd9Sstevel@tonic-gate case DDI_INTR_TYPE_MSIX: 13637c478bd9Sstevel@tonic-gate ret = px_msix_ops(dip, rdip, intr_op, hdlp, result); 13647c478bd9Sstevel@tonic-gate break; 13657c478bd9Sstevel@tonic-gate default: 13667c478bd9Sstevel@tonic-gate ret = DDI_ENOTSUP; 13677c478bd9Sstevel@tonic-gate break; 13687c478bd9Sstevel@tonic-gate } 13697c478bd9Sstevel@tonic-gate 13707c478bd9Sstevel@tonic-gate return (ret); 13717c478bd9Sstevel@tonic-gate } 1372b65731f1Skini 1373055d7c80Scarlsonj static int 1374b65731f1Skini px_init_hotplug(px_t *px_p) 1375b65731f1Skini { 1376b65731f1Skini px_bus_range_t bus_range; 1377b65731f1Skini dev_info_t *dip; 1378b65731f1Skini pciehpc_regops_t regops; 1379b65731f1Skini 1380b65731f1Skini dip = px_p->px_dip; 1381b65731f1Skini 1382b65731f1Skini if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 1383b65731f1Skini "hotplug-capable") == 0) 1384b65731f1Skini return (DDI_FAILURE); 1385b65731f1Skini 1386b65731f1Skini /* 1387b65731f1Skini * Before initializing hotplug - open up bus range. The busra 1388b65731f1Skini * module will initialize its pool of bus numbers from this. 1389b65731f1Skini * "busra" will be the agent that keeps track of them during 1390b65731f1Skini * hotplug. Also, note, that busra will remove any bus numbers 1391b65731f1Skini * already in use from boot time. 1392b65731f1Skini */ 1393b65731f1Skini if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 1394b65731f1Skini "bus-range") == 0) { 1395b65731f1Skini cmn_err(CE_WARN, "%s%d: bus-range not found\n", 1396b65731f1Skini ddi_driver_name(dip), ddi_get_instance(dip)); 1397b65731f1Skini #ifdef DEBUG 1398b65731f1Skini bus_range.lo = 0x0; 1399b65731f1Skini bus_range.hi = 0xff; 1400b65731f1Skini 1401b65731f1Skini if (ndi_prop_update_int_array(DDI_DEV_T_NONE, 1402b65731f1Skini dip, "bus-range", (int *)&bus_range, 2) 1403b65731f1Skini != DDI_PROP_SUCCESS) { 1404b65731f1Skini return (DDI_FAILURE); 1405b65731f1Skini } 1406b65731f1Skini #else 1407b65731f1Skini return (DDI_FAILURE); 1408b65731f1Skini #endif 1409b65731f1Skini } 1410b65731f1Skini 1411b65731f1Skini if (px_lib_hotplug_init(dip, (void *)®ops) != DDI_SUCCESS) 1412b65731f1Skini return (DDI_FAILURE); 1413b65731f1Skini 1414b65731f1Skini if (pciehpc_init(dip, ®ops) != DDI_SUCCESS) { 1415b65731f1Skini px_lib_hotplug_uninit(dip); 1416b65731f1Skini return (DDI_FAILURE); 1417b65731f1Skini } 1418b65731f1Skini 1419b65731f1Skini if (pcihp_init(dip) != DDI_SUCCESS) { 1420b65731f1Skini (void) pciehpc_uninit(dip); 1421b65731f1Skini px_lib_hotplug_uninit(dip); 1422b65731f1Skini return (DDI_FAILURE); 1423b65731f1Skini } 1424b65731f1Skini 1425b65731f1Skini if (pcihp_get_cb_ops() != NULL) { 1426b65731f1Skini DBG(DBG_ATTACH, dip, "%s%d hotplug enabled", 1427b65731f1Skini ddi_driver_name(dip), ddi_get_instance(dip)); 1428b65731f1Skini px_p->px_dev_caps |= PX_HOTPLUG_CAPABLE; 1429b65731f1Skini } 1430b65731f1Skini 1431b65731f1Skini return (DDI_SUCCESS); 1432b65731f1Skini } 1433b65731f1Skini 1434055d7c80Scarlsonj static int 1435b65731f1Skini px_uninit_hotplug(dev_info_t *dip) 1436b65731f1Skini { 1437b65731f1Skini if (pcihp_uninit(dip) != DDI_SUCCESS) 1438b65731f1Skini return (DDI_FAILURE); 1439b65731f1Skini 1440b65731f1Skini if (pciehpc_uninit(dip) != DDI_SUCCESS) 1441b65731f1Skini return (DDI_FAILURE); 1442b65731f1Skini 1443b65731f1Skini px_lib_hotplug_uninit(dip); 1444b65731f1Skini 1445b65731f1Skini return (DDI_SUCCESS); 1446b65731f1Skini } 14470114761dSAlan Adamson, SD OSSD 14480114761dSAlan Adamson, SD OSSD static void 14490114761dSAlan Adamson, SD OSSD px_set_mps(px_t *px_p) 14500114761dSAlan Adamson, SD OSSD { 14510114761dSAlan Adamson, SD OSSD dev_info_t *dip; 14520114761dSAlan Adamson, SD OSSD pcie_bus_t *bus_p; 14530114761dSAlan Adamson, SD OSSD int max_supported; 14540114761dSAlan Adamson, SD OSSD 14550114761dSAlan Adamson, SD OSSD dip = px_p->px_dip; 14560114761dSAlan Adamson, SD OSSD bus_p = PCIE_DIP2BUS(dip); 14570114761dSAlan Adamson, SD OSSD 14580114761dSAlan Adamson, SD OSSD bus_p->bus_mps = -1; 14590114761dSAlan Adamson, SD OSSD 14600114761dSAlan Adamson, SD OSSD if (pcie_root_port(dip) == DDI_FAILURE) { 14610114761dSAlan Adamson, SD OSSD if (px_lib_get_root_complex_mps(px_p, dip, 14620114761dSAlan Adamson, SD OSSD &max_supported) < 0) { 14630114761dSAlan Adamson, SD OSSD 14640114761dSAlan Adamson, SD OSSD DBG(DBG_MPS, dip, "MPS: Can not get RC MPS\n"); 14650114761dSAlan Adamson, SD OSSD return; 14660114761dSAlan Adamson, SD OSSD } 14670114761dSAlan Adamson, SD OSSD 14680114761dSAlan Adamson, SD OSSD DBG(DBG_MPS, dip, "MPS: Root Complex MPS Cap of = %x\n", 14690114761dSAlan Adamson, SD OSSD max_supported); 14700114761dSAlan Adamson, SD OSSD 14710114761dSAlan Adamson, SD OSSD if (pcie_max_mps < max_supported) 14720114761dSAlan Adamson, SD OSSD max_supported = pcie_max_mps; 14730114761dSAlan Adamson, SD OSSD 14740114761dSAlan Adamson, SD OSSD (void) pcie_get_fabric_mps(dip, ddi_get_child(dip), 14750114761dSAlan Adamson, SD OSSD &max_supported); 14760114761dSAlan Adamson, SD OSSD 14770114761dSAlan Adamson, SD OSSD bus_p->bus_mps = max_supported; 14780114761dSAlan Adamson, SD OSSD 14790114761dSAlan Adamson, SD OSSD (void) px_lib_set_root_complex_mps(px_p, dip, bus_p->bus_mps); 14800114761dSAlan Adamson, SD OSSD 14810114761dSAlan Adamson, SD OSSD DBG(DBG_MPS, dip, "MPS: Root Complex MPS Set to = %x\n", 14820114761dSAlan Adamson, SD OSSD bus_p->bus_mps); 14830114761dSAlan Adamson, SD OSSD } 14840114761dSAlan Adamson, SD OSSD } 1485