17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 57aadd8d4Skini * Common Development and Distribution License (the "License"). 67aadd8d4Skini * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 22b65731f1Skini * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 267c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 277c478bd9Sstevel@tonic-gate 287c478bd9Sstevel@tonic-gate /* 297c478bd9Sstevel@tonic-gate * PCI Express nexus driver interface 307c478bd9Sstevel@tonic-gate */ 317c478bd9Sstevel@tonic-gate 327c478bd9Sstevel@tonic-gate #include <sys/types.h> 337c478bd9Sstevel@tonic-gate #include <sys/conf.h> /* nulldev */ 347c478bd9Sstevel@tonic-gate #include <sys/stat.h> /* devctl */ 357c478bd9Sstevel@tonic-gate #include <sys/kmem.h> 367c478bd9Sstevel@tonic-gate #include <sys/sunddi.h> 377c478bd9Sstevel@tonic-gate #include <sys/sunndi.h> 387c478bd9Sstevel@tonic-gate #include <sys/hotplug/pci/pcihp.h> 397c478bd9Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 407c478bd9Sstevel@tonic-gate #include <sys/ddi_subrdefs.h> 411a887b2eSjchu #include <sys/spl.h> 427c478bd9Sstevel@tonic-gate #include <sys/epm.h> 437c478bd9Sstevel@tonic-gate #include <sys/iommutsb.h> 44b65731f1Skini #include <sys/hotplug/pci/pcihp.h> 45b65731f1Skini #include <sys/hotplug/pci/pciehpc.h> 467c478bd9Sstevel@tonic-gate #include "px_obj.h" 4769cd775fSschwartz #include <sys/pci_tools.h> 48d4476ccbSschwartz #include "px_tools_ext.h" 497c478bd9Sstevel@tonic-gate #include "pcie_pwr.h" 507c478bd9Sstevel@tonic-gate 517c478bd9Sstevel@tonic-gate /*LINTLIBRARY*/ 527c478bd9Sstevel@tonic-gate 537c478bd9Sstevel@tonic-gate /* 547c478bd9Sstevel@tonic-gate * function prototypes for dev ops routines: 557c478bd9Sstevel@tonic-gate */ 567c478bd9Sstevel@tonic-gate static int px_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 577c478bd9Sstevel@tonic-gate static int px_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 587c478bd9Sstevel@tonic-gate static int px_info(dev_info_t *dip, ddi_info_cmd_t infocmd, 597c478bd9Sstevel@tonic-gate void *arg, void **result); 60*01689544Sjchu static int px_cb_attach(px_t *); 61*01689544Sjchu static void px_cb_detach(px_t *); 627c478bd9Sstevel@tonic-gate static int px_pwr_setup(dev_info_t *dip); 637c478bd9Sstevel@tonic-gate static void px_pwr_teardown(dev_info_t *dip); 647c478bd9Sstevel@tonic-gate 657c478bd9Sstevel@tonic-gate /* 66b65731f1Skini * function prototypes for hotplug routines: 67b65731f1Skini */ 68b65731f1Skini static uint_t px_init_hotplug(px_t *px_p); 69b65731f1Skini static uint_t px_uninit_hotplug(dev_info_t *dip); 70b65731f1Skini 71b65731f1Skini /* 727c478bd9Sstevel@tonic-gate * bus ops and dev ops structures: 737c478bd9Sstevel@tonic-gate */ 747c478bd9Sstevel@tonic-gate static struct bus_ops px_bus_ops = { 757c478bd9Sstevel@tonic-gate BUSO_REV, 767c478bd9Sstevel@tonic-gate px_map, 777c478bd9Sstevel@tonic-gate 0, 787c478bd9Sstevel@tonic-gate 0, 797c478bd9Sstevel@tonic-gate 0, 807c478bd9Sstevel@tonic-gate i_ddi_map_fault, 817c478bd9Sstevel@tonic-gate px_dma_setup, 827c478bd9Sstevel@tonic-gate px_dma_allochdl, 837c478bd9Sstevel@tonic-gate px_dma_freehdl, 847c478bd9Sstevel@tonic-gate px_dma_bindhdl, 857c478bd9Sstevel@tonic-gate px_dma_unbindhdl, 867c478bd9Sstevel@tonic-gate px_lib_dma_sync, 877c478bd9Sstevel@tonic-gate px_dma_win, 887c478bd9Sstevel@tonic-gate px_dma_ctlops, 897c478bd9Sstevel@tonic-gate px_ctlops, 907c478bd9Sstevel@tonic-gate ddi_bus_prop_op, 917c478bd9Sstevel@tonic-gate ndi_busop_get_eventcookie, 927c478bd9Sstevel@tonic-gate ndi_busop_add_eventcall, 937c478bd9Sstevel@tonic-gate ndi_busop_remove_eventcall, 947c478bd9Sstevel@tonic-gate ndi_post_event, 957c478bd9Sstevel@tonic-gate NULL, 967c478bd9Sstevel@tonic-gate NULL, /* (*bus_config)(); */ 977c478bd9Sstevel@tonic-gate NULL, /* (*bus_unconfig)(); */ 987c478bd9Sstevel@tonic-gate px_fm_init_child, /* (*bus_fm_init)(); */ 997c478bd9Sstevel@tonic-gate NULL, /* (*bus_fm_fini)(); */ 100f8d2de6bSjchu px_bus_enter, /* (*bus_fm_access_enter)(); */ 101f8d2de6bSjchu px_bus_exit, /* (*bus_fm_access_fini)(); */ 1027c478bd9Sstevel@tonic-gate pcie_bus_power, /* (*bus_power)(); */ 1037c478bd9Sstevel@tonic-gate px_intr_ops /* (*bus_intr_op)(); */ 1047c478bd9Sstevel@tonic-gate }; 1057c478bd9Sstevel@tonic-gate 1067c478bd9Sstevel@tonic-gate extern struct cb_ops px_cb_ops; 1077c478bd9Sstevel@tonic-gate 1087c478bd9Sstevel@tonic-gate static struct dev_ops px_ops = { 1097c478bd9Sstevel@tonic-gate DEVO_REV, 1107c478bd9Sstevel@tonic-gate 0, 1117c478bd9Sstevel@tonic-gate px_info, 1127c478bd9Sstevel@tonic-gate nulldev, 1137c478bd9Sstevel@tonic-gate 0, 1147c478bd9Sstevel@tonic-gate px_attach, 1157c478bd9Sstevel@tonic-gate px_detach, 1167c478bd9Sstevel@tonic-gate nodev, 1177c478bd9Sstevel@tonic-gate &px_cb_ops, 1187c478bd9Sstevel@tonic-gate &px_bus_ops, 1197c478bd9Sstevel@tonic-gate nulldev 1207c478bd9Sstevel@tonic-gate }; 1217c478bd9Sstevel@tonic-gate 1227c478bd9Sstevel@tonic-gate /* 1237c478bd9Sstevel@tonic-gate * module definitions: 1247c478bd9Sstevel@tonic-gate */ 1257c478bd9Sstevel@tonic-gate #include <sys/modctl.h> 1267c478bd9Sstevel@tonic-gate extern struct mod_ops mod_driverops; 1277c478bd9Sstevel@tonic-gate 1287c478bd9Sstevel@tonic-gate static struct modldrv modldrv = { 1297c478bd9Sstevel@tonic-gate &mod_driverops, /* Type of module - driver */ 1307c478bd9Sstevel@tonic-gate "PCI Express nexus driver %I%", /* Name of module. */ 1317c478bd9Sstevel@tonic-gate &px_ops, /* driver ops */ 1327c478bd9Sstevel@tonic-gate }; 1337c478bd9Sstevel@tonic-gate 1347c478bd9Sstevel@tonic-gate static struct modlinkage modlinkage = { 1357c478bd9Sstevel@tonic-gate MODREV_1, (void *)&modldrv, NULL 1367c478bd9Sstevel@tonic-gate }; 1377c478bd9Sstevel@tonic-gate 1387c478bd9Sstevel@tonic-gate /* driver soft state */ 1397c478bd9Sstevel@tonic-gate void *px_state_p; 1407c478bd9Sstevel@tonic-gate 1417c478bd9Sstevel@tonic-gate int 1427c478bd9Sstevel@tonic-gate _init(void) 1437c478bd9Sstevel@tonic-gate { 1447c478bd9Sstevel@tonic-gate int e; 1457c478bd9Sstevel@tonic-gate 1467c478bd9Sstevel@tonic-gate /* 1477c478bd9Sstevel@tonic-gate * Initialize per-px bus soft state pointer. 1487c478bd9Sstevel@tonic-gate */ 1497c478bd9Sstevel@tonic-gate e = ddi_soft_state_init(&px_state_p, sizeof (px_t), 1); 1507c478bd9Sstevel@tonic-gate if (e != DDI_SUCCESS) 1517c478bd9Sstevel@tonic-gate return (e); 1527c478bd9Sstevel@tonic-gate 1537c478bd9Sstevel@tonic-gate /* 1547c478bd9Sstevel@tonic-gate * Install the module. 1557c478bd9Sstevel@tonic-gate */ 1567c478bd9Sstevel@tonic-gate e = mod_install(&modlinkage); 1577c478bd9Sstevel@tonic-gate if (e != DDI_SUCCESS) 1587c478bd9Sstevel@tonic-gate ddi_soft_state_fini(&px_state_p); 1597c478bd9Sstevel@tonic-gate return (e); 1607c478bd9Sstevel@tonic-gate } 1617c478bd9Sstevel@tonic-gate 1627c478bd9Sstevel@tonic-gate int 1637c478bd9Sstevel@tonic-gate _fini(void) 1647c478bd9Sstevel@tonic-gate { 1657c478bd9Sstevel@tonic-gate int e; 1667c478bd9Sstevel@tonic-gate 1677c478bd9Sstevel@tonic-gate /* 1687c478bd9Sstevel@tonic-gate * Remove the module. 1697c478bd9Sstevel@tonic-gate */ 1707c478bd9Sstevel@tonic-gate e = mod_remove(&modlinkage); 1717c478bd9Sstevel@tonic-gate if (e != DDI_SUCCESS) 1727c478bd9Sstevel@tonic-gate return (e); 1737c478bd9Sstevel@tonic-gate 1747c478bd9Sstevel@tonic-gate /* Free px soft state */ 1757c478bd9Sstevel@tonic-gate ddi_soft_state_fini(&px_state_p); 1767c478bd9Sstevel@tonic-gate 1777c478bd9Sstevel@tonic-gate return (e); 1787c478bd9Sstevel@tonic-gate } 1797c478bd9Sstevel@tonic-gate 1807c478bd9Sstevel@tonic-gate int 1817c478bd9Sstevel@tonic-gate _info(struct modinfo *modinfop) 1827c478bd9Sstevel@tonic-gate { 1837c478bd9Sstevel@tonic-gate return (mod_info(&modlinkage, modinfop)); 1847c478bd9Sstevel@tonic-gate } 1857c478bd9Sstevel@tonic-gate 1867c478bd9Sstevel@tonic-gate /* ARGSUSED */ 1877c478bd9Sstevel@tonic-gate static int 1887c478bd9Sstevel@tonic-gate px_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result) 1897c478bd9Sstevel@tonic-gate { 1907c478bd9Sstevel@tonic-gate int instance = getminor((dev_t)arg); 1917c478bd9Sstevel@tonic-gate px_t *px_p = INST_TO_STATE(instance); 1927c478bd9Sstevel@tonic-gate 1937c478bd9Sstevel@tonic-gate /* 1947c478bd9Sstevel@tonic-gate * Allow hotplug to deal with ones it manages 1957c478bd9Sstevel@tonic-gate * Hot Plug will be done later. 1967c478bd9Sstevel@tonic-gate */ 197b65731f1Skini if (px_p && (px_p->px_dev_caps & PX_HOTPLUG_CAPABLE)) 1987c478bd9Sstevel@tonic-gate return (pcihp_info(dip, infocmd, arg, result)); 1997c478bd9Sstevel@tonic-gate 2007c478bd9Sstevel@tonic-gate /* non-hotplug or not attached */ 2017c478bd9Sstevel@tonic-gate switch (infocmd) { 2027c478bd9Sstevel@tonic-gate case DDI_INFO_DEVT2INSTANCE: 203b40cec45Skrishnae *result = (void *)(intptr_t)instance; 2047c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 2057c478bd9Sstevel@tonic-gate 2067c478bd9Sstevel@tonic-gate case DDI_INFO_DEVT2DEVINFO: 2077c478bd9Sstevel@tonic-gate if (px_p == NULL) 2087c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 2097c478bd9Sstevel@tonic-gate *result = (void *)px_p->px_dip; 2107c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 2117c478bd9Sstevel@tonic-gate 2127c478bd9Sstevel@tonic-gate default: 2137c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 2147c478bd9Sstevel@tonic-gate } 2157c478bd9Sstevel@tonic-gate } 2167c478bd9Sstevel@tonic-gate 2177c478bd9Sstevel@tonic-gate /* device driver entry points */ 2187c478bd9Sstevel@tonic-gate /* 2197c478bd9Sstevel@tonic-gate * attach entry point: 2207c478bd9Sstevel@tonic-gate */ 2217c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 2227c478bd9Sstevel@tonic-gate static int 2237c478bd9Sstevel@tonic-gate px_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 2247c478bd9Sstevel@tonic-gate { 2257c478bd9Sstevel@tonic-gate px_t *px_p; /* per bus state pointer */ 2267c478bd9Sstevel@tonic-gate int instance = DIP_TO_INST(dip); 2277c478bd9Sstevel@tonic-gate int ret = DDI_SUCCESS; 2287c478bd9Sstevel@tonic-gate devhandle_t dev_hdl = NULL; 2297c478bd9Sstevel@tonic-gate 2307c478bd9Sstevel@tonic-gate switch (cmd) { 2317c478bd9Sstevel@tonic-gate case DDI_ATTACH: 2327c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "DDI_ATTACH\n"); 2337c478bd9Sstevel@tonic-gate 2347c478bd9Sstevel@tonic-gate /* 2357c478bd9Sstevel@tonic-gate * Allocate and get the per-px soft state structure. 2367c478bd9Sstevel@tonic-gate */ 2377c478bd9Sstevel@tonic-gate if (ddi_soft_state_zalloc(px_state_p, instance) 2387c478bd9Sstevel@tonic-gate != DDI_SUCCESS) { 2397c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d: can't allocate px state", 2407c478bd9Sstevel@tonic-gate ddi_driver_name(dip), instance); 2417c478bd9Sstevel@tonic-gate goto err_bad_px_softstate; 2427c478bd9Sstevel@tonic-gate } 2437c478bd9Sstevel@tonic-gate px_p = INST_TO_STATE(instance); 2447c478bd9Sstevel@tonic-gate px_p->px_dip = dip; 2457c478bd9Sstevel@tonic-gate mutex_init(&px_p->px_mutex, NULL, MUTEX_DRIVER, NULL); 2467c478bd9Sstevel@tonic-gate px_p->px_soft_state = PX_SOFT_STATE_CLOSED; 2477c478bd9Sstevel@tonic-gate px_p->px_open_count = 0; 2487c478bd9Sstevel@tonic-gate 249b65731f1Skini (void) ddi_prop_update_string(DDI_DEV_T_NONE, dip, 250b65731f1Skini "device_type", "pciex"); 2517c478bd9Sstevel@tonic-gate /* 2527c478bd9Sstevel@tonic-gate * Get key properties of the pci bridge node and 2537c478bd9Sstevel@tonic-gate * determine it's type (psycho, schizo, etc ...). 2547c478bd9Sstevel@tonic-gate */ 2557c478bd9Sstevel@tonic-gate if (px_get_props(px_p, dip) == DDI_FAILURE) 2567c478bd9Sstevel@tonic-gate goto err_bad_px_prop; 2577c478bd9Sstevel@tonic-gate 2587c478bd9Sstevel@tonic-gate if ((px_fm_attach(px_p)) != DDI_SUCCESS) 2597c478bd9Sstevel@tonic-gate goto err_bad_fm; 2607c478bd9Sstevel@tonic-gate 2617c478bd9Sstevel@tonic-gate if (px_lib_dev_init(dip, &dev_hdl) != DDI_SUCCESS) 2627c478bd9Sstevel@tonic-gate goto err_bad_dev_init; 2637c478bd9Sstevel@tonic-gate 2647c478bd9Sstevel@tonic-gate /* Initilize device handle */ 2657c478bd9Sstevel@tonic-gate px_p->px_dev_hdl = dev_hdl; 2667c478bd9Sstevel@tonic-gate 2677c478bd9Sstevel@tonic-gate /* 2687c478bd9Sstevel@tonic-gate * Initialize interrupt block. Note that this 2697c478bd9Sstevel@tonic-gate * initialize error handling for the PEC as well. 2707c478bd9Sstevel@tonic-gate */ 2717c478bd9Sstevel@tonic-gate if ((ret = px_ib_attach(px_p)) != DDI_SUCCESS) 2727c478bd9Sstevel@tonic-gate goto err_bad_ib; 2737c478bd9Sstevel@tonic-gate 2747c478bd9Sstevel@tonic-gate if (px_cb_attach(px_p) != DDI_SUCCESS) 2757c478bd9Sstevel@tonic-gate goto err_bad_cb; 2767c478bd9Sstevel@tonic-gate 2777c478bd9Sstevel@tonic-gate /* 2787c478bd9Sstevel@tonic-gate * Start creating the modules. 2797c478bd9Sstevel@tonic-gate * Note that attach() routines should 2807c478bd9Sstevel@tonic-gate * register and enable their own interrupts. 2817c478bd9Sstevel@tonic-gate */ 2827c478bd9Sstevel@tonic-gate 2837c478bd9Sstevel@tonic-gate if ((px_mmu_attach(px_p)) != DDI_SUCCESS) 2847c478bd9Sstevel@tonic-gate goto err_bad_mmu; 2857c478bd9Sstevel@tonic-gate 2867c478bd9Sstevel@tonic-gate if ((px_msiq_attach(px_p)) != DDI_SUCCESS) 2877c478bd9Sstevel@tonic-gate goto err_bad_msiq; 2887c478bd9Sstevel@tonic-gate 2897c478bd9Sstevel@tonic-gate if ((px_msi_attach(px_p)) != DDI_SUCCESS) 2907c478bd9Sstevel@tonic-gate goto err_bad_msi; 2917c478bd9Sstevel@tonic-gate 2927c478bd9Sstevel@tonic-gate if ((px_pec_attach(px_p)) != DDI_SUCCESS) 2937c478bd9Sstevel@tonic-gate goto err_bad_pec; 2947c478bd9Sstevel@tonic-gate 2957c478bd9Sstevel@tonic-gate if ((px_dma_attach(px_p)) != DDI_SUCCESS) 2967c478bd9Sstevel@tonic-gate goto err_bad_pec; /* nothing to uninitialize on DMA */ 2977c478bd9Sstevel@tonic-gate 2987c478bd9Sstevel@tonic-gate /* 2997c478bd9Sstevel@tonic-gate * All of the error handlers have been registered 3007c478bd9Sstevel@tonic-gate * by now so it's time to activate the interrupt. 3017c478bd9Sstevel@tonic-gate */ 302f8d2de6bSjchu if ((ret = px_err_add_intr(&px_p->px_fault)) != DDI_SUCCESS) 3037c478bd9Sstevel@tonic-gate goto err_bad_pec_add_intr; 3047c478bd9Sstevel@tonic-gate 305b65731f1Skini (void) px_init_hotplug(px_p); 306b65731f1Skini 3077c478bd9Sstevel@tonic-gate /* 3087c478bd9Sstevel@tonic-gate * Create the "devctl" node for hotplug and pcitool support. 3097c478bd9Sstevel@tonic-gate * For non-hotplug bus, we still need ":devctl" to 3107c478bd9Sstevel@tonic-gate * support DEVCTL_DEVICE_* and DEVCTL_BUS_* ioctls. 3117c478bd9Sstevel@tonic-gate */ 3127c478bd9Sstevel@tonic-gate if (ddi_create_minor_node(dip, "devctl", S_IFCHR, 3137c478bd9Sstevel@tonic-gate PCIHP_AP_MINOR_NUM(instance, PCIHP_DEVCTL_MINOR), 3147c478bd9Sstevel@tonic-gate DDI_NT_NEXUS, 0) != DDI_SUCCESS) { 3157c478bd9Sstevel@tonic-gate goto err_bad_devctl_node; 3167c478bd9Sstevel@tonic-gate } 31769cd775fSschwartz 31869cd775fSschwartz if (pxtool_init(dip) != DDI_SUCCESS) 31969cd775fSschwartz goto err_bad_pcitool_node; 32069cd775fSschwartz 3217c478bd9Sstevel@tonic-gate /* 3227c478bd9Sstevel@tonic-gate * power management setup. Even if it fails, attach will 3237c478bd9Sstevel@tonic-gate * succeed as this is a optional feature. Since we are 3247c478bd9Sstevel@tonic-gate * always at full power, this is not critical. 3257c478bd9Sstevel@tonic-gate */ 3267c478bd9Sstevel@tonic-gate if (pwr_common_setup(dip) != DDI_SUCCESS) { 3277c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "pwr_common_setup failed\n"); 3287c478bd9Sstevel@tonic-gate } else if (px_pwr_setup(dip) != DDI_SUCCESS) { 3297c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "px_pwr_setup failed \n"); 3307c478bd9Sstevel@tonic-gate pwr_common_teardown(dip); 3317c478bd9Sstevel@tonic-gate } 3327c478bd9Sstevel@tonic-gate 333817a6df8Sjchu /* 334817a6df8Sjchu * add cpr callback 335817a6df8Sjchu */ 336817a6df8Sjchu px_cpr_add_callb(px_p); 337817a6df8Sjchu 3387c478bd9Sstevel@tonic-gate ddi_report_dev(dip); 3397c478bd9Sstevel@tonic-gate 3407c478bd9Sstevel@tonic-gate px_p->px_state = PX_ATTACHED; 3417c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "attach success\n"); 3427c478bd9Sstevel@tonic-gate break; 3437c478bd9Sstevel@tonic-gate 34469cd775fSschwartz err_bad_pcitool_node: 34569cd775fSschwartz ddi_remove_minor_node(dip, "devctl"); 3467c478bd9Sstevel@tonic-gate err_bad_devctl_node: 347f8d2de6bSjchu px_err_rem_intr(&px_p->px_fault); 3487c478bd9Sstevel@tonic-gate err_bad_pec_add_intr: 3497c478bd9Sstevel@tonic-gate px_pec_detach(px_p); 3507c478bd9Sstevel@tonic-gate err_bad_pec: 3517c478bd9Sstevel@tonic-gate px_msi_detach(px_p); 3527c478bd9Sstevel@tonic-gate err_bad_msi: 3537c478bd9Sstevel@tonic-gate px_msiq_detach(px_p); 3547c478bd9Sstevel@tonic-gate err_bad_msiq: 3557c478bd9Sstevel@tonic-gate px_mmu_detach(px_p); 3567c478bd9Sstevel@tonic-gate err_bad_mmu: 3577c478bd9Sstevel@tonic-gate px_cb_detach(px_p); 3587c478bd9Sstevel@tonic-gate err_bad_cb: 3597c478bd9Sstevel@tonic-gate px_ib_detach(px_p); 3607c478bd9Sstevel@tonic-gate err_bad_ib: 3617c478bd9Sstevel@tonic-gate (void) px_lib_dev_fini(dip); 3627c478bd9Sstevel@tonic-gate err_bad_dev_init: 3637c478bd9Sstevel@tonic-gate px_fm_detach(px_p); 3647c478bd9Sstevel@tonic-gate err_bad_fm: 3657c478bd9Sstevel@tonic-gate px_free_props(px_p); 3667c478bd9Sstevel@tonic-gate err_bad_px_prop: 3677c478bd9Sstevel@tonic-gate mutex_destroy(&px_p->px_mutex); 3687c478bd9Sstevel@tonic-gate ddi_soft_state_free(px_state_p, instance); 3697c478bd9Sstevel@tonic-gate err_bad_px_softstate: 3707c478bd9Sstevel@tonic-gate ret = DDI_FAILURE; 3717c478bd9Sstevel@tonic-gate break; 3727c478bd9Sstevel@tonic-gate 3737c478bd9Sstevel@tonic-gate case DDI_RESUME: 3747c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "DDI_RESUME\n"); 3757c478bd9Sstevel@tonic-gate 3767c478bd9Sstevel@tonic-gate px_p = INST_TO_STATE(instance); 3777c478bd9Sstevel@tonic-gate 3787c478bd9Sstevel@tonic-gate mutex_enter(&px_p->px_mutex); 3797c478bd9Sstevel@tonic-gate 3807c478bd9Sstevel@tonic-gate /* suspend might have not succeeded */ 3817c478bd9Sstevel@tonic-gate if (px_p->px_state != PX_SUSPENDED) { 3827c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, px_p->px_dip, 3837c478bd9Sstevel@tonic-gate "instance NOT suspended\n"); 3847c478bd9Sstevel@tonic-gate ret = DDI_FAILURE; 3857c478bd9Sstevel@tonic-gate break; 3867c478bd9Sstevel@tonic-gate } 3877c478bd9Sstevel@tonic-gate 3887c478bd9Sstevel@tonic-gate px_lib_resume(dip); 3897c478bd9Sstevel@tonic-gate (void) pcie_pwr_resume(dip); 3907c478bd9Sstevel@tonic-gate px_p->px_state = PX_ATTACHED; 3917c478bd9Sstevel@tonic-gate 3927c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 3937c478bd9Sstevel@tonic-gate 3947c478bd9Sstevel@tonic-gate break; 3957c478bd9Sstevel@tonic-gate default: 3967c478bd9Sstevel@tonic-gate DBG(DBG_ATTACH, dip, "unsupported attach op\n"); 3977c478bd9Sstevel@tonic-gate ret = DDI_FAILURE; 3987c478bd9Sstevel@tonic-gate break; 3997c478bd9Sstevel@tonic-gate } 4007c478bd9Sstevel@tonic-gate 4017c478bd9Sstevel@tonic-gate return (ret); 4027c478bd9Sstevel@tonic-gate } 4037c478bd9Sstevel@tonic-gate 4047c478bd9Sstevel@tonic-gate /* 4057c478bd9Sstevel@tonic-gate * detach entry point: 4067c478bd9Sstevel@tonic-gate */ 4077c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 4087c478bd9Sstevel@tonic-gate static int 4097c478bd9Sstevel@tonic-gate px_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 4107c478bd9Sstevel@tonic-gate { 4117c478bd9Sstevel@tonic-gate int instance = ddi_get_instance(dip); 4127c478bd9Sstevel@tonic-gate px_t *px_p = INST_TO_STATE(instance); 4137c478bd9Sstevel@tonic-gate int ret; 4147c478bd9Sstevel@tonic-gate 4157c478bd9Sstevel@tonic-gate /* 4167c478bd9Sstevel@tonic-gate * Make sure we are currently attached 4177c478bd9Sstevel@tonic-gate */ 4187c478bd9Sstevel@tonic-gate if (px_p->px_state != PX_ATTACHED) { 419*01689544Sjchu DBG(DBG_DETACH, dip, "Instance not attached\n"); 4207c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 4217c478bd9Sstevel@tonic-gate } 4227c478bd9Sstevel@tonic-gate 4237c478bd9Sstevel@tonic-gate mutex_enter(&px_p->px_mutex); 4247c478bd9Sstevel@tonic-gate 4257c478bd9Sstevel@tonic-gate switch (cmd) { 4267c478bd9Sstevel@tonic-gate case DDI_DETACH: 4277c478bd9Sstevel@tonic-gate DBG(DBG_DETACH, dip, "DDI_DETACH\n"); 4287c478bd9Sstevel@tonic-gate 429817a6df8Sjchu /* 430817a6df8Sjchu * remove cpr callback 431817a6df8Sjchu */ 432817a6df8Sjchu px_cpr_rem_callb(px_p); 433817a6df8Sjchu 434b65731f1Skini if (px_p->px_dev_caps & PX_HOTPLUG_CAPABLE) 435b65731f1Skini if (px_uninit_hotplug(dip) != DDI_SUCCESS) { 4367c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4377c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 4387c478bd9Sstevel@tonic-gate } 4397c478bd9Sstevel@tonic-gate 4407c478bd9Sstevel@tonic-gate /* 4417c478bd9Sstevel@tonic-gate * things which used to be done in obj_destroy 4427c478bd9Sstevel@tonic-gate * are now in-lined here. 4437c478bd9Sstevel@tonic-gate */ 4447c478bd9Sstevel@tonic-gate 4457c478bd9Sstevel@tonic-gate px_p->px_state = PX_DETACHED; 4467c478bd9Sstevel@tonic-gate 44769cd775fSschwartz pxtool_uninit(dip); 44869cd775fSschwartz 4497c478bd9Sstevel@tonic-gate ddi_remove_minor_node(dip, "devctl"); 450f8d2de6bSjchu px_err_rem_intr(&px_p->px_fault); 4517c478bd9Sstevel@tonic-gate px_pec_detach(px_p); 4529c75c6bfSgovinda px_pwr_teardown(dip); 4539c75c6bfSgovinda pwr_common_teardown(dip); 4547c478bd9Sstevel@tonic-gate px_msi_detach(px_p); 4557c478bd9Sstevel@tonic-gate px_msiq_detach(px_p); 4567c478bd9Sstevel@tonic-gate px_mmu_detach(px_p); 4577c478bd9Sstevel@tonic-gate px_cb_detach(px_p); 4587c478bd9Sstevel@tonic-gate px_ib_detach(px_p); 4597c478bd9Sstevel@tonic-gate (void) px_lib_dev_fini(dip); 4607c478bd9Sstevel@tonic-gate px_fm_detach(px_p); 4617c478bd9Sstevel@tonic-gate 4627c478bd9Sstevel@tonic-gate /* 4637c478bd9Sstevel@tonic-gate * Free the px soft state structure and the rest of the 4647c478bd9Sstevel@tonic-gate * resources it's using. 4657c478bd9Sstevel@tonic-gate */ 4667c478bd9Sstevel@tonic-gate px_free_props(px_p); 4677c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4687c478bd9Sstevel@tonic-gate mutex_destroy(&px_p->px_mutex); 4697c478bd9Sstevel@tonic-gate 4707c478bd9Sstevel@tonic-gate /* Free the interrupt-priorities prop if we created it. */ { 4717c478bd9Sstevel@tonic-gate int len; 4727c478bd9Sstevel@tonic-gate 4737c478bd9Sstevel@tonic-gate if (ddi_getproplen(DDI_DEV_T_ANY, dip, 4747c478bd9Sstevel@tonic-gate DDI_PROP_NOTPROM | DDI_PROP_DONTPASS, 4757c478bd9Sstevel@tonic-gate "interrupt-priorities", &len) == DDI_PROP_SUCCESS) 4767c478bd9Sstevel@tonic-gate (void) ddi_prop_remove(DDI_DEV_T_NONE, dip, 4777c478bd9Sstevel@tonic-gate "interrupt-priorities"); 4787c478bd9Sstevel@tonic-gate } 4797c478bd9Sstevel@tonic-gate 4807c478bd9Sstevel@tonic-gate px_p->px_dev_hdl = NULL; 481dabea0dbSschwartz ddi_soft_state_free(px_state_p, instance); 4827c478bd9Sstevel@tonic-gate 4837c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 4847c478bd9Sstevel@tonic-gate 4857c478bd9Sstevel@tonic-gate case DDI_SUSPEND: 4867c478bd9Sstevel@tonic-gate if (pcie_pwr_suspend(dip) != DDI_SUCCESS) { 4877c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4887c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 4897c478bd9Sstevel@tonic-gate } 4907c478bd9Sstevel@tonic-gate if ((ret = px_lib_suspend(dip)) == DDI_SUCCESS) 4917c478bd9Sstevel@tonic-gate px_p->px_state = PX_SUSPENDED; 4927c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4937c478bd9Sstevel@tonic-gate 4947c478bd9Sstevel@tonic-gate return (ret); 4957c478bd9Sstevel@tonic-gate 4967c478bd9Sstevel@tonic-gate default: 4977c478bd9Sstevel@tonic-gate DBG(DBG_DETACH, dip, "unsupported detach op\n"); 4987c478bd9Sstevel@tonic-gate mutex_exit(&px_p->px_mutex); 4997c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 5007c478bd9Sstevel@tonic-gate } 5017c478bd9Sstevel@tonic-gate } 5027c478bd9Sstevel@tonic-gate 503*01689544Sjchu int 504*01689544Sjchu px_cb_attach(px_t *px_p) 505*01689544Sjchu { 506*01689544Sjchu px_fault_t *fault_p = &px_p->px_cb_fault; 507*01689544Sjchu dev_info_t *dip = px_p->px_dip; 508*01689544Sjchu sysino_t sysino; 509*01689544Sjchu 510*01689544Sjchu if (px_lib_intr_devino_to_sysino(dip, 511*01689544Sjchu px_p->px_inos[PX_INTR_XBC], &sysino) != DDI_SUCCESS) 512*01689544Sjchu return (DDI_FAILURE); 513*01689544Sjchu 514*01689544Sjchu fault_p->px_fh_dip = dip; 515*01689544Sjchu fault_p->px_fh_sysino = sysino; 516*01689544Sjchu fault_p->px_err_func = px_err_cb_intr; 517*01689544Sjchu fault_p->px_intr_ino = px_p->px_inos[PX_INTR_XBC]; 518*01689544Sjchu 519*01689544Sjchu return (px_cb_add_intr(fault_p)); 520*01689544Sjchu } 521*01689544Sjchu 522*01689544Sjchu void 523*01689544Sjchu px_cb_detach(px_t *px_p) 524*01689544Sjchu { 525*01689544Sjchu px_cb_rem_intr(&px_p->px_cb_fault); 526*01689544Sjchu } 527*01689544Sjchu 5287c478bd9Sstevel@tonic-gate /* 5297c478bd9Sstevel@tonic-gate * power management related initialization specific to px 5307c478bd9Sstevel@tonic-gate * called by px_attach() 5317c478bd9Sstevel@tonic-gate */ 5327c478bd9Sstevel@tonic-gate static int 5337c478bd9Sstevel@tonic-gate px_pwr_setup(dev_info_t *dip) 5347c478bd9Sstevel@tonic-gate { 5357c478bd9Sstevel@tonic-gate pcie_pwr_t *pwr_p; 5361a887b2eSjchu int instance = ddi_get_instance(dip); 5371a887b2eSjchu px_t *px_p = INST_TO_STATE(instance); 5387c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t hdl; 5397c478bd9Sstevel@tonic-gate 5407c478bd9Sstevel@tonic-gate ASSERT(PCIE_PMINFO(dip)); 5417c478bd9Sstevel@tonic-gate pwr_p = PCIE_NEXUS_PMINFO(dip); 5427c478bd9Sstevel@tonic-gate ASSERT(pwr_p); 5437c478bd9Sstevel@tonic-gate 5447c478bd9Sstevel@tonic-gate /* 5457c478bd9Sstevel@tonic-gate * indicate support LDI (Layered Driver Interface) 5467c478bd9Sstevel@tonic-gate * Create the property, if it is not already there 5477c478bd9Sstevel@tonic-gate */ 5487c478bd9Sstevel@tonic-gate if (!ddi_prop_exists(DDI_DEV_T_NONE, dip, DDI_PROP_DONTPASS, 5497c478bd9Sstevel@tonic-gate DDI_KERNEL_IOCTL)) { 5507c478bd9Sstevel@tonic-gate if (ddi_prop_create(DDI_DEV_T_NONE, dip, DDI_PROP_CANSLEEP, 5517c478bd9Sstevel@tonic-gate DDI_KERNEL_IOCTL, NULL, 0) != DDI_PROP_SUCCESS) { 5527c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "can't create kernel ioctl prop\n"); 5537c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 5547c478bd9Sstevel@tonic-gate } 5557c478bd9Sstevel@tonic-gate } 5567c478bd9Sstevel@tonic-gate /* No support for device PM. We are always at full power */ 5577c478bd9Sstevel@tonic-gate pwr_p->pwr_func_lvl = PM_LEVEL_D0; 5587c478bd9Sstevel@tonic-gate 5591a887b2eSjchu mutex_init(&px_p->px_l23ready_lock, NULL, MUTEX_DRIVER, 560a195726fSgovinda DDI_INTR_PRI(px_pwr_pil)); 5611a887b2eSjchu cv_init(&px_p->px_l23ready_cv, NULL, CV_DRIVER, NULL); 5621a887b2eSjchu 563b65731f1Skini 564b65731f1Skini 5657c478bd9Sstevel@tonic-gate /* Initilize handle */ 5661a887b2eSjchu hdl.ih_cb_arg1 = px_p; 5671a887b2eSjchu hdl.ih_cb_arg2 = NULL; 5687c478bd9Sstevel@tonic-gate hdl.ih_ver = DDI_INTR_VERSION; 5697c478bd9Sstevel@tonic-gate hdl.ih_state = DDI_IHDL_STATE_ALLOC; 5707c478bd9Sstevel@tonic-gate hdl.ih_dip = dip; 5717c478bd9Sstevel@tonic-gate hdl.ih_inum = 0; 5727c478bd9Sstevel@tonic-gate hdl.ih_pri = px_pwr_pil; 5737c478bd9Sstevel@tonic-gate 5747c478bd9Sstevel@tonic-gate /* Add PME_TO_ACK message handler */ 5751a887b2eSjchu hdl.ih_cb_func = (ddi_intr_handler_t *)px_pmeq_intr; 5767c478bd9Sstevel@tonic-gate if (px_add_msiq_intr(dip, dip, &hdl, MSG_REC, 5771a887b2eSjchu (msgcode_t)PCIE_PME_ACK_MSG, &px_p->px_pm_msiq_id) != DDI_SUCCESS) { 5781a887b2eSjchu DBG(DBG_PWR, dip, "px_pwr_setup: couldn't add " 5791a887b2eSjchu " PME_TO_ACK intr\n"); 580f9721e07Sjchu goto pwr_setup_err1; 5817c478bd9Sstevel@tonic-gate } 5821a887b2eSjchu px_lib_msg_setmsiq(dip, PCIE_PME_ACK_MSG, px_p->px_pm_msiq_id); 5837c478bd9Sstevel@tonic-gate px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_VALID); 5847c478bd9Sstevel@tonic-gate 58536fe4a92Segillett if (px_ib_update_intr_state(px_p, px_p->px_dip, hdl.ih_inum, 58636fe4a92Segillett px_msiqid_to_devino(px_p, px_p->px_pm_msiq_id), 58736fe4a92Segillett PX_INTR_STATE_ENABLE, MSG_REC, PCIE_PME_ACK_MSG) != DDI_SUCCESS) { 58836fe4a92Segillett DBG(DBG_PWR, dip, "px_pwr_setup: PME_TO_ACK update interrupt" 58936fe4a92Segillett " state failed\n"); 59036fe4a92Segillett goto px_pwrsetup_err_state; 59136fe4a92Segillett } 59236fe4a92Segillett 5937c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 5947c478bd9Sstevel@tonic-gate 59536fe4a92Segillett px_pwrsetup_err_state: 59636fe4a92Segillett px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_INVALID); 59736fe4a92Segillett (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG, 59836fe4a92Segillett px_p->px_pm_msiq_id); 5991a887b2eSjchu pwr_setup_err1: 6001a887b2eSjchu mutex_destroy(&px_p->px_l23ready_lock); 6011a887b2eSjchu cv_destroy(&px_p->px_l23ready_cv); 6021a887b2eSjchu 6037c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 6047c478bd9Sstevel@tonic-gate } 6057c478bd9Sstevel@tonic-gate 6067c478bd9Sstevel@tonic-gate /* 6077c478bd9Sstevel@tonic-gate * undo whatever is done in px_pwr_setup. called by px_detach() 6087c478bd9Sstevel@tonic-gate */ 6097c478bd9Sstevel@tonic-gate static void 6107c478bd9Sstevel@tonic-gate px_pwr_teardown(dev_info_t *dip) 6117c478bd9Sstevel@tonic-gate { 6121a887b2eSjchu int instance = ddi_get_instance(dip); 6131a887b2eSjchu px_t *px_p = INST_TO_STATE(instance); 6147c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t hdl; 6157c478bd9Sstevel@tonic-gate 6161a887b2eSjchu if (!PCIE_PMINFO(dip) || !PCIE_NEXUS_PMINFO(dip)) 6177c478bd9Sstevel@tonic-gate return; 6187c478bd9Sstevel@tonic-gate 6197c478bd9Sstevel@tonic-gate /* Initilize handle */ 6207c478bd9Sstevel@tonic-gate hdl.ih_ver = DDI_INTR_VERSION; 6217c478bd9Sstevel@tonic-gate hdl.ih_state = DDI_IHDL_STATE_ALLOC; 6227c478bd9Sstevel@tonic-gate hdl.ih_dip = dip; 6237c478bd9Sstevel@tonic-gate hdl.ih_inum = 0; 6247c478bd9Sstevel@tonic-gate 6257c478bd9Sstevel@tonic-gate px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_INVALID); 6267c478bd9Sstevel@tonic-gate (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG, 6271a887b2eSjchu px_p->px_pm_msiq_id); 6287c478bd9Sstevel@tonic-gate 62936fe4a92Segillett (void) px_ib_update_intr_state(px_p, px_p->px_dip, hdl.ih_inum, 63036fe4a92Segillett px_msiqid_to_devino(px_p, px_p->px_pm_msiq_id), 63136fe4a92Segillett PX_INTR_STATE_DISABLE, MSG_REC, PCIE_PME_ACK_MSG); 63236fe4a92Segillett 6331a887b2eSjchu px_p->px_pm_msiq_id = -1; 6347c478bd9Sstevel@tonic-gate 6351a887b2eSjchu cv_destroy(&px_p->px_l23ready_cv); 6361a887b2eSjchu mutex_destroy(&px_p->px_l23ready_lock); 6377c478bd9Sstevel@tonic-gate } 6387c478bd9Sstevel@tonic-gate 6397c478bd9Sstevel@tonic-gate /* bus driver entry points */ 6407c478bd9Sstevel@tonic-gate 6417c478bd9Sstevel@tonic-gate /* 6427c478bd9Sstevel@tonic-gate * bus map entry point: 6437c478bd9Sstevel@tonic-gate * 6447c478bd9Sstevel@tonic-gate * if map request is for an rnumber 6457c478bd9Sstevel@tonic-gate * get the corresponding regspec from device node 6467c478bd9Sstevel@tonic-gate * build a new regspec in our parent's format 6477c478bd9Sstevel@tonic-gate * build a new map_req with the new regspec 6487c478bd9Sstevel@tonic-gate * call up the tree to complete the mapping 6497c478bd9Sstevel@tonic-gate */ 6507c478bd9Sstevel@tonic-gate int 6517c478bd9Sstevel@tonic-gate px_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 6527c478bd9Sstevel@tonic-gate off_t off, off_t len, caddr_t *addrp) 6537c478bd9Sstevel@tonic-gate { 6547c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 6557c478bd9Sstevel@tonic-gate struct regspec p_regspec; 6567c478bd9Sstevel@tonic-gate ddi_map_req_t p_mapreq; 6577c478bd9Sstevel@tonic-gate int reglen, rval, r_no; 6587c478bd9Sstevel@tonic-gate pci_regspec_t reloc_reg, *rp = &reloc_reg; 6597c478bd9Sstevel@tonic-gate 6607c478bd9Sstevel@tonic-gate DBG(DBG_MAP, dip, "rdip=%s%d:", 6617c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 6627c478bd9Sstevel@tonic-gate 6637c478bd9Sstevel@tonic-gate if (mp->map_flags & DDI_MF_USER_MAPPING) 6647c478bd9Sstevel@tonic-gate return (DDI_ME_UNIMPLEMENTED); 6657c478bd9Sstevel@tonic-gate 6667c478bd9Sstevel@tonic-gate switch (mp->map_type) { 6677c478bd9Sstevel@tonic-gate case DDI_MT_REGSPEC: 6687c478bd9Sstevel@tonic-gate reloc_reg = *(pci_regspec_t *)mp->map_obj.rp; /* dup whole */ 6697c478bd9Sstevel@tonic-gate break; 6707c478bd9Sstevel@tonic-gate 6717c478bd9Sstevel@tonic-gate case DDI_MT_RNUMBER: 6727c478bd9Sstevel@tonic-gate r_no = mp->map_obj.rnumber; 6737c478bd9Sstevel@tonic-gate DBG(DBG_MAP | DBG_CONT, dip, " r#=%x", r_no); 6747c478bd9Sstevel@tonic-gate 675a3282898Scth if (ddi_getlongprop(DDI_DEV_T_ANY, rdip, DDI_PROP_DONTPASS, 6767c478bd9Sstevel@tonic-gate "reg", (caddr_t)&rp, ®len) != DDI_SUCCESS) 6777c478bd9Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 6787c478bd9Sstevel@tonic-gate 6797c478bd9Sstevel@tonic-gate if (r_no < 0 || r_no >= reglen / sizeof (pci_regspec_t)) { 6807c478bd9Sstevel@tonic-gate kmem_free(rp, reglen); 6817c478bd9Sstevel@tonic-gate return (DDI_ME_RNUMBER_RANGE); 6827c478bd9Sstevel@tonic-gate } 6837c478bd9Sstevel@tonic-gate rp += r_no; 6847c478bd9Sstevel@tonic-gate break; 6857c478bd9Sstevel@tonic-gate 6867c478bd9Sstevel@tonic-gate default: 6877c478bd9Sstevel@tonic-gate return (DDI_ME_INVAL); 6887c478bd9Sstevel@tonic-gate } 6897c478bd9Sstevel@tonic-gate DBG(DBG_MAP | DBG_CONT, dip, "\n"); 6907c478bd9Sstevel@tonic-gate 6917c478bd9Sstevel@tonic-gate if ((rp->pci_phys_hi & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG) { 6927c478bd9Sstevel@tonic-gate /* 6937c478bd9Sstevel@tonic-gate * There may be a need to differentiate between PCI 6947c478bd9Sstevel@tonic-gate * and PCI-Ex devices so the following range check is 6957c478bd9Sstevel@tonic-gate * done correctly, depending on the implementation of 6967c478bd9Sstevel@tonic-gate * px_pci bridge nexus driver. 6977c478bd9Sstevel@tonic-gate */ 6987c478bd9Sstevel@tonic-gate if ((off >= PCIE_CONF_HDR_SIZE) || 6997c478bd9Sstevel@tonic-gate (len > PCIE_CONF_HDR_SIZE) || 7007c478bd9Sstevel@tonic-gate (off + len > PCIE_CONF_HDR_SIZE)) 7017c478bd9Sstevel@tonic-gate return (DDI_ME_INVAL); 7027c478bd9Sstevel@tonic-gate /* 7037c478bd9Sstevel@tonic-gate * the following function returning a DDI_FAILURE assumes 7047c478bd9Sstevel@tonic-gate * that there are no virtual config space access services 7057c478bd9Sstevel@tonic-gate * defined in this layer. Otherwise it is availed right 7067c478bd9Sstevel@tonic-gate * here and we return. 7077c478bd9Sstevel@tonic-gate */ 7087c478bd9Sstevel@tonic-gate rval = px_lib_map_vconfig(dip, mp, off, rp, addrp); 7097c478bd9Sstevel@tonic-gate if (rval == DDI_SUCCESS) 7107c478bd9Sstevel@tonic-gate goto done; 7117c478bd9Sstevel@tonic-gate } 7127c478bd9Sstevel@tonic-gate 7137c478bd9Sstevel@tonic-gate /* 7147c478bd9Sstevel@tonic-gate * No virtual config space services or we are mapping 7157c478bd9Sstevel@tonic-gate * a region of memory mapped config/IO/memory space, so proceed 7167c478bd9Sstevel@tonic-gate * to the parent. 7177c478bd9Sstevel@tonic-gate */ 7187c478bd9Sstevel@tonic-gate 7197c478bd9Sstevel@tonic-gate /* relocate within 64-bit pci space through "assigned-addresses" */ 7207c478bd9Sstevel@tonic-gate if (rval = px_reloc_reg(dip, rdip, px_p, rp)) 7217c478bd9Sstevel@tonic-gate goto done; 7227c478bd9Sstevel@tonic-gate 7237c478bd9Sstevel@tonic-gate if (len) /* adjust regspec according to mapping request */ 7247c478bd9Sstevel@tonic-gate rp->pci_size_low = len; /* MIN ? */ 7257c478bd9Sstevel@tonic-gate rp->pci_phys_low += off; 7267c478bd9Sstevel@tonic-gate 7277c478bd9Sstevel@tonic-gate /* translate relocated pci regspec into parent space through "ranges" */ 7287c478bd9Sstevel@tonic-gate if (rval = px_xlate_reg(px_p, rp, &p_regspec)) 7297c478bd9Sstevel@tonic-gate goto done; 7307c478bd9Sstevel@tonic-gate 7317c478bd9Sstevel@tonic-gate p_mapreq = *mp; /* dup the whole structure */ 7327c478bd9Sstevel@tonic-gate p_mapreq.map_type = DDI_MT_REGSPEC; 7337c478bd9Sstevel@tonic-gate p_mapreq.map_obj.rp = &p_regspec; 7344fbb58f6Sjchu px_lib_map_attr_check(&p_mapreq); 7357c478bd9Sstevel@tonic-gate rval = ddi_map(dip, &p_mapreq, 0, 0, addrp); 7367c478bd9Sstevel@tonic-gate 7377c478bd9Sstevel@tonic-gate if (rval == DDI_SUCCESS) { 7387c478bd9Sstevel@tonic-gate /* 7397c478bd9Sstevel@tonic-gate * Set-up access functions for FM access error capable drivers. 7407c478bd9Sstevel@tonic-gate */ 7417c478bd9Sstevel@tonic-gate if (DDI_FM_ACC_ERR_CAP(ddi_fm_capable(rdip)) && 7427c478bd9Sstevel@tonic-gate mp->map_handlep->ah_acc.devacc_attr_access != 7437c478bd9Sstevel@tonic-gate DDI_DEFAULT_ACC) 7447c478bd9Sstevel@tonic-gate px_fm_acc_setup(mp, rdip); 7457c478bd9Sstevel@tonic-gate } 7467c478bd9Sstevel@tonic-gate 7477c478bd9Sstevel@tonic-gate done: 7487c478bd9Sstevel@tonic-gate if (mp->map_type == DDI_MT_RNUMBER) 7497c478bd9Sstevel@tonic-gate kmem_free(rp - r_no, reglen); 7507c478bd9Sstevel@tonic-gate 7517c478bd9Sstevel@tonic-gate return (rval); 7527c478bd9Sstevel@tonic-gate } 7537c478bd9Sstevel@tonic-gate 7547c478bd9Sstevel@tonic-gate /* 7557c478bd9Sstevel@tonic-gate * bus dma map entry point 7567c478bd9Sstevel@tonic-gate * return value: 7577c478bd9Sstevel@tonic-gate * DDI_DMA_PARTIAL_MAP 1 7587c478bd9Sstevel@tonic-gate * DDI_DMA_MAPOK 0 7597c478bd9Sstevel@tonic-gate * DDI_DMA_MAPPED 0 7607c478bd9Sstevel@tonic-gate * DDI_DMA_NORESOURCES -1 7617c478bd9Sstevel@tonic-gate * DDI_DMA_NOMAPPING -2 7627c478bd9Sstevel@tonic-gate * DDI_DMA_TOOBIG -3 7637c478bd9Sstevel@tonic-gate */ 7647c478bd9Sstevel@tonic-gate int 7657c478bd9Sstevel@tonic-gate px_dma_setup(dev_info_t *dip, dev_info_t *rdip, ddi_dma_req_t *dmareq, 7667c478bd9Sstevel@tonic-gate ddi_dma_handle_t *handlep) 7677c478bd9Sstevel@tonic-gate { 7687c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 7697c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 7707c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp; 7717c478bd9Sstevel@tonic-gate int ret; 7727c478bd9Sstevel@tonic-gate 7737c478bd9Sstevel@tonic-gate DBG(DBG_DMA_MAP, dip, "mapping - rdip=%s%d type=%s\n", 7747c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), 7757c478bd9Sstevel@tonic-gate handlep ? "alloc" : "advisory"); 7767c478bd9Sstevel@tonic-gate 7777c478bd9Sstevel@tonic-gate if (!(mp = px_dma_lmts2hdl(dip, rdip, mmu_p, dmareq))) 7787c478bd9Sstevel@tonic-gate return (DDI_DMA_NORESOURCES); 7797c478bd9Sstevel@tonic-gate if (mp == (ddi_dma_impl_t *)DDI_DMA_NOMAPPING) 7807c478bd9Sstevel@tonic-gate return (DDI_DMA_NOMAPPING); 7817c478bd9Sstevel@tonic-gate if (ret = px_dma_type(px_p, dmareq, mp)) 7827c478bd9Sstevel@tonic-gate goto freehandle; 7837c478bd9Sstevel@tonic-gate if (ret = px_dma_pfn(px_p, dmareq, mp)) 7847c478bd9Sstevel@tonic-gate goto freehandle; 7857c478bd9Sstevel@tonic-gate 7867c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 78736fe4a92Segillett case PX_DMAI_FLAGS_DVMA: /* LINTED E_EQUALITY_NOT_ASSIGNMENT */ 7887c478bd9Sstevel@tonic-gate if ((ret = px_dvma_win(px_p, dmareq, mp)) || !handlep) 7897c478bd9Sstevel@tonic-gate goto freehandle; 7907c478bd9Sstevel@tonic-gate if (!PX_DMA_CANCACHE(mp)) { /* try fast track */ 7917c478bd9Sstevel@tonic-gate if (PX_DMA_CANFAST(mp)) { 7927c478bd9Sstevel@tonic-gate if (!px_dvma_map_fast(mmu_p, mp)) 7937c478bd9Sstevel@tonic-gate break; 7947c478bd9Sstevel@tonic-gate /* LINTED E_NOP_ELSE_STMT */ 7957c478bd9Sstevel@tonic-gate } else { 7967c478bd9Sstevel@tonic-gate PX_DVMA_FASTTRAK_PROF(mp); 7977c478bd9Sstevel@tonic-gate } 7987c478bd9Sstevel@tonic-gate } 7997c478bd9Sstevel@tonic-gate if (ret = px_dvma_map(mp, dmareq, mmu_p)) 8007c478bd9Sstevel@tonic-gate goto freehandle; 8017c478bd9Sstevel@tonic-gate break; 80236fe4a92Segillett case PX_DMAI_FLAGS_PTP: /* LINTED E_EQUALITY_NOT_ASSIGNMENT */ 8037c478bd9Sstevel@tonic-gate if ((ret = px_dma_physwin(px_p, dmareq, mp)) || !handlep) 8047c478bd9Sstevel@tonic-gate goto freehandle; 8057c478bd9Sstevel@tonic-gate break; 80636fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 8077c478bd9Sstevel@tonic-gate default: 8087c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_setup: bad dma type 0x%x", 8097c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), 8107c478bd9Sstevel@tonic-gate PX_DMA_TYPE(mp)); 8117c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 8127c478bd9Sstevel@tonic-gate } 8137c478bd9Sstevel@tonic-gate *handlep = (ddi_dma_handle_t)mp; 81436fe4a92Segillett mp->dmai_flags |= PX_DMAI_FLAGS_INUSE; 8157c478bd9Sstevel@tonic-gate px_dump_dma_handle(DBG_DMA_MAP, dip, mp); 8167c478bd9Sstevel@tonic-gate 8177c478bd9Sstevel@tonic-gate return ((mp->dmai_nwin == 1) ? DDI_DMA_MAPPED : DDI_DMA_PARTIAL_MAP); 8187c478bd9Sstevel@tonic-gate freehandle: 8197c478bd9Sstevel@tonic-gate if (ret == DDI_DMA_NORESOURCES) 8207c478bd9Sstevel@tonic-gate px_dma_freemp(mp); /* don't run_callback() */ 8217c478bd9Sstevel@tonic-gate else 8227c478bd9Sstevel@tonic-gate (void) px_dma_freehdl(dip, rdip, (ddi_dma_handle_t)mp); 8237c478bd9Sstevel@tonic-gate return (ret); 8247c478bd9Sstevel@tonic-gate } 8257c478bd9Sstevel@tonic-gate 8267c478bd9Sstevel@tonic-gate 8277c478bd9Sstevel@tonic-gate /* 8287c478bd9Sstevel@tonic-gate * bus dma alloc handle entry point: 8297c478bd9Sstevel@tonic-gate */ 8307c478bd9Sstevel@tonic-gate int 8317c478bd9Sstevel@tonic-gate px_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attrp, 8327c478bd9Sstevel@tonic-gate int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 8337c478bd9Sstevel@tonic-gate { 8347c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 8357c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp; 8367c478bd9Sstevel@tonic-gate int rval; 8377c478bd9Sstevel@tonic-gate 8387c478bd9Sstevel@tonic-gate DBG(DBG_DMA_ALLOCH, dip, "rdip=%s%d\n", 8397c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 8407c478bd9Sstevel@tonic-gate 8417c478bd9Sstevel@tonic-gate if (attrp->dma_attr_version != DMA_ATTR_V0) 8427c478bd9Sstevel@tonic-gate return (DDI_DMA_BADATTR); 8437c478bd9Sstevel@tonic-gate 8447c478bd9Sstevel@tonic-gate if (!(mp = px_dma_allocmp(dip, rdip, waitfp, arg))) 8457c478bd9Sstevel@tonic-gate return (DDI_DMA_NORESOURCES); 8467c478bd9Sstevel@tonic-gate 8477c478bd9Sstevel@tonic-gate /* 8487c478bd9Sstevel@tonic-gate * Save requestor's information 8497c478bd9Sstevel@tonic-gate */ 8507c478bd9Sstevel@tonic-gate mp->dmai_attr = *attrp; /* whole object - augmented later */ 85136fe4a92Segillett *PX_DEV_ATTR(mp) = *attrp; /* whole object - device orig attr */ 8527c478bd9Sstevel@tonic-gate DBG(DBG_DMA_ALLOCH, dip, "mp=%p\n", mp); 8537c478bd9Sstevel@tonic-gate 8547c478bd9Sstevel@tonic-gate /* check and convert dma attributes to handle parameters */ 8557c478bd9Sstevel@tonic-gate if (rval = px_dma_attr2hdl(px_p, mp)) { 8567c478bd9Sstevel@tonic-gate px_dma_freehdl(dip, rdip, (ddi_dma_handle_t)mp); 8577c478bd9Sstevel@tonic-gate *handlep = NULL; 8587c478bd9Sstevel@tonic-gate return (rval); 8597c478bd9Sstevel@tonic-gate } 8607c478bd9Sstevel@tonic-gate *handlep = (ddi_dma_handle_t)mp; 8617c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 8627c478bd9Sstevel@tonic-gate } 8637c478bd9Sstevel@tonic-gate 8647c478bd9Sstevel@tonic-gate 8657c478bd9Sstevel@tonic-gate /* 8667c478bd9Sstevel@tonic-gate * bus dma free handle entry point: 8677c478bd9Sstevel@tonic-gate */ 8687c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 8697c478bd9Sstevel@tonic-gate int 8707c478bd9Sstevel@tonic-gate px_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 8717c478bd9Sstevel@tonic-gate { 8727c478bd9Sstevel@tonic-gate DBG(DBG_DMA_FREEH, dip, "rdip=%s%d mp=%p\n", 8737c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), handle); 8747c478bd9Sstevel@tonic-gate px_dma_freemp((ddi_dma_impl_t *)handle); 8757c478bd9Sstevel@tonic-gate 8767c478bd9Sstevel@tonic-gate if (px_kmem_clid) { 8777c478bd9Sstevel@tonic-gate DBG(DBG_DMA_FREEH, dip, "run handle callback\n"); 8787c478bd9Sstevel@tonic-gate ddi_run_callback(&px_kmem_clid); 8797c478bd9Sstevel@tonic-gate } 8807c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 8817c478bd9Sstevel@tonic-gate } 8827c478bd9Sstevel@tonic-gate 8837c478bd9Sstevel@tonic-gate 8847c478bd9Sstevel@tonic-gate /* 8857c478bd9Sstevel@tonic-gate * bus dma bind handle entry point: 8867c478bd9Sstevel@tonic-gate */ 8877c478bd9Sstevel@tonic-gate int 8887c478bd9Sstevel@tonic-gate px_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 8897c478bd9Sstevel@tonic-gate ddi_dma_handle_t handle, ddi_dma_req_t *dmareq, 8907c478bd9Sstevel@tonic-gate ddi_dma_cookie_t *cookiep, uint_t *ccountp) 8917c478bd9Sstevel@tonic-gate { 8927c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 8937c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 8947c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 8957c478bd9Sstevel@tonic-gate int ret; 8967c478bd9Sstevel@tonic-gate 8977c478bd9Sstevel@tonic-gate DBG(DBG_DMA_BINDH, dip, "rdip=%s%d mp=%p dmareq=%p\n", 8987c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), mp, dmareq); 8997c478bd9Sstevel@tonic-gate 90036fe4a92Segillett if (mp->dmai_flags & PX_DMAI_FLAGS_INUSE) 9017c478bd9Sstevel@tonic-gate return (DDI_DMA_INUSE); 9027c478bd9Sstevel@tonic-gate 90336fe4a92Segillett ASSERT((mp->dmai_flags & ~PX_DMAI_FLAGS_PRESERVE) == 0); 90436fe4a92Segillett mp->dmai_flags |= PX_DMAI_FLAGS_INUSE; 9057c478bd9Sstevel@tonic-gate 9067c478bd9Sstevel@tonic-gate if (ret = px_dma_type(px_p, dmareq, mp)) 9077c478bd9Sstevel@tonic-gate goto err; 9087c478bd9Sstevel@tonic-gate if (ret = px_dma_pfn(px_p, dmareq, mp)) 9097c478bd9Sstevel@tonic-gate goto err; 9107c478bd9Sstevel@tonic-gate 9117c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 91236fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 9137c478bd9Sstevel@tonic-gate if (ret = px_dvma_win(px_p, dmareq, mp)) 9147c478bd9Sstevel@tonic-gate goto map_err; 9157c478bd9Sstevel@tonic-gate if (!PX_DMA_CANCACHE(mp)) { /* try fast track */ 9167c478bd9Sstevel@tonic-gate if (PX_DMA_CANFAST(mp)) { 9177c478bd9Sstevel@tonic-gate if (!px_dvma_map_fast(mmu_p, mp)) 9187c478bd9Sstevel@tonic-gate goto mapped; /*LINTED E_NOP_ELSE_STMT*/ 9197c478bd9Sstevel@tonic-gate } else { 9207c478bd9Sstevel@tonic-gate PX_DVMA_FASTTRAK_PROF(mp); 9217c478bd9Sstevel@tonic-gate } 9227c478bd9Sstevel@tonic-gate } 9237c478bd9Sstevel@tonic-gate if (ret = px_dvma_map(mp, dmareq, mmu_p)) 9247c478bd9Sstevel@tonic-gate goto map_err; 9257c478bd9Sstevel@tonic-gate mapped: 9267c478bd9Sstevel@tonic-gate *ccountp = 1; 9277c478bd9Sstevel@tonic-gate MAKE_DMA_COOKIE(cookiep, mp->dmai_mapping, mp->dmai_size); 9287c478bd9Sstevel@tonic-gate break; 92936fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 93036fe4a92Segillett case PX_DMAI_FLAGS_PTP: 9317c478bd9Sstevel@tonic-gate if (ret = px_dma_physwin(px_p, dmareq, mp)) 9327c478bd9Sstevel@tonic-gate goto map_err; 93336fe4a92Segillett *ccountp = PX_WINLST(mp)->win_ncookies; 93436fe4a92Segillett *cookiep = 93536fe4a92Segillett *(ddi_dma_cookie_t *)(PX_WINLST(mp) + 1); /* wholeobj */ 9367c478bd9Sstevel@tonic-gate break; 9377c478bd9Sstevel@tonic-gate default: 9387c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_bindhdl(%p): bad dma type", 9397c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), mp); 9407c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 9417c478bd9Sstevel@tonic-gate } 94269cd775fSschwartz DBG(DBG_DMA_BINDH, dip, "cookie %" PRIx64 "+%x\n", 94369cd775fSschwartz cookiep->dmac_address, cookiep->dmac_size); 9447c478bd9Sstevel@tonic-gate px_dump_dma_handle(DBG_DMA_MAP, dip, mp); 945f8d2de6bSjchu 946f8d2de6bSjchu /* insert dma handle into FMA cache */ 947f8d2de6bSjchu if (mp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) 948f8d2de6bSjchu (void) ndi_fmc_insert(rdip, DMA_HANDLE, mp, NULL); 949f8d2de6bSjchu 9507c478bd9Sstevel@tonic-gate return (mp->dmai_nwin == 1 ? DDI_DMA_MAPPED : DDI_DMA_PARTIAL_MAP); 9517c478bd9Sstevel@tonic-gate map_err: 9527c478bd9Sstevel@tonic-gate px_dma_freepfn(mp); 9537c478bd9Sstevel@tonic-gate err: 95436fe4a92Segillett mp->dmai_flags &= PX_DMAI_FLAGS_PRESERVE; 9557c478bd9Sstevel@tonic-gate return (ret); 9567c478bd9Sstevel@tonic-gate } 9577c478bd9Sstevel@tonic-gate 9587c478bd9Sstevel@tonic-gate 9597c478bd9Sstevel@tonic-gate /* 9607c478bd9Sstevel@tonic-gate * bus dma unbind handle entry point: 9617c478bd9Sstevel@tonic-gate */ 9627c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 9637c478bd9Sstevel@tonic-gate int 9647c478bd9Sstevel@tonic-gate px_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 9657c478bd9Sstevel@tonic-gate { 9667c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 9677c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 9687c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 9697c478bd9Sstevel@tonic-gate 9707c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "rdip=%s%d, mp=%p\n", 9717c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), handle); 97236fe4a92Segillett if ((mp->dmai_flags & PX_DMAI_FLAGS_INUSE) == 0) { 9737c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "handle not inuse\n"); 9747c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 9757c478bd9Sstevel@tonic-gate } 9767c478bd9Sstevel@tonic-gate 977f8d2de6bSjchu /* remove dma handle from FMA cache */ 978f8d2de6bSjchu if (mp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 979f8d2de6bSjchu if (DEVI(rdip)->devi_fmhdl != NULL && 980f8d2de6bSjchu DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap)) { 981f8d2de6bSjchu (void) ndi_fmc_remove(rdip, DMA_HANDLE, mp); 982f8d2de6bSjchu } 983f8d2de6bSjchu } 984f8d2de6bSjchu 9857c478bd9Sstevel@tonic-gate /* 9867c478bd9Sstevel@tonic-gate * Here if the handle is using the iommu. Unload all the iommu 9877c478bd9Sstevel@tonic-gate * translations. 9887c478bd9Sstevel@tonic-gate */ 9897c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 99036fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 9917c478bd9Sstevel@tonic-gate px_mmu_unmap_window(mmu_p, mp); 9927c478bd9Sstevel@tonic-gate px_dvma_unmap(mmu_p, mp); 9937c478bd9Sstevel@tonic-gate px_dma_freepfn(mp); 9947c478bd9Sstevel@tonic-gate break; 99536fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 99636fe4a92Segillett case PX_DMAI_FLAGS_PTP: 9977c478bd9Sstevel@tonic-gate px_dma_freewin(mp); 9987c478bd9Sstevel@tonic-gate break; 9997c478bd9Sstevel@tonic-gate default: 10007c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_unbindhdl:bad dma type %p", 10017c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), mp); 10027c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 10037c478bd9Sstevel@tonic-gate } 10047c478bd9Sstevel@tonic-gate if (mmu_p->mmu_dvma_clid != 0) { 10057c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "run dvma callback\n"); 10067c478bd9Sstevel@tonic-gate ddi_run_callback(&mmu_p->mmu_dvma_clid); 10077c478bd9Sstevel@tonic-gate } 10087c478bd9Sstevel@tonic-gate if (px_kmem_clid) { 10097c478bd9Sstevel@tonic-gate DBG(DBG_DMA_UNBINDH, dip, "run handle callback\n"); 10107c478bd9Sstevel@tonic-gate ddi_run_callback(&px_kmem_clid); 10117c478bd9Sstevel@tonic-gate } 101236fe4a92Segillett mp->dmai_flags &= PX_DMAI_FLAGS_PRESERVE; 1013f8d2de6bSjchu 10147c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 10157c478bd9Sstevel@tonic-gate } 10167c478bd9Sstevel@tonic-gate 10177c478bd9Sstevel@tonic-gate /* 10187c478bd9Sstevel@tonic-gate * bus dma win entry point: 10197c478bd9Sstevel@tonic-gate */ 10207c478bd9Sstevel@tonic-gate int 10217c478bd9Sstevel@tonic-gate px_dma_win(dev_info_t *dip, dev_info_t *rdip, 10227c478bd9Sstevel@tonic-gate ddi_dma_handle_t handle, uint_t win, off_t *offp, 10237c478bd9Sstevel@tonic-gate size_t *lenp, ddi_dma_cookie_t *cookiep, uint_t *ccountp) 10247c478bd9Sstevel@tonic-gate { 10257c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 10267c478bd9Sstevel@tonic-gate int ret; 10277c478bd9Sstevel@tonic-gate 10287c478bd9Sstevel@tonic-gate DBG(DBG_DMA_WIN, dip, "rdip=%s%d\n", 10297c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 10307c478bd9Sstevel@tonic-gate 10317c478bd9Sstevel@tonic-gate px_dump_dma_handle(DBG_DMA_WIN, dip, mp); 10327c478bd9Sstevel@tonic-gate if (win >= mp->dmai_nwin) { 10337c478bd9Sstevel@tonic-gate DBG(DBG_DMA_WIN, dip, "%x out of range\n", win); 10347c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 10357c478bd9Sstevel@tonic-gate } 10367c478bd9Sstevel@tonic-gate 10377c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 103836fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 10397c478bd9Sstevel@tonic-gate if (win != PX_DMA_CURWIN(mp)) { 10407c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 10417c478bd9Sstevel@tonic-gate px_mmu_t *mmu_p = px_p->px_mmu_p; 10427c478bd9Sstevel@tonic-gate px_mmu_unmap_window(mmu_p, mp); 10437c478bd9Sstevel@tonic-gate 10447c478bd9Sstevel@tonic-gate /* map_window sets dmai_mapping/size/offset */ 10457c478bd9Sstevel@tonic-gate px_mmu_map_window(mmu_p, mp, win); 10467c478bd9Sstevel@tonic-gate if ((ret = px_mmu_map_window(mmu_p, 10477c478bd9Sstevel@tonic-gate mp, win)) != DDI_SUCCESS) 10487c478bd9Sstevel@tonic-gate return (ret); 10497c478bd9Sstevel@tonic-gate } 10507c478bd9Sstevel@tonic-gate if (cookiep) 10517c478bd9Sstevel@tonic-gate MAKE_DMA_COOKIE(cookiep, mp->dmai_mapping, 10527c478bd9Sstevel@tonic-gate mp->dmai_size); 10537c478bd9Sstevel@tonic-gate if (ccountp) 10547c478bd9Sstevel@tonic-gate *ccountp = 1; 10557c478bd9Sstevel@tonic-gate break; 105636fe4a92Segillett case PX_DMAI_FLAGS_PTP: 105736fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: { 10587c478bd9Sstevel@tonic-gate int i; 10597c478bd9Sstevel@tonic-gate ddi_dma_cookie_t *ck_p; 10607c478bd9Sstevel@tonic-gate px_dma_win_t *win_p = mp->dmai_winlst; 10617c478bd9Sstevel@tonic-gate 10627c478bd9Sstevel@tonic-gate for (i = 0; i < win; win_p = win_p->win_next, i++); 10637c478bd9Sstevel@tonic-gate ck_p = (ddi_dma_cookie_t *)(win_p + 1); 10647c478bd9Sstevel@tonic-gate *cookiep = *ck_p; 10657c478bd9Sstevel@tonic-gate mp->dmai_offset = win_p->win_offset; 10667c478bd9Sstevel@tonic-gate mp->dmai_size = win_p->win_size; 10677c478bd9Sstevel@tonic-gate mp->dmai_mapping = ck_p->dmac_laddress; 10687c478bd9Sstevel@tonic-gate mp->dmai_cookie = ck_p + 1; 10697c478bd9Sstevel@tonic-gate win_p->win_curseg = 0; 10707c478bd9Sstevel@tonic-gate if (ccountp) 10717c478bd9Sstevel@tonic-gate *ccountp = win_p->win_ncookies; 10727c478bd9Sstevel@tonic-gate } 10737c478bd9Sstevel@tonic-gate break; 10747c478bd9Sstevel@tonic-gate default: 10757c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d: px_dma_win:bad dma type 0x%x", 10767c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), 10777c478bd9Sstevel@tonic-gate PX_DMA_TYPE(mp)); 10787c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 10797c478bd9Sstevel@tonic-gate } 10807c478bd9Sstevel@tonic-gate if (cookiep) 10817c478bd9Sstevel@tonic-gate DBG(DBG_DMA_WIN, dip, 10827c478bd9Sstevel@tonic-gate "cookie - dmac_address=%x dmac_size=%x\n", 10837c478bd9Sstevel@tonic-gate cookiep->dmac_address, cookiep->dmac_size); 10847c478bd9Sstevel@tonic-gate if (offp) 10857c478bd9Sstevel@tonic-gate *offp = (off_t)mp->dmai_offset; 10867c478bd9Sstevel@tonic-gate if (lenp) 10877c478bd9Sstevel@tonic-gate *lenp = mp->dmai_size; 10887c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 10897c478bd9Sstevel@tonic-gate } 10907c478bd9Sstevel@tonic-gate 10917c478bd9Sstevel@tonic-gate #ifdef DEBUG 10927c478bd9Sstevel@tonic-gate static char *px_dmactl_str[] = { 10937c478bd9Sstevel@tonic-gate "DDI_DMA_FREE", 10947c478bd9Sstevel@tonic-gate "DDI_DMA_SYNC", 10957c478bd9Sstevel@tonic-gate "DDI_DMA_HTOC", 10967c478bd9Sstevel@tonic-gate "DDI_DMA_KVADDR", 10977c478bd9Sstevel@tonic-gate "DDI_DMA_MOVWIN", 10987c478bd9Sstevel@tonic-gate "DDI_DMA_REPWIN", 10997c478bd9Sstevel@tonic-gate "DDI_DMA_GETERR", 11007c478bd9Sstevel@tonic-gate "DDI_DMA_COFF", 11017c478bd9Sstevel@tonic-gate "DDI_DMA_NEXTWIN", 11027c478bd9Sstevel@tonic-gate "DDI_DMA_NEXTSEG", 11037c478bd9Sstevel@tonic-gate "DDI_DMA_SEGTOC", 11047c478bd9Sstevel@tonic-gate "DDI_DMA_RESERVE", 11057c478bd9Sstevel@tonic-gate "DDI_DMA_RELEASE", 11067c478bd9Sstevel@tonic-gate "DDI_DMA_RESETH", 11077c478bd9Sstevel@tonic-gate "DDI_DMA_CKSYNC", 11087c478bd9Sstevel@tonic-gate "DDI_DMA_IOPB_ALLOC", 11097c478bd9Sstevel@tonic-gate "DDI_DMA_IOPB_FREE", 11107c478bd9Sstevel@tonic-gate "DDI_DMA_SMEM_ALLOC", 11117c478bd9Sstevel@tonic-gate "DDI_DMA_SMEM_FREE", 11127c478bd9Sstevel@tonic-gate "DDI_DMA_SET_SBUS64" 11137c478bd9Sstevel@tonic-gate }; 11147c478bd9Sstevel@tonic-gate #endif /* DEBUG */ 11157c478bd9Sstevel@tonic-gate 11167c478bd9Sstevel@tonic-gate /* 11177c478bd9Sstevel@tonic-gate * bus dma control entry point: 11187c478bd9Sstevel@tonic-gate */ 11197c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 11207c478bd9Sstevel@tonic-gate int 11217c478bd9Sstevel@tonic-gate px_dma_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 11227c478bd9Sstevel@tonic-gate enum ddi_dma_ctlops cmd, off_t *offp, size_t *lenp, caddr_t *objp, 11237c478bd9Sstevel@tonic-gate uint_t cache_flags) 11247c478bd9Sstevel@tonic-gate { 11257c478bd9Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)handle; 11267c478bd9Sstevel@tonic-gate 11277c478bd9Sstevel@tonic-gate #ifdef DEBUG 11287c478bd9Sstevel@tonic-gate DBG(DBG_DMA_CTL, dip, "%s: rdip=%s%d\n", px_dmactl_str[cmd], 11297c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 11307c478bd9Sstevel@tonic-gate #endif /* DEBUG */ 11317c478bd9Sstevel@tonic-gate 11327c478bd9Sstevel@tonic-gate switch (cmd) { 11337c478bd9Sstevel@tonic-gate case DDI_DMA_FREE: 11347c478bd9Sstevel@tonic-gate (void) px_dma_unbindhdl(dip, rdip, handle); 11357c478bd9Sstevel@tonic-gate (void) px_dma_freehdl(dip, rdip, handle); 11367c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 11377c478bd9Sstevel@tonic-gate case DDI_DMA_RESERVE: { 11387c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 11397c478bd9Sstevel@tonic-gate return (px_fdvma_reserve(dip, rdip, px_p, 11407c478bd9Sstevel@tonic-gate (ddi_dma_req_t *)offp, (ddi_dma_handle_t *)objp)); 11417c478bd9Sstevel@tonic-gate } 11427c478bd9Sstevel@tonic-gate case DDI_DMA_RELEASE: { 11437c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 11447c478bd9Sstevel@tonic-gate return (px_fdvma_release(dip, px_p, mp)); 11457c478bd9Sstevel@tonic-gate } 11467c478bd9Sstevel@tonic-gate default: 11477c478bd9Sstevel@tonic-gate break; 11487c478bd9Sstevel@tonic-gate } 11497c478bd9Sstevel@tonic-gate 11507c478bd9Sstevel@tonic-gate switch (PX_DMA_TYPE(mp)) { 115136fe4a92Segillett case PX_DMAI_FLAGS_DVMA: 11527c478bd9Sstevel@tonic-gate return (px_dvma_ctl(dip, rdip, mp, cmd, offp, lenp, objp, 11537c478bd9Sstevel@tonic-gate cache_flags)); 115436fe4a92Segillett case PX_DMAI_FLAGS_PTP: 115536fe4a92Segillett case PX_DMAI_FLAGS_BYPASS: 11567c478bd9Sstevel@tonic-gate return (px_dma_ctl(dip, rdip, mp, cmd, offp, lenp, objp, 11577c478bd9Sstevel@tonic-gate cache_flags)); 11587c478bd9Sstevel@tonic-gate default: 11597c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "%s%d: px_dma_ctlops(%x):bad dma type %x", 11607c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip), cmd, 11617c478bd9Sstevel@tonic-gate mp->dmai_flags); 11627c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 11637c478bd9Sstevel@tonic-gate } 1164b40cec45Skrishnae return (0); 11657c478bd9Sstevel@tonic-gate } 11667c478bd9Sstevel@tonic-gate 11677c478bd9Sstevel@tonic-gate /* 11687c478bd9Sstevel@tonic-gate * control ops entry point: 11697c478bd9Sstevel@tonic-gate * 11707c478bd9Sstevel@tonic-gate * Requests handled completely: 11717c478bd9Sstevel@tonic-gate * DDI_CTLOPS_INITCHILD see init_child() for details 11727c478bd9Sstevel@tonic-gate * DDI_CTLOPS_UNINITCHILD 11737c478bd9Sstevel@tonic-gate * DDI_CTLOPS_REPORTDEV see report_dev() for details 11747c478bd9Sstevel@tonic-gate * DDI_CTLOPS_IOMIN cache line size if streaming otherwise 1 11757c478bd9Sstevel@tonic-gate * DDI_CTLOPS_REGSIZE 11767c478bd9Sstevel@tonic-gate * DDI_CTLOPS_NREGS 11777c478bd9Sstevel@tonic-gate * DDI_CTLOPS_DVMAPAGESIZE 11787c478bd9Sstevel@tonic-gate * DDI_CTLOPS_POKE 11797c478bd9Sstevel@tonic-gate * DDI_CTLOPS_PEEK 11807c478bd9Sstevel@tonic-gate * 11817c478bd9Sstevel@tonic-gate * All others passed to parent. 11827c478bd9Sstevel@tonic-gate */ 11837c478bd9Sstevel@tonic-gate int 11847c478bd9Sstevel@tonic-gate px_ctlops(dev_info_t *dip, dev_info_t *rdip, 11857c478bd9Sstevel@tonic-gate ddi_ctl_enum_t op, void *arg, void *result) 11867c478bd9Sstevel@tonic-gate { 11877c478bd9Sstevel@tonic-gate px_t *px_p = DIP_TO_STATE(dip); 11887c478bd9Sstevel@tonic-gate struct detachspec *ds; 11897c478bd9Sstevel@tonic-gate struct attachspec *as; 11907c478bd9Sstevel@tonic-gate 11917c478bd9Sstevel@tonic-gate switch (op) { 11927c478bd9Sstevel@tonic-gate case DDI_CTLOPS_INITCHILD: 11937c478bd9Sstevel@tonic-gate return (px_init_child(px_p, (dev_info_t *)arg)); 11947c478bd9Sstevel@tonic-gate 11957c478bd9Sstevel@tonic-gate case DDI_CTLOPS_UNINITCHILD: 11967c478bd9Sstevel@tonic-gate return (px_uninit_child(px_p, (dev_info_t *)arg)); 11977c478bd9Sstevel@tonic-gate 11987c478bd9Sstevel@tonic-gate case DDI_CTLOPS_ATTACH: 11997c478bd9Sstevel@tonic-gate as = (struct attachspec *)arg; 12007c478bd9Sstevel@tonic-gate switch (as->when) { 12017c478bd9Sstevel@tonic-gate case DDI_PRE: 12027c478bd9Sstevel@tonic-gate if (as->cmd == DDI_ATTACH) { 12037c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "PRE_ATTACH for %s@%d\n", 12047c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), 12057c478bd9Sstevel@tonic-gate ddi_get_instance(rdip)); 12067c478bd9Sstevel@tonic-gate return (pcie_pm_hold(dip)); 12077c478bd9Sstevel@tonic-gate } 12088bc7d88aSet142600 if (as->cmd == DDI_RESUME) { 12098bc7d88aSet142600 ddi_acc_handle_t config_handle; 12108bc7d88aSet142600 DBG(DBG_PWR, dip, "PRE_RESUME for %s@%d\n", 12118bc7d88aSet142600 ddi_driver_name(rdip), 12128bc7d88aSet142600 ddi_get_instance(rdip)); 12138bc7d88aSet142600 12148bc7d88aSet142600 if (pci_config_setup(rdip, &config_handle) == 12158bc7d88aSet142600 DDI_SUCCESS) { 12168bc7d88aSet142600 pcie_clear_errors(rdip, config_handle); 12178bc7d88aSet142600 pci_config_teardown(&config_handle); 12188bc7d88aSet142600 } 12198bc7d88aSet142600 } 12207c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12217c478bd9Sstevel@tonic-gate 12227c478bd9Sstevel@tonic-gate case DDI_POST: 12237c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "POST_ATTACH for %s@%d\n", 12247c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 12257c478bd9Sstevel@tonic-gate if (as->cmd == DDI_ATTACH && as->result != DDI_SUCCESS) 12267c478bd9Sstevel@tonic-gate pcie_pm_release(dip); 12277c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12287c478bd9Sstevel@tonic-gate default: 12297c478bd9Sstevel@tonic-gate break; 12307c478bd9Sstevel@tonic-gate } 12317c478bd9Sstevel@tonic-gate break; 12327c478bd9Sstevel@tonic-gate 12337c478bd9Sstevel@tonic-gate case DDI_CTLOPS_DETACH: 12347c478bd9Sstevel@tonic-gate ds = (struct detachspec *)arg; 12357c478bd9Sstevel@tonic-gate switch (ds->when) { 12367c478bd9Sstevel@tonic-gate case DDI_POST: 12377c478bd9Sstevel@tonic-gate if (ds->cmd == DDI_DETACH && 12387c478bd9Sstevel@tonic-gate ds->result == DDI_SUCCESS) { 12397c478bd9Sstevel@tonic-gate DBG(DBG_PWR, dip, "POST_DETACH for %s@%d\n", 12407c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), 12417c478bd9Sstevel@tonic-gate ddi_get_instance(rdip)); 12427c478bd9Sstevel@tonic-gate return (pcie_pm_remove_child(dip, rdip)); 12437c478bd9Sstevel@tonic-gate } 12447c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12457c478bd9Sstevel@tonic-gate default: 12467c478bd9Sstevel@tonic-gate break; 12477c478bd9Sstevel@tonic-gate } 12487c478bd9Sstevel@tonic-gate break; 12497c478bd9Sstevel@tonic-gate 12507c478bd9Sstevel@tonic-gate case DDI_CTLOPS_REPORTDEV: 12517c478bd9Sstevel@tonic-gate return (px_report_dev(rdip)); 12527c478bd9Sstevel@tonic-gate 12537c478bd9Sstevel@tonic-gate case DDI_CTLOPS_IOMIN: 12547c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12557c478bd9Sstevel@tonic-gate 12567c478bd9Sstevel@tonic-gate case DDI_CTLOPS_REGSIZE: 12577c478bd9Sstevel@tonic-gate *((off_t *)result) = px_get_reg_set_size(rdip, *((int *)arg)); 1258f8d2de6bSjchu return (*((off_t *)result) == 0 ? DDI_FAILURE : DDI_SUCCESS); 12597c478bd9Sstevel@tonic-gate 12607c478bd9Sstevel@tonic-gate case DDI_CTLOPS_NREGS: 12617c478bd9Sstevel@tonic-gate *((uint_t *)result) = px_get_nreg_set(rdip); 12627c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12637c478bd9Sstevel@tonic-gate 12647c478bd9Sstevel@tonic-gate case DDI_CTLOPS_DVMAPAGESIZE: 12657c478bd9Sstevel@tonic-gate *((ulong_t *)result) = MMU_PAGE_SIZE; 12667c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 12677c478bd9Sstevel@tonic-gate 12687c478bd9Sstevel@tonic-gate case DDI_CTLOPS_POKE: /* platform dependent implementation. */ 12697c478bd9Sstevel@tonic-gate return (px_lib_ctlops_poke(dip, rdip, 12707c478bd9Sstevel@tonic-gate (peekpoke_ctlops_t *)arg)); 12717c478bd9Sstevel@tonic-gate 12727c478bd9Sstevel@tonic-gate case DDI_CTLOPS_PEEK: /* platform dependent implementation. */ 12737c478bd9Sstevel@tonic-gate return (px_lib_ctlops_peek(dip, rdip, 12747c478bd9Sstevel@tonic-gate (peekpoke_ctlops_t *)arg, result)); 12757c478bd9Sstevel@tonic-gate 12767c478bd9Sstevel@tonic-gate case DDI_CTLOPS_POWER: 12777c478bd9Sstevel@tonic-gate default: 12787c478bd9Sstevel@tonic-gate break; 12797c478bd9Sstevel@tonic-gate } 12807c478bd9Sstevel@tonic-gate 12817c478bd9Sstevel@tonic-gate /* 12827c478bd9Sstevel@tonic-gate * Now pass the request up to our parent. 12837c478bd9Sstevel@tonic-gate */ 12847c478bd9Sstevel@tonic-gate DBG(DBG_CTLOPS, dip, "passing request to parent: rdip=%s%d\n", 12857c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 12867c478bd9Sstevel@tonic-gate return (ddi_ctlops(dip, rdip, op, arg, result)); 12877c478bd9Sstevel@tonic-gate } 12887c478bd9Sstevel@tonic-gate 12897c478bd9Sstevel@tonic-gate /* ARGSUSED */ 12907c478bd9Sstevel@tonic-gate int 12917c478bd9Sstevel@tonic-gate px_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, 12927c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result) 12937c478bd9Sstevel@tonic-gate { 12947c478bd9Sstevel@tonic-gate int intr_types, ret = DDI_SUCCESS; 12957c478bd9Sstevel@tonic-gate 12967c478bd9Sstevel@tonic-gate DBG(DBG_INTROPS, dip, "px_intr_ops: rdip=%s%d\n", 12977c478bd9Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 12987c478bd9Sstevel@tonic-gate 12997c478bd9Sstevel@tonic-gate /* Process DDI_INTROP_SUPPORTED_TYPES request here */ 13007c478bd9Sstevel@tonic-gate if (intr_op == DDI_INTROP_SUPPORTED_TYPES) { 13017c478bd9Sstevel@tonic-gate *(int *)result = i_ddi_get_nintrs(rdip) ? 13027c478bd9Sstevel@tonic-gate DDI_INTR_TYPE_FIXED : 0; 13037c478bd9Sstevel@tonic-gate 13047c478bd9Sstevel@tonic-gate if ((pci_msi_get_supported_type(rdip, 13057c478bd9Sstevel@tonic-gate &intr_types)) == DDI_SUCCESS) { 13067c478bd9Sstevel@tonic-gate /* 13077c478bd9Sstevel@tonic-gate * Double check supported interrupt types vs. 13087c478bd9Sstevel@tonic-gate * what the host bridge supports. 13099c75c6bfSgovinda * 13109c75c6bfSgovinda * NOTE: 13119c75c6bfSgovinda * Currently MSI-X is disabled since px driver 13129c75c6bfSgovinda * don't fully support this feature. 13137c478bd9Sstevel@tonic-gate */ 13149c75c6bfSgovinda *(int *)result |= (intr_types & DDI_INTR_TYPE_MSI); 13157c478bd9Sstevel@tonic-gate } 13167c478bd9Sstevel@tonic-gate 13177c478bd9Sstevel@tonic-gate return (ret); 13187c478bd9Sstevel@tonic-gate } 13197c478bd9Sstevel@tonic-gate 13207c478bd9Sstevel@tonic-gate /* 13217c478bd9Sstevel@tonic-gate * PCI-E nexus driver supports fixed, MSI and MSI-X interrupts. 13227c478bd9Sstevel@tonic-gate * Return failure if interrupt type is not supported. 13237c478bd9Sstevel@tonic-gate */ 13247c478bd9Sstevel@tonic-gate switch (hdlp->ih_type) { 13257c478bd9Sstevel@tonic-gate case DDI_INTR_TYPE_FIXED: 13267c478bd9Sstevel@tonic-gate ret = px_intx_ops(dip, rdip, intr_op, hdlp, result); 13277c478bd9Sstevel@tonic-gate break; 13287c478bd9Sstevel@tonic-gate case DDI_INTR_TYPE_MSI: 13297c478bd9Sstevel@tonic-gate case DDI_INTR_TYPE_MSIX: 13307c478bd9Sstevel@tonic-gate ret = px_msix_ops(dip, rdip, intr_op, hdlp, result); 13317c478bd9Sstevel@tonic-gate break; 13327c478bd9Sstevel@tonic-gate default: 13337c478bd9Sstevel@tonic-gate ret = DDI_ENOTSUP; 13347c478bd9Sstevel@tonic-gate break; 13357c478bd9Sstevel@tonic-gate } 13367c478bd9Sstevel@tonic-gate 13377c478bd9Sstevel@tonic-gate return (ret); 13387c478bd9Sstevel@tonic-gate } 1339b65731f1Skini 1340b65731f1Skini static uint_t 1341b65731f1Skini px_init_hotplug(px_t *px_p) 1342b65731f1Skini { 1343b65731f1Skini px_bus_range_t bus_range; 1344b65731f1Skini dev_info_t *dip; 1345b65731f1Skini pciehpc_regops_t regops; 1346b65731f1Skini 1347b65731f1Skini dip = px_p->px_dip; 1348b65731f1Skini 1349b65731f1Skini if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 1350b65731f1Skini "hotplug-capable") == 0) 1351b65731f1Skini return (DDI_FAILURE); 1352b65731f1Skini 1353b65731f1Skini /* 1354b65731f1Skini * Before initializing hotplug - open up bus range. The busra 1355b65731f1Skini * module will initialize its pool of bus numbers from this. 1356b65731f1Skini * "busra" will be the agent that keeps track of them during 1357b65731f1Skini * hotplug. Also, note, that busra will remove any bus numbers 1358b65731f1Skini * already in use from boot time. 1359b65731f1Skini */ 1360b65731f1Skini if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 1361b65731f1Skini "bus-range") == 0) { 1362b65731f1Skini cmn_err(CE_WARN, "%s%d: bus-range not found\n", 1363b65731f1Skini ddi_driver_name(dip), ddi_get_instance(dip)); 1364b65731f1Skini #ifdef DEBUG 1365b65731f1Skini bus_range.lo = 0x0; 1366b65731f1Skini bus_range.hi = 0xff; 1367b65731f1Skini 1368b65731f1Skini if (ndi_prop_update_int_array(DDI_DEV_T_NONE, 1369b65731f1Skini dip, "bus-range", (int *)&bus_range, 2) 1370b65731f1Skini != DDI_PROP_SUCCESS) { 1371b65731f1Skini return (DDI_FAILURE); 1372b65731f1Skini } 1373b65731f1Skini #else 1374b65731f1Skini return (DDI_FAILURE); 1375b65731f1Skini #endif 1376b65731f1Skini } 1377b65731f1Skini 1378b65731f1Skini if (px_lib_hotplug_init(dip, (void *)®ops) != DDI_SUCCESS) 1379b65731f1Skini return (DDI_FAILURE); 1380b65731f1Skini 1381b65731f1Skini if (pciehpc_init(dip, ®ops) != DDI_SUCCESS) { 1382b65731f1Skini px_lib_hotplug_uninit(dip); 1383b65731f1Skini return (DDI_FAILURE); 1384b65731f1Skini } 1385b65731f1Skini 1386b65731f1Skini if (pcihp_init(dip) != DDI_SUCCESS) { 1387b65731f1Skini (void) pciehpc_uninit(dip); 1388b65731f1Skini px_lib_hotplug_uninit(dip); 1389b65731f1Skini return (DDI_FAILURE); 1390b65731f1Skini } 1391b65731f1Skini 1392b65731f1Skini if (pcihp_get_cb_ops() != NULL) { 1393b65731f1Skini DBG(DBG_ATTACH, dip, "%s%d hotplug enabled", 1394b65731f1Skini ddi_driver_name(dip), ddi_get_instance(dip)); 1395b65731f1Skini px_p->px_dev_caps |= PX_HOTPLUG_CAPABLE; 1396b65731f1Skini } 1397b65731f1Skini 1398b65731f1Skini return (DDI_SUCCESS); 1399b65731f1Skini } 1400b65731f1Skini 1401b65731f1Skini static uint_t 1402b65731f1Skini px_uninit_hotplug(dev_info_t *dip) 1403b65731f1Skini { 1404b65731f1Skini if (pcihp_uninit(dip) != DDI_SUCCESS) 1405b65731f1Skini return (DDI_FAILURE); 1406b65731f1Skini 1407b65731f1Skini if (pciehpc_uninit(dip) != DDI_SUCCESS) 1408b65731f1Skini return (DDI_FAILURE); 1409b65731f1Skini 1410b65731f1Skini px_lib_hotplug_uninit(dip); 1411b65731f1Skini 1412b65731f1Skini return (DDI_SUCCESS); 1413b65731f1Skini } 1414