xref: /illumos-gate/usr/src/uts/sparc/sys/machlock.h (revision 71269a2275bf5a143dad6461eee2710a344e7261)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_MACHLOCK_H
27 #define	_SYS_MACHLOCK_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifdef	__cplusplus
32 extern "C" {
33 #endif
34 
35 #ifndef	_ASM
36 
37 #include <sys/types.h>
38 
39 #ifdef _KERNEL
40 
41 extern void	lock_set(lock_t *lp);
42 extern int	lock_try(lock_t *lp);
43 extern int	lock_spin_try(lock_t *lp);
44 extern int	ulock_try(lock_t *lp);
45 extern void	ulock_clear(lock_t *lp);
46 extern void	lock_clear(lock_t *lp);
47 extern void	lock_set_spl(lock_t *lp, int new_pil, ushort_t *old_pil);
48 extern void	lock_clear_splx(lock_t *lp, int s);
49 
50 #endif	/* _KERNEL */
51 
52 #define	LOCK_HELD_VALUE		0xff
53 #define	LOCK_INIT_CLEAR(lp)	(*(lp) = 0)
54 #define	LOCK_INIT_HELD(lp)	(*(lp) = LOCK_HELD_VALUE)
55 #define	LOCK_HELD(lp)		(*(volatile lock_t *)(lp) != 0)
56 
57 typedef	lock_t	disp_lock_t;		/* dispatcher lock type */
58 
59 /*
60  * SPIN_LOCK() macro indicates whether lock is implemented as a spin lock or
61  * an adaptive mutex, depending on what interrupt levels use it.
62  */
63 #define	SPIN_LOCK(pl)	((pl) > ipltospl(LOCK_LEVEL))
64 
65 /*
66  * Macro to control loops which spin on a lock and then check state
67  * periodically.  Its passed an integer, and returns a boolean value
68  * that if true indicates its a good time to get the scheduler lock and
69  * check the state of the current owner of the lock.
70  */
71 #define	LOCK_SAMPLE_INTERVAL(i)	(((i) & 0xff) == 0)
72 
73 /*
74  * Extern for CLOCK_LOCK.
75  */
76 extern	volatile int	hres_lock;
77 
78 #endif	/* _ASM */
79 
80 /*
81  * The definitions of the symbolic interrupt levels:
82  *
83  *   CLOCK_LEVEL =>  The level at which one must be to block the clock.
84  *
85  *   LOCK_LEVEL  =>  The highest level at which one may block (and thus the
86  *                   highest level at which one may acquire adaptive locks)
87  *                   Also the highest level at which one may be preempted.
88  *
89  *   DISP_LEVEL  =>  The level at which one must be to perform dispatcher
90  *                   operations.
91  *
92  * The constraints on the platform:
93  *
94  *  - CLOCK_LEVEL must be less than or equal to LOCK_LEVEL
95  *  - LOCK_LEVEL must be less than DISP_LEVEL
96  *  - DISP_LEVEL should be as close to LOCK_LEVEL as possible
97  *
98  * Note that LOCK_LEVEL and CLOCK_LEVEL have historically always been equal;
99  * changing this relationship is probably possible but not advised.
100  *
101  */
102 #define	CLOCK_LEVEL	10
103 #define	LOCK_LEVEL	10
104 #define	DISP_LEVEL	(LOCK_LEVEL + 1)
105 
106 #define	HIGH_LEVELS	(PIL_MAX - LOCK_LEVEL)
107 
108 #define	PIL_MAX		15
109 
110 /*
111  * The mutex and semaphore code depends on being able to represent a lock
112  * plus owner in a single 32-bit word.  Thus the owner must contain at most
113  * 24 significant bits.  At present only threads, mutexes and semaphores
114  * must be aware of this vile constraint.  Different ISAs may handle this
115  * differently depending on their capabilities (e.g. compare-and-swap)
116  * and limitations (e.g. constraints on alignment and/or KERNELBASE).
117  */
118 #define	PTR24_LSB	5			/* lower bits all zero */
119 #define	PTR24_MSB	(PTR24_LSB + 24)	/* upper bits all one */
120 #define	PTR24_ALIGN	32		/* minimum alignment (1 << lsb) */
121 #define	PTR24_BASE	0xe0000000	/* minimum ptr value (-1 >> (32-msb)) */
122 
123 #ifdef	__cplusplus
124 }
125 #endif
126 
127 #endif	/* _SYS_MACHLOCK_H */
128