1*7c478bd9Sstevel@tonic-gate /* 2*7c478bd9Sstevel@tonic-gate * CDDL HEADER START 3*7c478bd9Sstevel@tonic-gate * 4*7c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*7c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*7c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*7c478bd9Sstevel@tonic-gate * with the License. 8*7c478bd9Sstevel@tonic-gate * 9*7c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*7c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*7c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 12*7c478bd9Sstevel@tonic-gate * and limitations under the License. 13*7c478bd9Sstevel@tonic-gate * 14*7c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*7c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*7c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*7c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*7c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*7c478bd9Sstevel@tonic-gate * 20*7c478bd9Sstevel@tonic-gate * CDDL HEADER END 21*7c478bd9Sstevel@tonic-gate */ 22*7c478bd9Sstevel@tonic-gate /* 23*7c478bd9Sstevel@tonic-gate * Copyright (c) 1986 by Sun Microsystems, Inc. 24*7c478bd9Sstevel@tonic-gate */ 25*7c478bd9Sstevel@tonic-gate 26*7c478bd9Sstevel@tonic-gate #ifndef _SYS_FSR_H 27*7c478bd9Sstevel@tonic-gate #define _SYS_FSR_H 28*7c478bd9Sstevel@tonic-gate 29*7c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" /* from SunOS psl.h 1.2 */ 30*7c478bd9Sstevel@tonic-gate 31*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 32*7c478bd9Sstevel@tonic-gate extern "C" { 33*7c478bd9Sstevel@tonic-gate #endif 34*7c478bd9Sstevel@tonic-gate 35*7c478bd9Sstevel@tonic-gate 36*7c478bd9Sstevel@tonic-gate /* 37*7c478bd9Sstevel@tonic-gate * Floating Point State Register (FSR) 38*7c478bd9Sstevel@tonic-gate * 39*7c478bd9Sstevel@tonic-gate * Notes: 40*7c478bd9Sstevel@tonic-gate * On v9 cpus, the fsr is 64b. 41*7c478bd9Sstevel@tonic-gate * On v7 and v8 cpus, it is 32b. 42*7c478bd9Sstevel@tonic-gate * 43*7c478bd9Sstevel@tonic-gate * FCC1 thru FCC3 are v9 only. 44*7c478bd9Sstevel@tonic-gate * RP is v7 only (v8 dropped extended precision). 45*7c478bd9Sstevel@tonic-gate * PR was dropped before v7. 46*7c478bd9Sstevel@tonic-gate * 47*7c478bd9Sstevel@tonic-gate * |------------------------------------------------------------------------| 48*7c478bd9Sstevel@tonic-gate * | --- | FCC3 | FCC2 | FCC1 | 49*7c478bd9Sstevel@tonic-gate * |---------------------------------------------------|------|------|------| 50*7c478bd9Sstevel@tonic-gate * 63 38 37 36 35 34 33 32 51*7c478bd9Sstevel@tonic-gate * 52*7c478bd9Sstevel@tonic-gate * |------------------------------------------------------------------------| 53*7c478bd9Sstevel@tonic-gate * | RD | RP | TEM | NS | --- | VER | FTT | QNE | PR | FCC0 | AEXC | CEXC | 54*7c478bd9Sstevel@tonic-gate * |-----|-----|-----|----|-----|-----|-----|-----|----|------|------|------| 55*7c478bd9Sstevel@tonic-gate * 31 30 29 28 27 23 22 21 20 19 17 16 14 13 12 11 10 9 5 4 0 56*7c478bd9Sstevel@tonic-gate */ 57*7c478bd9Sstevel@tonic-gate #define FSR_CEXC 0x0000001f /* Current Exception */ 58*7c478bd9Sstevel@tonic-gate #define FSR_AEXC 0x000003e0 /* ieee accrued exceptions */ 59*7c478bd9Sstevel@tonic-gate #define FSR_FCC 0x00000c00 /* Floating-point Condition Codes */ 60*7c478bd9Sstevel@tonic-gate #define FSR_PR 0x00001000 /* Partial Remainder */ 61*7c478bd9Sstevel@tonic-gate #define FSR_QNE 0x00002000 /* Queue not empty */ 62*7c478bd9Sstevel@tonic-gate #define FSR_FTT 0x0001c000 /* Floating-point Trap Type */ 63*7c478bd9Sstevel@tonic-gate #define FSR_VER 0x000e0000 /* fpu version */ 64*7c478bd9Sstevel@tonic-gate #define FSR_TEM 0x0f800000 /* ieee Trap Enable Mask */ 65*7c478bd9Sstevel@tonic-gate #define FSR_RP 0x30000000 /* Rounding Precision */ 66*7c478bd9Sstevel@tonic-gate #define FSR_RD 0xc0000000 /* Rounding Direction */ 67*7c478bd9Sstevel@tonic-gate #define FSR_VER_SHIFT 17 /* version shift */ 68*7c478bd9Sstevel@tonic-gate #define FSR_FCC1 0x00000003 /* fp condition codes set #1 */ 69*7c478bd9Sstevel@tonic-gate #define FSR_FCC2 0x0000000C /* fp condition codes set #2 */ 70*7c478bd9Sstevel@tonic-gate #define FSR_FCC3 0x00000030 /* fp condition codes set #3 */ 71*7c478bd9Sstevel@tonic-gate 72*7c478bd9Sstevel@tonic-gate /* 73*7c478bd9Sstevel@tonic-gate * Definition of CEXC (Current EXCeption) bit field of fsr 74*7c478bd9Sstevel@tonic-gate */ 75*7c478bd9Sstevel@tonic-gate #define FSR_CEXC_NX 0x00000001 /* inexact */ 76*7c478bd9Sstevel@tonic-gate #define FSR_CEXC_DZ 0x00000002 /* divide-by-zero */ 77*7c478bd9Sstevel@tonic-gate #define FSR_CEXC_UF 0x00000004 /* underflow */ 78*7c478bd9Sstevel@tonic-gate #define FSR_CEXC_OF 0x00000008 /* overflow */ 79*7c478bd9Sstevel@tonic-gate #define FSR_CEXC_NV 0x00000010 /* invalid */ 80*7c478bd9Sstevel@tonic-gate 81*7c478bd9Sstevel@tonic-gate /* 82*7c478bd9Sstevel@tonic-gate * Definition of AEXC (Accrued EXCeption) bit field of fsr 83*7c478bd9Sstevel@tonic-gate */ 84*7c478bd9Sstevel@tonic-gate #define FSR_AEXC_NX (0x1 << 5) /* inexact */ 85*7c478bd9Sstevel@tonic-gate #define FSR_AEXC_DZ (0x2 << 5) /* divide-by-zero */ 86*7c478bd9Sstevel@tonic-gate #define FSR_AEXC_UF (0x4 << 5) /* underflow */ 87*7c478bd9Sstevel@tonic-gate #define FSR_AEXC_OF (0x8 << 5) /* overflow */ 88*7c478bd9Sstevel@tonic-gate #define FSR_AEXC_NV (0x10 << 5) /* invalid */ 89*7c478bd9Sstevel@tonic-gate 90*7c478bd9Sstevel@tonic-gate /* 91*7c478bd9Sstevel@tonic-gate * Definition of FTT (Floating-point Trap Type) field within the FSR 92*7c478bd9Sstevel@tonic-gate */ 93*7c478bd9Sstevel@tonic-gate #define FTT_NONE 0 /* no exceptions */ 94*7c478bd9Sstevel@tonic-gate #define FTT_IEEE 1 /* IEEE exception */ 95*7c478bd9Sstevel@tonic-gate #define FTT_UNFIN 2 /* unfinished fpop */ 96*7c478bd9Sstevel@tonic-gate #define FTT_UNIMP 3 /* unimplemented fpop */ 97*7c478bd9Sstevel@tonic-gate #define FTT_SEQ 4 /* sequence error */ 98*7c478bd9Sstevel@tonic-gate #define FTT_ALIGN 5 /* alignment, by software convention */ 99*7c478bd9Sstevel@tonic-gate #define FTT_DFAULT 6 /* data fault, by software convention */ 100*7c478bd9Sstevel@tonic-gate #define FSR_FTT_SHIFT 14 /* shift needed to justify ftt field */ 101*7c478bd9Sstevel@tonic-gate #define FSR_FTT_IEEE (FTT_IEEE << FSR_FTT_SHIFT) 102*7c478bd9Sstevel@tonic-gate #define FSR_FTT_UNFIN (FTT_UNFIN << FSR_FTT_SHIFT) 103*7c478bd9Sstevel@tonic-gate #define FSR_FTT_UNIMP (FTT_UNIMP << FSR_FTT_SHIFT) 104*7c478bd9Sstevel@tonic-gate #define FSR_FTT_SEQ (FTT_SEQ << FSR_FTT_SHIFT) 105*7c478bd9Sstevel@tonic-gate #define FSR_FTT_ALIGN (FTT_ALIGN << FSR_FTT_SHIFT) 106*7c478bd9Sstevel@tonic-gate #define FSR_FTT_DFAULT (FTT_DFAULT << FSR_FTT_SHIFT) 107*7c478bd9Sstevel@tonic-gate 108*7c478bd9Sstevel@tonic-gate /* 109*7c478bd9Sstevel@tonic-gate * Definition of TEM (Trap Enable Mask) bit field of fsr 110*7c478bd9Sstevel@tonic-gate */ 111*7c478bd9Sstevel@tonic-gate #define FSR_TEM_NX (0x1 << 23) /* inexact */ 112*7c478bd9Sstevel@tonic-gate #define FSR_TEM_DZ (0x2 << 23) /* divide-by-zero */ 113*7c478bd9Sstevel@tonic-gate #define FSR_TEM_UF (0x4 << 23) /* underflow */ 114*7c478bd9Sstevel@tonic-gate #define FSR_TEM_OF (0x8 << 23) /* overflow */ 115*7c478bd9Sstevel@tonic-gate #define FSR_TEM_NV (0x10 << 23) /* invalid */ 116*7c478bd9Sstevel@tonic-gate 117*7c478bd9Sstevel@tonic-gate /* 118*7c478bd9Sstevel@tonic-gate * Definition of RP (Rounding Precision) field of fsr 119*7c478bd9Sstevel@tonic-gate */ 120*7c478bd9Sstevel@tonic-gate #define RP_DBLEXT 0 /* double-extended */ 121*7c478bd9Sstevel@tonic-gate #define RP_SINGLE 1 /* single */ 122*7c478bd9Sstevel@tonic-gate #define RP_DOUBLE 2 /* double */ 123*7c478bd9Sstevel@tonic-gate #define RP_RESERVED 3 /* unused and reserved */ 124*7c478bd9Sstevel@tonic-gate 125*7c478bd9Sstevel@tonic-gate /* 126*7c478bd9Sstevel@tonic-gate * Definition of RD (Rounding Direction) field of fsr 127*7c478bd9Sstevel@tonic-gate */ 128*7c478bd9Sstevel@tonic-gate #define RD_NEAR 0 /* nearest or even if tie */ 129*7c478bd9Sstevel@tonic-gate #define RD_ZER0 1 /* to zero */ 130*7c478bd9Sstevel@tonic-gate #define RD_POSINF 2 /* positive infinity */ 131*7c478bd9Sstevel@tonic-gate #define RD_NEGINF 3 /* negative infinity */ 132*7c478bd9Sstevel@tonic-gate 133*7c478bd9Sstevel@tonic-gate 134*7c478bd9Sstevel@tonic-gate /* 135*7c478bd9Sstevel@tonic-gate * Floating Point Registers State (FPRS) 136*7c478bd9Sstevel@tonic-gate * (For V9 only) 137*7c478bd9Sstevel@tonic-gate * 138*7c478bd9Sstevel@tonic-gate * |---------------| 139*7c478bd9Sstevel@tonic-gate * | FEF | DU | DL | 140*7c478bd9Sstevel@tonic-gate * |-----|----|----| 141*7c478bd9Sstevel@tonic-gate * 2 1 0 142*7c478bd9Sstevel@tonic-gate */ 143*7c478bd9Sstevel@tonic-gate #define FPRS_DL 0x1 /* dirty lower */ 144*7c478bd9Sstevel@tonic-gate #define FPRS_DU 0x2 /* dirty upper */ 145*7c478bd9Sstevel@tonic-gate #define FPRS_FEF 0x4 /* enable fp */ 146*7c478bd9Sstevel@tonic-gate 147*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 148*7c478bd9Sstevel@tonic-gate } 149*7c478bd9Sstevel@tonic-gate #endif 150*7c478bd9Sstevel@tonic-gate 151*7c478bd9Sstevel@tonic-gate #endif /* _SYS_FSR_H */ 152