1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_FPU_FPU_SIMULATOR_H 27 #define _SYS_FPU_FPU_SIMULATOR_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 /* SunOS-4.0 1.10 */ 31 32 /* 33 * sparc floating-point simulator definitions. 34 */ 35 36 #ifndef _ASM 37 #include <sys/types.h> 38 #include <sys/ieeefp.h> 39 #include <vm/seg.h> 40 #include <sys/kstat.h> 41 #endif /* _ASM */ 42 43 #ifdef __cplusplus 44 extern "C" { 45 #endif 46 47 /* 48 * Constants to decode/extract "fitos" instruction fields 49 */ 50 #define FITOS_INSTR_MASK 0xc1f83fe0 51 #define FITOS_INSTR 0x81a01880 52 #define FITOS_RS2_SHIFT 0 53 #define FITOS_RD_SHIFT 25 54 #define FITOS_REG_MASK 0x1f 55 56 #ifndef _ASM 57 /* PUBLIC TYPES */ 58 59 enum fcc_type { /* relationships */ 60 fcc_equal = 0, 61 fcc_less = 1, 62 fcc_greater = 2, 63 fcc_unordered = 3 64 }; 65 66 enum cc_type { /* icc/fcc number */ 67 fcc_0 = 0, 68 fcc_1 = 1, 69 fcc_2 = 2, 70 fcc_3 = 3, 71 icc = 4, 72 xcc = 6 73 }; 74 75 /* FSR types. */ 76 77 enum ftt_type { /* types of traps */ 78 ftt_none = 0, 79 ftt_ieee = 1, 80 ftt_unfinished = 2, 81 ftt_unimplemented = 3, 82 ftt_sequence = 4, 83 ftt_alignment = 5, /* defined by software convention only */ 84 ftt_fault = 6, /* defined by software convention only */ 85 ftt_7 = 7 86 }; 87 88 typedef struct { /* sparc V9 FSR. */ 89 unsigned int : 26; 90 unsigned int fcc3 : 2; /* fp condition code 3 */ 91 unsigned int fcc2 : 2; /* fp condition code 2 */ 92 unsigned int fcc1 : 2; /* fp condition code 1 */ 93 /* enum fp_direction_type */ 94 unsigned int rnd : 2; /* rounding direction */ 95 unsigned int rnp : 2; /* for v7 compatibility only */ 96 unsigned int tem : 5; /* trap enable mask */ 97 unsigned int ns : 1; /* non-standard */ 98 unsigned int : 5; 99 /* enum ftt_type */ 100 unsigned int ftt : 3; /* FPU trap type */ 101 unsigned int qne : 1; /* FPQ not empty */ 102 unsigned int pr : 1; /* partial result */ 103 /* enum fcc_type */ 104 unsigned int fcc : 2; /* fp condition code 0 */ 105 unsigned int aexc : 5; /* accumulated exceptions */ 106 unsigned int cexc : 5; /* current exception */ 107 } fsr_types; 108 109 /* 110 * The C compiler and the C spec do not support bitfields in a long long, 111 * as per fsr_types above, so don't hold your breath waiting for this 112 * workaround cruft to disappear. 113 */ 114 115 typedef union { 116 fsr_types fsr; 117 uint64_t ll; 118 } fsr_type; 119 120 #define fcc3 fsr.fcc3 121 #define fcc2 fsr.fcc2 122 #define fcc1 fsr.fcc1 123 #define fcc0 fsr.fcc 124 #define rnd fsr.rnd 125 #define rnp fsr.rnp 126 #define tem fsr.tem 127 #define aexc fsr.aexc 128 #define cexc fsr.cexc 129 130 typedef /* FPU register viewed as single components. */ 131 struct { 132 uint32_t sign : 1; 133 uint32_t exponent : 8; 134 uint32_t significand : 23; 135 } single_type; 136 137 typedef /* FPU register viewed as double components. */ 138 struct { 139 uint32_t sign : 1; 140 uint32_t exponent : 11; 141 uint32_t significand : 20; 142 } double_type; 143 144 typedef /* FPU register viewed as extended components. */ 145 struct { 146 uint32_t sign : 1; 147 uint32_t exponent : 15; 148 uint32_t significand : 16; 149 } extended_type; 150 151 typedef /* FPU register with multiple data views. */ 152 union { 153 int32_t int32_reg; 154 int64_t int64_reg; 155 uint32_t uint32_reg; 156 uint64_t uint64_reg; 157 float float_reg; 158 single_type single_reg; 159 double_type double_reg; 160 extended_type extended_reg; 161 } freg_type; 162 163 enum fp_op_type { /* Type specifiers in FPU instructions. */ 164 fp_op_int32 = 0, /* Not in hardware, but convenient to define. */ 165 fp_op_single = 1, 166 fp_op_double = 2, 167 fp_op_extended = 3, 168 fp_op_int64 = 4 169 }; 170 171 enum fp_opcode { /* FPU op codes, minus precision and leading 0. */ 172 fmovs = 0x0, 173 fnegs = 0x1, 174 fabss = 0x2, 175 fp_op_3 = 3, fp_op_4 = 4, fp_op_5 = 5, fp_op_6 = 6, fp_op_7 = 7, 176 fp_op_8 = 0x8, 177 fp_op_9 = 0x9, 178 fsqrt = 0xa, 179 fp_op_b = 0xb, fp_op_c = 0xc, fp_op_d = 0xd, 180 fp_op_e = 0xe, fp_op_f = 0xf, 181 fadd = 0x10, 182 fsub = 0x11, 183 fmul = 0x12, 184 fdiv = 0x13, 185 fcmp = 0x14, 186 fcmpe = 0x15, 187 fp_op_16 = 0x16, fp_op_17 = 0x17, 188 fp_op_18 = 0x18, 189 fp_op_19 = 0x19, 190 fsmuld = 0x1a, 191 fdmulx = 0x1b, 192 ftoll = 0x20, 193 flltos = 0x21, 194 flltod = 0x22, 195 flltox = 0x23, 196 fp_op_24 = 0x24, fp_op_25 = 0x25, fp_op_26 = 0x26, fp_op_27 = 0x27, 197 fp_op_28 = 0x28, fp_op_29 = 0x29, fp_op_2a = 0x2a, fp_op_2b = 0x2b, 198 fp_op_2c = 0x2c, fp_op_2d = 0x2d, fp_op_2e = 0x2e, fp_op_2f = 0x2f, 199 fp_op_30 = 0x30, 200 fitos = 0x31, 201 fitod = 0x32, 202 fitox = 0x33, 203 ftoi = 0x34, 204 fp_op_35 = 0x35, fp_op_36 = 0x36, fp_op_37 = 0x37, 205 ft_op_38 = 0x38, 206 fp_op_39 = 0x39, fp_op_3a = 0x3a, fp_op_3b = 0x3b, 207 fp_op_3c = 0x3c, 208 fp_op_3d = 0x3d, fp_op_3e = 0x3e, fp_op_3f = 0x3f 209 }; 210 211 typedef /* FPU instruction. */ 212 struct { 213 uint32_t hibits : 2; /* Top two bits. */ 214 uint32_t rd : 5; /* Destination. */ 215 uint32_t op3 : 6; /* Main op code. */ 216 uint32_t rs1 : 5; /* First operand. */ 217 uint32_t ibit : 1; /* I format bit. */ 218 uint32_t /* enum fp_opcode */ opcode : 6; /* Floating-point op code. */ 219 uint32_t /* enum fp_op_type */ prec : 2; /* Precision. */ 220 uint32_t rs2 : 5; /* Second operand. */ 221 } fp_inst_type; 222 223 enum fp_op_fma_var { /* IMPDEP2B FMA-fused instr. variations */ 224 fmadd = 0, 225 fmsub = 1, 226 fnmsub = 2, 227 fnmadd = 3 228 }; 229 230 typedef /* IMPDEP2B FPU FMA-fused instruction. */ 231 struct { 232 uint32_t hibits : 2; /* Top two bits. */ 233 uint32_t rd : 5; /* Destination. */ 234 uint32_t op3 : 6; /* Main op code. */ 235 uint32_t rs1 : 5; /* First operand. */ 236 uint32_t rs3 : 5; /* Third operand */ 237 uint32_t /* enum fp_op_fma_var */ var : 2; /* Instr. variation */ 238 uint32_t sz : 2; /* Size */ 239 uint32_t rs2 : 5; /* Second operand. */ 240 } fp_fma_inst_type; 241 242 typedef /* Integer condition code. */ 243 struct { 244 uint32_t : 28; /* the unused part */ 245 uint32_t n : 1; /* Negative bit. */ 246 uint32_t z : 1; /* Zero bit. */ 247 uint32_t v : 1; /* Overflow bit. */ 248 uint32_t c : 1; /* Carry bit. */ 249 } ccr_type; 250 251 typedef /* FPU data used by simulator. */ 252 struct { 253 uint_t fp_fsrtem; 254 enum fp_direction_type fp_direction; 255 enum fp_precision_type fp_precision; 256 uint_t fp_current_exceptions; 257 kfpu_t *fp_current_pfregs; 258 void (*fp_current_read_freg) (); 259 void (*fp_current_write_freg) (); 260 void (*fp_current_read_dreg) (); 261 void (*fp_current_write_dreg) (); 262 uint64_t (*fp_current_read_gsr) (kfpu_t *); 263 void (*fp_current_write_gsr) (uint64_t, kfpu_t *); 264 int fp_trapcode; 265 char *fp_trapaddr; 266 struct regs *fp_traprp; 267 enum seg_rw fp_traprw; 268 } fp_simd_type; 269 270 /* 271 * FPU related kstat structures 272 */ 273 struct fpustat_kstat { 274 struct kstat_named fpu_ieee_traps; 275 struct kstat_named fpu_unfinished_traps; 276 struct kstat_named fpu_unimplemented_traps; 277 }; 278 279 struct fpuinfo_kstat { 280 struct kstat_named fpu_sim_fmovs; 281 struct kstat_named fpu_sim_fmovd; 282 struct kstat_named fpu_sim_fmovq; 283 struct kstat_named fpu_sim_fnegs; 284 struct kstat_named fpu_sim_fnegd; 285 struct kstat_named fpu_sim_fnegq; 286 struct kstat_named fpu_sim_fabss; 287 struct kstat_named fpu_sim_fabsd; 288 struct kstat_named fpu_sim_fabsq; 289 struct kstat_named fpu_sim_fsqrts; 290 struct kstat_named fpu_sim_fsqrtd; 291 struct kstat_named fpu_sim_fsqrtq; 292 struct kstat_named fpu_sim_fadds; 293 struct kstat_named fpu_sim_faddd; 294 struct kstat_named fpu_sim_faddq; 295 struct kstat_named fpu_sim_fsubs; 296 struct kstat_named fpu_sim_fsubd; 297 struct kstat_named fpu_sim_fsubq; 298 struct kstat_named fpu_sim_fmuls; 299 struct kstat_named fpu_sim_fmuld; 300 struct kstat_named fpu_sim_fmulq; 301 struct kstat_named fpu_sim_fdivs; 302 struct kstat_named fpu_sim_fdivd; 303 struct kstat_named fpu_sim_fdivq; 304 struct kstat_named fpu_sim_fcmps; 305 struct kstat_named fpu_sim_fcmpd; 306 struct kstat_named fpu_sim_fcmpq; 307 struct kstat_named fpu_sim_fcmpes; 308 struct kstat_named fpu_sim_fcmped; 309 struct kstat_named fpu_sim_fcmpeq; 310 struct kstat_named fpu_sim_fsmuld; 311 struct kstat_named fpu_sim_fdmulx; 312 struct kstat_named fpu_sim_fstox; 313 struct kstat_named fpu_sim_fdtox; 314 struct kstat_named fpu_sim_fqtox; 315 struct kstat_named fpu_sim_fxtos; 316 struct kstat_named fpu_sim_fxtod; 317 struct kstat_named fpu_sim_fxtoq; 318 struct kstat_named fpu_sim_fitos; 319 struct kstat_named fpu_sim_fitod; 320 struct kstat_named fpu_sim_fitoq; 321 struct kstat_named fpu_sim_fstoi; 322 struct kstat_named fpu_sim_fdtoi; 323 struct kstat_named fpu_sim_fqtoi; 324 struct kstat_named fpu_sim_fmovcc; 325 struct kstat_named fpu_sim_fmovr; 326 struct kstat_named fpu_sim_fmadds; 327 struct kstat_named fpu_sim_fmaddd; 328 struct kstat_named fpu_sim_fmsubs; 329 struct kstat_named fpu_sim_fmsubd; 330 struct kstat_named fpu_sim_fnmadds; 331 struct kstat_named fpu_sim_fnmaddd; 332 struct kstat_named fpu_sim_fnmsubs; 333 struct kstat_named fpu_sim_fnmsubd; 334 struct kstat_named fpu_sim_invalid; 335 }; 336 337 struct visinfo_kstat { 338 struct kstat_named vis_edge8; 339 struct kstat_named vis_edge8n; 340 struct kstat_named vis_edge8l; 341 struct kstat_named vis_edge8ln; 342 struct kstat_named vis_edge16; 343 struct kstat_named vis_edge16n; 344 struct kstat_named vis_edge16l; 345 struct kstat_named vis_edge16ln; 346 struct kstat_named vis_edge32; 347 struct kstat_named vis_edge32n; 348 struct kstat_named vis_edge32l; 349 struct kstat_named vis_edge32ln; 350 struct kstat_named vis_array8; 351 struct kstat_named vis_array16; 352 struct kstat_named vis_array32; 353 struct kstat_named vis_bmask; 354 struct kstat_named vis_fcmple16; 355 struct kstat_named vis_fcmpne16; 356 struct kstat_named vis_fcmpgt16; 357 struct kstat_named vis_fcmpeq16; 358 struct kstat_named vis_fcmple32; 359 struct kstat_named vis_fcmpne32; 360 struct kstat_named vis_fcmpgt32; 361 struct kstat_named vis_fcmpeq32; 362 struct kstat_named vis_fmul8x16; 363 struct kstat_named vis_fmul8x16au; 364 struct kstat_named vis_fmul8x16al; 365 struct kstat_named vis_fmul8sux16; 366 struct kstat_named vis_fmul8ulx16; 367 struct kstat_named vis_fmuld8sux16; 368 struct kstat_named vis_fmuld8ulx16; 369 struct kstat_named vis_fpack16; 370 struct kstat_named vis_fpack32; 371 struct kstat_named vis_fpackfix; 372 struct kstat_named vis_fexpand; 373 struct kstat_named vis_fpmerge; 374 struct kstat_named vis_pdist; 375 struct kstat_named vis_bshuffle; 376 }; 377 378 #define VISINFO_KSTAT(opcode) { \ 379 extern void __dtrace_probe___visinfo_##opcode(uint64_t *); \ 380 uint64_t *stataddr = &visinfo.opcode.value.ui64; \ 381 __dtrace_probe___visinfo_##opcode(stataddr); \ 382 atomic_add_64(&visinfo.opcode.value.ui64, 1); \ 383 } 384 385 386 /* PUBLIC FUNCTIONS */ 387 388 #ifdef __STDC__ 389 390 /* 391 * fpu_vis_sim simulates FPU VIS Partial load store instructions; reads and 392 * writes FPU data registers directly or works with the PCB image if fpu_exists 393 * is 0. 394 */ 395 extern enum ftt_type fpu_vis_sim(fp_simd_type *pfpsd, fp_inst_type *pinst, 396 struct regs *pregs, fsr_type *pfsr, uint64_t gsr, uint32_t inst); 397 /* 398 * fpu_simulator simulates FPU instructions only; reads and writes FPU data 399 * registers directly. 400 */ 401 extern enum ftt_type fpu_simulator(fp_simd_type *pfpsd, fp_inst_type *pinst, 402 fsr_type *pfsr, uint64_t gsr, uint32_t inst); 403 /* 404 * fp_emulator simulates FPU and CPU-FPU instructions; reads and writes FPU 405 * data registers from image in pfpu. 406 */ 407 extern enum ftt_type fp_emulator(fp_simd_type *pfpsd, fp_inst_type *pinst, 408 struct regs *rp, void *prw, kfpu_t *pfpu); 409 /* 410 * fp_traps handles passing exception conditions to the kernel. 411 * It is called after fp_simulator or fp_emulator fail (return a non-zero ftt). 412 */ 413 extern void fp_traps(fp_simd_type *pfpsd, enum ftt_type ftt, struct regs *rp); 414 415 /* 416 * fp_kstat_update tracks fpu exception conditions. 417 * It is called after a hardware trap returns a non-zero ftt. 418 */ 419 extern void fp_kstat_update(enum ftt_type ftt); 420 421 /* 422 * fp_precise handles floating point unimplemented and unfinished traps, 423 * for sparc V9 hardware. These traps are normally passed along to the 424 * fpu_simulator, to see if it can run the unimplemented instruction or 425 * finish the unfinished instruction. Needless to say, this takes time. 426 */ 427 extern void fp_precise(struct regs *rp); 428 429 /* 430 * fpu_trap handles V9 floating point ieee and other floating point traps. 431 * It is called after fp_simulator or fp_emulator fail (return a non-zero ftt), 432 * and from the _fp_ieee_exception trap handler. 433 */ 434 extern void fpu_trap(struct regs *rp, caddr_t addr, uint32_t type, 435 uint32_t code); 436 437 #else /* ! __STDC__ */ 438 439 /* 440 * fpu_simulator simulates FPU instructions only; reads and writes FPU data 441 * registers directly. 442 */ 443 extern enum ftt_type fpu_simulator( 444 fp_simd_type *pfpsd, /* Pointer to FPU simulator data */ 445 fp_inst_type *pinst, /* Pointer to FPU instruction to simulate. */ 446 fsr_type *pfsr, /* Pointer to image of FSR to read & write. */ 447 int instr); /* Instruction to emulate. */ 448 449 /* 450 * fp_emulator simulates FPU and CPU-FPU instructions; reads and writes FPU 451 * data registers from image in pfpu. 452 */ 453 extern enum ftt_type fp_emulator( 454 fp_simd_type *pfpsd, /* Pointer to FPU simulator data */ 455 fp_inst_type *pinst, /* Pointer to FPU instruction to simulate. */ 456 struct regs *pregs, /* Pointer to PCB image of registers. */ 457 struct rwindow *pwindow, /* Pointer to locals and ins. */ 458 struct fpu *pfpu); /* Pointer to FPU register block. */ 459 460 /* 461 * fp_traps handles passing exception conditions to the kernel. 462 * It is called after fp_simulator or fp_emulator fail (return a non-zero ftt). 463 */ 464 extern void fp_traps( 465 fp_simd_type *pfpsd, /* Pointer to FPU simulator data */ 466 enum ftt_type ftt, /* Type of trap. */ 467 struct regs *rp); /* Pointer to PCB image of registers. */ 468 469 /* 470 * fp_kstat_update tracks fpu exception conditions. 471 * It is called after a hardware trap returns a non-zero ftt. 472 */ 473 extern void fp_kstat_update(enum ftt_type ftt); /* Type of trap. */ 474 475 /* 476 * fp_precise handles floating point unimplemented and unfinished traps, 477 * for sparc V9 hardware. These traps are normally passed along to the 478 * fpu_simulator, to see if it can run the unimplemented instruction or 479 * finish the unfinished instruction. Needless to say, this takes time. 480 */ 481 extern void fp_precise( 482 struct regs *rp); /* Pointer to PCB image of registers. */ 483 484 /* 485 * fpu_trap handles V9 floating point ieee and other floating point traps. 486 * It is called after fp_simulator or fp_emulator fail (return a non-zero ftt), 487 * and from the _fp_ieee_exception trap handler. 488 */ 489 extern void fpu_trap( 490 struct regs *rp, /* Pointer to PCB image of registers. */ 491 caddr_t addr, /* Address of trapping instruction. */ 492 uint32_t type, /* Type of trapping exception. */ 493 uint32_t code); /* Trap code -> si_code. */ 494 495 #endif /* __STDC__ */ 496 #endif /* _ASM */ 497 498 #ifdef __cplusplus 499 } 500 #endif 501 502 #endif /* _SYS_FPU_FPU_SIMULATOR_H */ 503