xref: /illumos-gate/usr/src/uts/intel/io/vmxnet3s/vmxnet3.h (revision ca5345b6a28e9e9bfd0c135121d62c6b35a5390d)
1 /*
2  * Copyright (C) 2007-2014 VMware, Inc. All rights reserved.
3  *
4  * The contents of this file are subject to the terms of the Common
5  * Development and Distribution License (the "License") version 1.0
6  * and no later version.  You may not use this file except in
7  * compliance with the License.
8  *
9  * You can obtain a copy of the License at
10  *         http://www.opensource.org/licenses/cddl1.php
11  *
12  * See the License for the specific language governing permissions
13  * and limitations under the License.
14  */
15 
16 /*
17  * Copyright (c) 2012 by Delphix. All rights reserved.
18  */
19 
20 #ifndef	_VMXNET3_H_
21 #define	_VMXNET3_H_
22 
23 #include <sys/atomic.h>
24 #include <sys/types.h>
25 #include <sys/conf.h>
26 #include <sys/debug.h>
27 #include <sys/cmn_err.h>
28 #include <sys/stropts.h>
29 #include <sys/stream.h>
30 #include <sys/strlog.h>
31 #include <sys/kmem.h>
32 #include <sys/stat.h>
33 #include <sys/kstat.h>
34 #include <sys/vtrace.h>
35 #include <sys/dlpi.h>
36 #include <sys/strsun.h>
37 #include <sys/ethernet.h>
38 #include <sys/vlan.h>
39 #include <sys/modctl.h>
40 #include <sys/errno.h>
41 #include <sys/ddi.h>
42 #include <sys/sunddi.h>
43 #include <sys/ddi_impldefs.h>
44 #include <sys/pci.h>
45 #include <sys/strsubr.h>
46 #include <sys/pattr.h>
47 #include <sys/mac.h>
48 #include <sys/sockio.h>
49 #include <sys/mac_provider.h>
50 #include <sys/mac_ether.h>
51 #include <inet/common.h>
52 #include <inet/ip.h>
53 #include <inet/tcp.h>
54 
55 #include <vmxnet3_defs.h>
56 
57 typedef struct vmxnet3_dmabuf_t {
58 	caddr_t		buf;
59 	uint64_t	bufPA;
60 	size_t		bufLen;
61 	ddi_dma_handle_t dmaHandle;
62 	ddi_acc_handle_t dataHandle;
63 } vmxnet3_dmabuf_t;
64 
65 typedef struct vmxnet3_cmdring_t {
66 	vmxnet3_dmabuf_t dma;
67 	uint16_t	size;
68 	uint16_t	next2fill;
69 	uint16_t	avail;
70 	uint8_t		gen;
71 } vmxnet3_cmdring_t;
72 
73 typedef struct vmxnet3_compring_t {
74 	vmxnet3_dmabuf_t dma;
75 	uint16_t	size;
76 	uint16_t	next2comp;
77 	uint8_t		gen;
78 } vmxnet3_compring_t;
79 
80 typedef struct vmxnet3_metatx_t {
81 	mblk_t		*mp;
82 	uint16_t	sopIdx;
83 	uint16_t	frags;
84 } vmxnet3_metatx_t;
85 
86 typedef struct vmxnet3_txqueue_t {
87 	vmxnet3_cmdring_t cmdRing;
88 	vmxnet3_compring_t compRing;
89 	vmxnet3_metatx_t *metaRing;
90 	Vmxnet3_TxQueueCtrl *sharedCtrl;
91 } vmxnet3_txqueue_t;
92 
93 typedef struct vmxnet3_rxbuf_t {
94 	vmxnet3_dmabuf_t dma;
95 	mblk_t		*mblk;
96 	frtn_t		freeCB;
97 	struct vmxnet3_softc_t *dp;
98 	struct vmxnet3_rxbuf_t *next;
99 } vmxnet3_rxbuf_t;
100 
101 typedef struct vmxnet3_bufdesc_t {
102 	vmxnet3_rxbuf_t	*rxBuf;
103 } vmxnet3_bufdesc_t;
104 
105 typedef struct vmxnet3_rxpool_t {
106 	vmxnet3_rxbuf_t	*listHead;
107 	unsigned int	nBufs;
108 	unsigned int	nBufsLimit;
109 } vmxnet3_rxpool_t;
110 
111 typedef struct vmxnet3_rxqueue_t {
112 	vmxnet3_cmdring_t cmdRing;
113 	vmxnet3_compring_t compRing;
114 	vmxnet3_bufdesc_t *bufRing;
115 	Vmxnet3_RxQueueCtrl *sharedCtrl;
116 } vmxnet3_rxqueue_t;
117 
118 typedef struct vmxnet3_softc_t {
119 	dev_info_t	*dip;
120 	int		instance;
121 	mac_handle_t	mac;
122 
123 	ddi_acc_handle_t pciHandle;
124 	ddi_acc_handle_t bar0Handle, bar1Handle;
125 	caddr_t		bar0, bar1;
126 
127 	boolean_t	devEnabled;
128 	uint8_t		macaddr[6];
129 	uint32_t	cur_mtu;
130 	boolean_t	allow_jumbo;
131 	link_state_t	linkState;
132 	uint64_t	linkSpeed;
133 	vmxnet3_dmabuf_t sharedData;
134 	vmxnet3_dmabuf_t queueDescs;
135 
136 	kmutex_t	intrLock;
137 	int		intrType;
138 	int		intrMaskMode;
139 	int		intrCap;
140 	ddi_intr_handle_t intrHandle;
141 	ddi_taskq_t	*resetTask;
142 
143 	kmutex_t	txLock;
144 	vmxnet3_txqueue_t txQueue;
145 	ddi_dma_handle_t txDmaHandle;
146 	boolean_t	txMustResched;
147 
148 	vmxnet3_rxqueue_t rxQueue;
149 	kmutex_t	rxPoolLock;
150 	vmxnet3_rxpool_t rxPool;
151 	volatile uint32_t rxNumBufs;
152 	uint32_t	rxMode;
153 
154 	vmxnet3_dmabuf_t mfTable;
155 	kstat_t		*devKstats;
156 	uint32_t	reset_count;
157 	uint32_t	tx_pullup_needed;
158 	uint32_t	tx_pullup_failed;
159 	uint32_t	tx_ring_full;
160 	uint32_t	tx_error;
161 	uint32_t	rx_alloc_buf;
162 	uint32_t	rx_alloc_failed;
163 } vmxnet3_softc_t;
164 
165 typedef struct vmxnet3_kstats_t {
166 	kstat_named_t	reset_count;
167 	kstat_named_t	tx_pullup_needed;
168 	kstat_named_t	tx_ring_full;
169 	kstat_named_t	rx_alloc_buf;
170 } vmxnet3_kstats_t;
171 
172 int	vmxnet3_alloc_dma_mem_1(vmxnet3_softc_t *dp, vmxnet3_dmabuf_t *dma,
173 	    size_t size, boolean_t canSleep);
174 int	vmxnet3_alloc_dma_mem_128(vmxnet3_softc_t *dp, vmxnet3_dmabuf_t *dma,
175 	    size_t size, boolean_t canSleep);
176 int	vmxnet3_alloc_dma_mem_512(vmxnet3_softc_t *dp, vmxnet3_dmabuf_t *dma,
177 	    size_t size, boolean_t canSleep);
178 void	vmxnet3_free_dma_mem(vmxnet3_dmabuf_t *dma);
179 int	vmxnet3_getprop(vmxnet3_softc_t *dp, char *name, int min, int max,
180 	    int def);
181 
182 int	vmxnet3_txqueue_init(vmxnet3_softc_t *dp, vmxnet3_txqueue_t *txq);
183 mblk_t	*vmxnet3_tx(void *data, mblk_t *mps);
184 boolean_t vmxnet3_tx_complete(vmxnet3_softc_t *dp, vmxnet3_txqueue_t *txq);
185 void	vmxnet3_txqueue_fini(vmxnet3_softc_t *dp, vmxnet3_txqueue_t *txq);
186 
187 int	vmxnet3_rxqueue_init(vmxnet3_softc_t *dp, vmxnet3_rxqueue_t *rxq);
188 mblk_t	*vmxnet3_rx_intr(vmxnet3_softc_t *dp, vmxnet3_rxqueue_t *rxq);
189 void	vmxnet3_rxqueue_fini(vmxnet3_softc_t *dp, vmxnet3_rxqueue_t *rxq);
190 void	vmxnet3_log(int level, vmxnet3_softc_t *dp, char *fmt, ...);
191 
192 extern ddi_device_acc_attr_t vmxnet3_dev_attr;
193 
194 extern int vmxnet3s_debug;
195 
196 #define	VMXNET3_MODNAME	"vmxnet3s"
197 #define	VMXNET3_DRIVER_VERSION_STRING	"1.1.0.0"
198 
199 /* Logging stuff */
200 #define	VMXNET3_WARN(Device, ...) vmxnet3_log(CE_WARN, Device, __VA_ARGS__)
201 
202 #ifdef	DEBUG
203 #define	VMXNET3_DEBUG(Device, Level, ...) {			\
204 	if (Level <= vmxnet3s_debug) {				\
205 		vmxnet3_log(CE_CONT, Device, "?" __VA_ARGS__);	\
206 	}							\
207 }
208 #else
209 #define	VMXNET3_DEBUG(Device, Level, ...)
210 #endif
211 
212 #define	MACADDR_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
213 #define	MACADDR_FMT_ARGS(mac) mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]
214 
215 /* Default ring size */
216 #define	VMXNET3_DEF_TX_RING_SIZE	256
217 #define	VMXNET3_DEF_RX_RING_SIZE	256
218 
219 /* Register access helpers */
220 #define	VMXNET3_BAR0_GET32(Device, Reg) \
221 	ddi_get32((Device)->bar0Handle, (uint32_t *)((Device)->bar0 + (Reg)))
222 #define	VMXNET3_BAR0_PUT32(Device, Reg, Value) \
223 	ddi_put32((Device)->bar0Handle, (uint32_t *)((Device)->bar0 + (Reg)), \
224 	    (Value))
225 #define	VMXNET3_BAR1_GET32(Device, Reg) \
226 	ddi_get32((Device)->bar1Handle, (uint32_t *)((Device)->bar1 + (Reg)))
227 #define	VMXNET3_BAR1_PUT32(Device, Reg, Value) \
228 	ddi_put32((Device)->bar1Handle, (uint32_t *)((Device)->bar1 + (Reg)), \
229 	    (Value))
230 
231 /* Misc helpers */
232 #define	VMXNET3_DS(Device) ((Vmxnet3_DriverShared *) (Device)->sharedData.buf)
233 #define	VMXNET3_TQDESC(Device) \
234 	((Vmxnet3_TxQueueDesc *) (Device)->queueDescs.buf)
235 #define	VMXNET3_RQDESC(Device) \
236 	((Vmxnet3_RxQueueDesc *) ((Device)->queueDescs.buf + \
237 	    sizeof (Vmxnet3_TxQueueDesc)))
238 
239 #define	VMXNET3_ADDR_LO(addr) ((uint32_t)(addr))
240 #define	VMXNET3_ADDR_HI(addr) ((uint32_t)(((uint64_t)(addr)) >> 32))
241 
242 #define	VMXNET3_GET_DESC(Ring, Idx) \
243 	(((Vmxnet3_GenericDesc *) (Ring)->dma.buf) + Idx)
244 
245 /* Rings handling */
246 #define	VMXNET3_INC_RING_IDX(Ring, Idx) {	\
247 	(Idx)++;				\
248 	if ((Idx) == (Ring)->size) {		\
249 		(Idx) = 0;			\
250 		(Ring)->gen ^= 1;		\
251 	}					\
252 }
253 
254 #define	VMXNET3_DEC_RING_IDX(Ring, Idx) {	\
255 	if ((Idx) == 0) {			\
256 		(Idx) = (Ring)->size;		\
257 		(Ring)->gen ^= 1;		\
258 	}					\
259 	(Idx)--;				\
260 }
261 
262 #define	PCI_VENDOR_ID_VMWARE		0x15AD
263 #define	PCI_DEVICE_ID_VMWARE_VMXNET3	0x07B0
264 
265 #endif /* _VMXNET3_H_ */
266