1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * Copyright 2023 Oxide Computer Company 29 */ 30 31 #include <sys/types.h> 32 #include <sys/cmn_err.h> 33 #include <sys/errno.h> 34 #include <sys/systm.h> 35 #include <sys/sunddi.h> 36 #include <sys/pci_cfgspace.h> 37 #include <sys/pci.h> 38 #include <sys/pcie.h> 39 #include <vm/seg_kmem.h> 40 #include <sys/mman.h> 41 #include <sys/cpu_module.h> 42 #include "intel_nhm.h" 43 44 static ddi_acc_handle_t dev_pci_hdl[MAX_CPU_NODES][CPU_PCI_DEVS][CPU_PCI_FUNCS]; 45 46 void 47 nhm_pci_cfg_setup(dev_info_t *dip) 48 { 49 pci_regspec_t reg; 50 int i, j, k; 51 52 reg.pci_phys_mid = 0; 53 reg.pci_phys_low = 0; 54 reg.pci_size_hi = 0; 55 reg.pci_size_low = PCIE_CONF_HDR_SIZE; /* overriden in pciex */ 56 for (i = 0; i < MAX_CPU_NODES; i++) { 57 for (j = 0; j < CPU_PCI_DEVS; j++) { 58 for (k = 0; k < CPU_PCI_FUNCS; k++) { 59 reg.pci_phys_hi = PCI_REG_MAKE_BDFR( 60 SOCKET_BUS(i), j, k, 0); 61 if (ddi_prop_update_int_array( 62 DDI_MAJOR_T_UNKNOWN, dip, "reg", 63 (int *)®, sizeof (reg)/sizeof (int)) != 64 DDI_PROP_SUCCESS) 65 cmn_err(CE_WARN, "nhm_pci_cfg_setup: " 66 "cannot create reg property"); 67 68 if (pci_config_setup(dip, 69 &dev_pci_hdl[i][j][k]) != DDI_SUCCESS) 70 cmn_err(CE_WARN, "intel_nhm: " 71 "pci_config_setup failed"); 72 } 73 } 74 } 75 ddi_prop_remove_all(dip); 76 } 77 78 void 79 nhm_pci_cfg_free() 80 { 81 int i, j, k; 82 83 for (i = 0; i < MAX_CPU_NODES; i++) { 84 for (j = 0; j < CPU_PCI_DEVS; j++) { 85 for (k = 0; k < CPU_PCI_FUNCS; k++) { 86 pci_config_teardown(&dev_pci_hdl[i][j][k]); 87 } 88 } 89 } 90 } 91 92 static ddi_acc_handle_t 93 nhm_get_hdl(int bus, int dev, int func) 94 { 95 ddi_acc_handle_t hdl; 96 int slot; 97 98 if (bus >= SOCKET_BUS(MAX_CPU_NODES) && bus <= SOCKET_BUS(0) && 99 dev < CPU_PCI_DEVS && func < CPU_PCI_FUNCS) { 100 slot = SOCKET_BUS(0) - bus; 101 ASSERT(slot >= 0 && slot < MAX_CPU_NODES); 102 hdl = dev_pci_hdl[slot][dev][func]; 103 } else { 104 hdl = 0; 105 } 106 return (hdl); 107 } 108 109 uint8_t 110 nhm_pci_getb(int bus, int dev, int func, int reg, int *interpose) 111 { 112 ddi_acc_handle_t hdl; 113 114 hdl = nhm_get_hdl(bus, dev, func); 115 return (cmi_pci_getb(bus, dev, func, reg, interpose, hdl)); 116 } 117 118 uint16_t 119 nhm_pci_getw(int bus, int dev, int func, int reg, int *interpose) 120 { 121 ddi_acc_handle_t hdl; 122 123 hdl = nhm_get_hdl(bus, dev, func); 124 return (cmi_pci_getw(bus, dev, func, reg, interpose, hdl)); 125 } 126 127 uint32_t 128 nhm_pci_getl(int bus, int dev, int func, int reg, int *interpose) 129 { 130 ddi_acc_handle_t hdl; 131 132 hdl = nhm_get_hdl(bus, dev, func); 133 return (cmi_pci_getl(bus, dev, func, reg, interpose, hdl)); 134 } 135 136 void 137 nhm_pci_putb(int bus, int dev, int func, int reg, uint8_t val) 138 { 139 ddi_acc_handle_t hdl; 140 141 hdl = nhm_get_hdl(bus, dev, func); 142 cmi_pci_putb(bus, dev, func, reg, hdl, val); 143 } 144 145 void 146 nhm_pci_putw(int bus, int dev, int func, int reg, uint16_t val) 147 { 148 ddi_acc_handle_t hdl; 149 150 hdl = nhm_get_hdl(bus, dev, func); 151 cmi_pci_putw(bus, dev, func, reg, hdl, val); 152 } 153 154 void 155 nhm_pci_putl(int bus, int dev, int func, int reg, uint32_t val) 156 { 157 ddi_acc_handle_t hdl; 158 159 hdl = nhm_get_hdl(bus, dev, func); 160 cmi_pci_putl(bus, dev, func, reg, hdl, val); 161 } 162