1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 1997 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _ATAPI_H 28 #define _ATAPI_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 37 /* 38 * Additional atapi status bits (redefinitions) 39 */ 40 #define ATE_ILI 0x01 /* Illegal length indication */ 41 #define ATE_EOM 0x02 /* End of media detected */ 42 #define ATE_MCR 0x08 /* Media change requested */ 43 #define ATS_SERVICE 0x10 /* overlap operation needs service */ 44 #define ATS_SENSE_KEY 0xf0 /* 4 bit sense key -see ata_sense_table */ 45 46 #define ATS_SENSE_KEY_SHIFT 4 /* shift to get to ATS_SENSE_KEY */ 47 48 /* 49 * Status bits from ATAPI Interrupt reason register (AT_COUNT) register 50 */ 51 #define ATI_COD 0x01 /* Command or Data */ 52 #define ATI_IO 0x02 /* IO direction */ 53 #define ATI_RELEASE 0x04 /* Release for ATAPI overlap */ 54 55 /* ATAPI feature reg definitions */ 56 57 #define ATF_OVERLAP 0x02 58 59 /* 60 * ATAPI IDENTIFY_DRIVE configuration word 61 */ 62 63 #define ATAPI_ID_CFG_PKT_SZ 0x3 64 #define ATAPI_ID_CFG_PKT_12B 0x0 65 #define ATAPI_ID_CFG_PKT_16B 0x1 66 #define ATAPI_ID_CFG_DRQ_TYPE 0x60 67 #define ATAPI_ID_CFG_DRQ_INTR 0x20 68 #define ATAPI_ID_CFG_DEV_TYPE 0x0f00 69 #define ATAPI_ID_CFG_DEV_SHFT 8 70 71 /* 72 * ATAPI IDENTIFY_DRIVE capabilities word 73 */ 74 75 #define ATAPI_ID_CAP_DMA 0x0100 76 #define ATAPI_ID_CAP_OVERLAP 0x2000 77 78 /* ATAPI SET FEATURE commands */ 79 80 #define ATAPI_FEAT_RELEASE_INTR 0x5d 81 #define ATAPI_FEAT_SERVICE_INTR 0x5e 82 83 /* 84 * ATAPI bits 85 */ 86 #define ATAPI_SIG_HI 0xeb /* in high cylinder register */ 87 #define ATAPI_SIG_LO 0x14 /* in low cylinder register */ 88 89 90 #define ATAPI_SECTOR_SIZE 2048 91 #define ATAPI_MAX_BYTES_PER_DRQ 0xf800 /* 16 bits - 2KB ie 62KB */ 92 #define ATAPI_HEADS 64 93 #define ATAPI_SECTORS_PER_TRK 32 94 95 /* Useful macros */ 96 97 #define TRAN2CTL(tran) ((ata_ctl_t *)((tran)->tran_hba_private)) 98 #define ADDR2CTL(ap) (TRAN2CTL(ADDR2TRAN(ap))) 99 100 #define SPKT2APKT(spkt) (GCMD2APKT(PKTP2GCMDP(spkt))) 101 #define APKT2SPKT(apkt) (GCMDP2PKTP(APKT2GCMD(apkt))) 102 103 /* public function prototypes */ 104 105 int atapi_attach(ata_ctl_t *ata_ctlp); 106 void atapi_detach(ata_ctl_t *ata_ctlp); 107 void atapi_init_arq(ata_ctl_t *ata_ctlp); 108 int atapi_init_drive(ata_drv_t *ata_drvp); 109 void atapi_uninit_drive(ata_drv_t *ata_drvp); 110 111 int atapi_id(ddi_acc_handle_t io_hdl1, caddr_t ioaddr1, 112 ddi_acc_handle_t io_hdl2, caddr_t ioaddr2, struct ata_id *buf); 113 int atapi_signature(ddi_acc_handle_t io_hdl, caddr_t ioaddr); 114 115 int atapi_ccballoc(gtgt_t *gtgtp, gcmd_t *gcmdp, int cmdlen, 116 int statuslen, int tgtlen, int ccblen); 117 void atapi_ccbfree(gcmd_t *gcmdp); 118 119 120 int atapi_fsm_intr(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 121 ata_pkt_t *ata_pktp); 122 int atapi_fsm_start(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 123 ata_pkt_t *ata_pktp); 124 void atapi_fsm_reset(ata_ctl_t *ata_ctlp); 125 126 127 128 #ifdef __cplusplus 129 } 130 #endif 131 132 #endif /* _ATAPI_H */ 133