xref: /illumos-gate/usr/src/uts/intel/io/amdzen/amdzen_client.h (revision 5c0b3261bd16d5eb356ffc864b6eab76c2e760e5)
1 /*
2  * This file and its contents are supplied under the terms of the
3  * Common Development and Distribution License ("CDDL"), version 1.0.
4  * You may only use this file in accordance with the terms of version
5  * 1.0 of the CDDL.
6  *
7  * A full copy of the text of the CDDL should have accompanied this
8  * source.  A copy of the CDDL is also available via the Internet at
9  * http://www.illumos.org/license/CDDL.
10  */
11 
12 /*
13  * Copyright 2022 Oxide Computer Company
14  */
15 
16 #ifndef _AMDZEN_CLIENT_H
17 #define	_AMDZEN_CLIENT_H
18 
19 /*
20  * This header provides client routines to clients of the amdzen nexus driver.
21  */
22 
23 #include <sys/types.h>
24 #include <sys/amdzen/df.h>
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
30 /*
31  * This enumeration is used to identify a given family of Zen era processors.
32  * This is derived from a family/model/stepping range. In some cases such as
33  * Dali, several different chips are covered that appear to be mostly the same
34  * as far as we can tell for our purposes (e.g. Raven Ridge, Picasso, etc.).
35  */
36 typedef enum {
37 	ZEN_FAMILY_UNKNOWN,
38 	ZEN_FAMILY_NAPLES,
39 	ZEN_FAMILY_DHYANA,
40 	ZEN_FAMILY_DALI,
41 	ZEN_FAMILY_ROME,
42 	ZEN_FAMILY_RENOIR,
43 	ZEN_FAMILY_MATISSE,
44 	ZEN_FAMILY_VAN_GOGH,
45 	ZEN_FAMILY_MENDOCINO,
46 	ZEN_FAMILY_MILAN,
47 	ZEN_FAMILY_GENOA,
48 	ZEN_FAMILY_VERMEER,
49 	ZEN_FAMILY_REMBRANDT,
50 	ZEN_FAMILY_CEZANNE,
51 	ZEN_FAMILY_RAPHAEL
52 } zen_family_t;
53 
54 /*
55  * This struct encodes enough information to later be used to compose and
56  * decompose a fabric ID and component ID. A fabric ID is broken into its node
57  * and component IDs and then a node ID is further decomposed into a socket and
58  * die ID.
59  */
60 typedef struct {
61 	uint32_t	dfd_sock_mask;
62 	uint32_t	dfd_die_mask;
63 	uint32_t	dfd_node_mask;
64 	uint32_t	dfd_comp_mask;
65 	uint8_t		dfd_sock_shift;
66 	uint8_t		dfd_die_shift;
67 	uint8_t		dfd_node_shift;
68 	uint8_t		dfd_comp_shift;
69 } df_fabric_decomp_t;
70 
71 extern zen_family_t amdzen_c_family(void);
72 extern uint_t amdzen_c_df_count(void);
73 extern df_rev_t amdzen_c_df_rev(void);
74 extern int amdzen_c_df_fabric_decomp(df_fabric_decomp_t *);
75 
76 /*
77  * SMN and DF access routines.
78  */
79 extern int amdzen_c_smn_read32(uint_t, uint32_t, uint32_t *);
80 extern int amdzen_c_smn_write32(uint_t, uint32_t, uint32_t);
81 extern int amdzen_c_df_read32(uint_t, uint8_t, const df_reg_def_t, uint32_t *);
82 extern int amdzen_c_df_read64(uint_t, uint8_t, const df_reg_def_t, uint64_t *);
83 
84 /*
85  * The following are logical types that we can iterate over. Note, that these
86  * are a combination of a DF type and subtype. This is used to smooth over the
87  * differences between different DF revisions and how they indicate these types.
88  */
89 typedef enum {
90 	/*
91 	 * Iterate over only DDR memory controllers.
92 	 */
93 	ZEN_DF_TYPE_CS_UMC,
94 	/*
95 	 * Iterate only over CPU based CCMs.
96 	 */
97 	ZEN_DF_TYPE_CCM_CPU
98 } zen_df_type_t;
99 
100 typedef int (*amdzen_c_iter_f)(uint_t, uint32_t, uint32_t, void *);
101 extern int amdzen_c_df_iter(uint_t, zen_df_type_t, amdzen_c_iter_f, void *);
102 
103 #ifdef __cplusplus
104 }
105 #endif
106 
107 #endif /* _AMDZEN_CLIENT_H */
108