1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_RM_PLATTER_H 28 #define _SYS_RM_PLATTER_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/types.h> 33 #include <sys/tss.h> 34 #include <sys/segments.h> 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 typedef struct rm_platter { 41 char rm_code[1024]; 42 #if defined(__amd64) 43 /* 44 * The compiler will want to 64-bit align the 64-bit rm_gdt_base 45 * pointer, so we need to add an extra four bytes of padding here to 46 * make sure rm_gdt_lim and rm_gdt_base will align to create a proper 47 * ten byte GDT pseudo-descriptor. 48 */ 49 uint32_t rm_gdt_pad; 50 #endif /* __amd64 */ 51 ushort_t rm_debug; 52 ushort_t rm_gdt_lim; /* stuff for lgdt */ 53 user_desc_t *rm_gdt_base; 54 #if defined(__amd64) 55 /* 56 * The compiler will want to 64-bit align the 64-bit rm_idt_base 57 * pointer, so we need to add an extra four bytes of padding here to 58 * make sure rm_idt_lim and rm_idt_base will align to create a proper 59 * ten byte IDT pseudo-descriptor. 60 */ 61 uint32_t rm_idt_pad; 62 #endif /* __amd64 */ 63 ushort_t rm_filler2; /* till I am sure that pragma works */ 64 ushort_t rm_idt_lim; /* stuff for lidt */ 65 gate_desc_t *rm_idt_base; 66 uint_t rm_pdbr; /* cr3 value */ 67 uint_t rm_cpu; /* easy way to know which CPU we are */ 68 uint_t rm_x86feature; /* X86 supported features */ 69 uint_t rm_cr4; /* cr4 value on cpu0 */ 70 #if defined(__amd64) 71 /* 72 * Temporary GDT for the brief transition from real mode to protected 73 * mode before a CPU continues on into long mode. 74 * 75 * Putting it here assures it will be located in identity mapped memory 76 * (va == pa, 1:1). 77 * 78 * rm_temp_gdt is sized to hold only a null descriptor in slot zero 79 * and a 64-bit code descriptor in slot one. 80 * 81 * rm_temp_[gi]dt_lim and rm_temp_[gi]dt_base are the pseudo-descriptors 82 * for the temporary GDT and IDT, respectively. 83 */ 84 uint64_t rm_temp_gdt[2]; 85 ushort_t rm_temp_gdtdesc_pad; /* filler to align GDT desc */ 86 ushort_t rm_temp_gdt_lim; 87 uint32_t rm_temp_gdt_base; 88 ushort_t rm_temp_idtdesc_pad; /* filler to align IDT desc */ 89 ushort_t rm_temp_idt_lim; 90 uint32_t rm_temp_idt_base; 91 92 /* 93 * The code executing in the rm_platter needs the offset into the 94 * platter at which the 64-bit code starts, so have mp_startup 95 * calculate it and store it here. 96 */ 97 uint32_t rm_longmode64_addr; 98 #endif /* __amd64 */ 99 } rm_platter_t; 100 101 /* 102 * cpu tables put within a single structure all the tables which need to be 103 * allocated when a CPU starts up. Makes it more memory efficient and easier 104 * to allocate/release 105 * 106 * IMPORTANT: i86pc/ml/offsets.in depends upon ct_stack being DEFAULTSTKSZ 107 * bytes long, and followed immediately by ct_gdt. Yes, it's a hack. If 108 * changing cpu_tables, you must updates offsets.in so that it can 109 * continue to calculate the size of DEFAULTSTKSZ. 110 * 111 * Note: gdt and tss should be 16 byte aligned for best performance on 112 * amd64. Since DEFAULTSTKSIZE is a multiple of pagesize gdt will be aligned. 113 * We test below that the tss is properly aligned. 114 */ 115 116 struct cpu_tables { 117 char ct_stack[DEFAULTSTKSZ]; 118 user_desc_t ct_gdt[NGDT]; 119 struct tss ct_tss; 120 }; 121 122 /* 123 * gdt entries are 8 bytes long, ensure that we have an even no. of them. 124 */ 125 #if ((NGDT / 2) * 2 != NGDT) 126 #error "rm_platter.h: tss not properly aligned" 127 #endif 128 129 #ifdef __cplusplus 130 } 131 #endif 132 133 #endif /* _SYS_RM_PLATTER_H */ 134