xref: /illumos-gate/usr/src/uts/i86pc/sys/psm_types.h (revision 9525b14bcdeb5b5f6f95ab27c2f48f18bd2ec829)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_PSM_TYPES_H
28 #define	_SYS_PSM_TYPES_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 /*
33  * Platform Specific Module Types
34  */
35 
36 #include <sys/types.h>
37 #include <sys/cpuvar.h>
38 #include <sys/time.h>
39 
40 #ifdef	__cplusplus
41 extern "C" {
42 #endif
43 
44 /*
45  * PSM_OPS definitions
46  */
47 typedef enum psm_intr_op_e {
48 	PSM_INTR_OP_ALLOC_VECTORS = 0,	/* 0.  Allocate vectors */
49 	PSM_INTR_OP_FREE_VECTORS,	/* 1.  Free vectors */
50 	PSM_INTR_OP_NAVAIL_VECTORS,	/* 2.  Get # of available vectors */
51 	PSM_INTR_OP_XLATE_VECTOR,	/* 3.  Translate vector */
52 	PSM_INTR_OP_GET_PENDING,	/* 4.  Get pending information */
53 	PSM_INTR_OP_CLEAR_MASK,		/* 5.  Clear interrupt mask */
54 	PSM_INTR_OP_SET_MASK,		/* 6.  Set interrupt mask */
55 	PSM_INTR_OP_GET_CAP,		/* 7.  Get devices's capabilities */
56 	PSM_INTR_OP_SET_CAP,		/* 8.  Set devices's capabilities */
57 	PSM_INTR_OP_SET_PRI,		/* 9.  Set the interrupt priority */
58 	PSM_INTR_OP_GET_SHARED,		/* 10. Get the shared intr info */
59 	PSM_INTR_OP_CHECK_MSI,		/* 11. Chk if device supports MSI */
60 	PSM_INTR_OP_SET_CPU,		/* 12. Set vector's CPU */
61 	PSM_INTR_OP_GET_INTR,		/* 13. Get vector's info */
62 	PSM_INTR_OP_GRP_SET_CPU,	/* 14. Set all device's vectors' CPU */
63 	PSM_INTR_OP_APIC_TYPE		/* 15. Returns APIC type */
64 } psm_intr_op_t;
65 
66 /*
67  * PSM_STATE definitions
68  */
69 typedef enum psm_state_op_e {
70 	PSM_STATE_ALLOC = 1,
71 	PSM_STATE_FREE,
72 	PSM_STATE_SAVE,
73 	PSM_STATE_RESTORE
74 } psm_state_op_t;
75 
76 typedef struct psm_state_req {
77 	psm_state_op_t psr_cmd;
78 	union psm_req {
79 		/*
80 		 * PSM_STATE_ALLOC, PSM_STATE_FREE, PSM_STATE_SAVE,
81 		 * PSM_STATE_RESTORE all use the same struct,
82 		 * but union for later expansion
83 		 */
84 		struct {
85 			void *psr_state;
86 			size_t psr_state_size;
87 		} psm_state_req;
88 	} req;
89 } psm_state_request_t;
90 
91 struct 	psm_ops {
92 	int	(*psm_probe)(void);
93 
94 	void	(*psm_softinit)(void);
95 	void	(*psm_picinit)(void);
96 	int	(*psm_intr_enter)(int ipl, int *vectorp);
97 	void	(*psm_intr_exit)(int ipl, int irqno);
98 	void	(*psm_setspl)(int ipl);
99 	int	(*psm_addspl)(int irqno, int ipl, int min_ipl, int max_ipl);
100 	int	(*psm_delspl)(int irqno, int ipl, int min_ipl, int max_ipl);
101 	int	(*psm_disable_intr)(processorid_t cpun);
102 	void	(*psm_enable_intr)(processorid_t cpun);
103 	int	(*psm_softlvl_to_irq)(int ipl);
104 	void	(*psm_set_softintr)(int ipl);
105 	void	(*psm_set_idlecpu)(processorid_t cpun);
106 	void	(*psm_unset_idlecpu)(processorid_t cpun);
107 
108 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5) || \
109     defined(PSMI_1_6)
110 	int	(*psm_clkinit)(int hertz);
111 #else
112 	void	(*psm_clkinit)(int hertz);
113 #endif
114 
115 	int	(*psm_get_clockirq)(int ipl);
116 	void	(*psm_hrtimeinit)(void);
117 	hrtime_t (*psm_gethrtime)(void);
118 
119 	processorid_t (*psm_get_next_processorid)(processorid_t cpu_id);
120 #if defined(PSMI_1_5) || defined(PSMI_1_6)
121 	int	(*psm_cpu_start)(processorid_t cpun, caddr_t ctxt);
122 #else
123 	void	(*psm_cpu_start)(processorid_t cpun, caddr_t rm_code);
124 #endif
125 	int	(*psm_post_cpu_start)(void);
126 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
127     defined(PSMI_1_5) || defined(PSMI_1_6)
128 	void	(*psm_shutdown)(int cmd, int fcn);
129 #else
130 	void	(*psm_shutdown)(void);
131 #endif
132 	int	(*psm_get_ipivect)(int ipl, int type);
133 	void	(*psm_send_ipi)(processorid_t cpun, int ipl);
134 
135 	int	(*psm_translate_irq)(dev_info_t *dip, int irqno);
136 
137 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4)
138 	int	(*psm_tod_get)(todinfo_t *tod);
139 	int	(*psm_tod_set)(todinfo_t *tod);
140 #endif
141 	void	(*psm_notify_error)(int level, char *errmsg);
142 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
143     defined(PSMI_1_5) || defined(PSMI_1_6)
144 	void	(*psm_notify_func)(int msg);
145 #endif
146 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5) || \
147     defined(PSMI_1_6)
148 	void 	(*psm_timer_reprogram)(hrtime_t time);
149 	void	(*psm_timer_enable)(void);
150 	void 	(*psm_timer_disable)(void);
151 	void 	(*psm_post_cyclic_setup)(void *arg);
152 #endif
153 #if defined(PSMI_1_4) || defined(PSMI_1_5) || defined(PSMI_1_6)
154 	void	(*psm_preshutdown)(int cmd, int fcn);
155 #endif
156 #if defined(PSMI_1_5) || defined(PSMI_1_6)
157 	int	(*psm_intr_ops)(dev_info_t *dip, ddi_intr_handle_impl_t *handle,
158 		    psm_intr_op_t op, int *result);
159 #endif
160 #if defined(PSMI_1_6)
161 	int	(*psm_state)(psm_state_request_t *request);
162 #endif
163 };
164 
165 
166 struct psm_info {
167 	ushort_t p_version;
168 	ushort_t p_owner;
169 	struct 	psm_ops	*p_ops;
170 	char	*p_mach_idstring;	/* machine identification string */
171 	char	*p_mach_desc;		/* machine descriptions		 */
172 };
173 
174 /*
175  * version
176  * 0x86vm where v = (version no. - 1) and m = (minor no. + 1)
177  * i.e. psmi 1.0 has v=0 and m=1, psmi 1.1 has v=0 and m=2
178  * also, 0x86 in the high byte is the signature of the psmi
179  */
180 #define	PSM_INFO_VER01		0x8601
181 #define	PSM_INFO_VER01_1	0x8602
182 #define	PSM_INFO_VER01_2	0x8603
183 #define	PSM_INFO_VER01_3	0x8604
184 #define	PSM_INFO_VER01_4	0x8605
185 #define	PSM_INFO_VER01_5	0x8606
186 #define	PSM_INFO_VER01_6	0x8706
187 #define	PSM_INFO_VER01_X	(PSM_INFO_VER01_1 & 0xFFF0)	/* ver 1.X */
188 
189 /*
190  *	owner field definitions
191  */
192 #define	PSM_OWN_SYS_DEFAULT	0x0001
193 #define	PSM_OWN_EXCLUSIVE	0x0002
194 #define	PSM_OWN_OVERRIDE	0x0003
195 
196 #define	PSM_NULL_INFO		-1
197 
198 /*
199  *	Arg to psm_notify_func
200  */
201 #define	PSM_DEBUG_ENTER		1
202 #define	PSM_DEBUG_EXIT		2
203 #define	PSM_PANIC_ENTER		3
204 
205 /*
206  *	Soft-level to interrupt vector
207  */
208 #define	PSM_SV_SOFTWARE		-1
209 #define	PSM_SV_MIXED		-2
210 
211 /*
212  *	Inter-processor interrupt type
213  */
214 #define	PSM_INTR_IPI_HI		0x01
215 #define	PSM_INTR_IPI_LO		0x02
216 #define	PSM_INTR_POKE		0x03
217 
218 /*
219  *	Get INTR flags
220  */
221 #define	PSMGI_CPU_USER_BOUND	0x80000000 /* user requested bind if set */
222 #define	PSMGI_CPU_FLAGS		0x80000000 /* all possible flags */
223 
224 /*
225  *	return code
226  */
227 #define	PSM_SUCCESS		DDI_SUCCESS
228 #define	PSM_FAILURE		DDI_FAILURE
229 
230 #define	PSM_INVALID_IPL		0
231 #define	PSM_INVALID_CPU		-1
232 
233 
234 struct 	psm_ops_ver01 {
235 	int	(*psm_probe)(void);
236 
237 	void	(*psm_softinit)(void);
238 	void	(*psm_picinit)(void);
239 	int	(*psm_intr_enter)(int ipl, int *vectorp);
240 	void	(*psm_intr_exit)(int ipl, int irqno);
241 	void	(*psm_setspl)(int ipl);
242 	int	(*psm_addspl)(int irqno, int ipl, int min_ipl, int max_ipl);
243 	int	(*psm_delspl)(int irqno, int ipl, int min_ipl, int max_ipl);
244 	int	(*psm_disable_intr)(processorid_t cpun);
245 	void	(*psm_enable_intr)(processorid_t cpun);
246 	int	(*psm_softlvl_to_irq)(int ipl);
247 	void	(*psm_set_softintr)(int ipl);
248 	void	(*psm_set_idlecpu)(processorid_t cpun);
249 	void	(*psm_unset_idlecpu)(processorid_t cpun);
250 
251 	void	(*psm_clkinit)(int hertz);
252 	int	(*psm_get_clockirq)(int ipl);
253 	void	(*psm_hrtimeinit)(void);
254 	hrtime_t (*psm_gethrtime)(void);
255 
256 	processorid_t (*psm_get_next_processorid)(processorid_t cpu_id);
257 	void	(*psm_cpu_start)(processorid_t cpun, caddr_t rm_code);
258 	int	(*psm_post_cpu_start)(void);
259 	void	(*psm_shutdown)(void);
260 	int	(*psm_get_ipivect)(int ipl, int type);
261 	void	(*psm_send_ipi)(processorid_t cpun, int ipl);
262 };
263 
264 #ifdef	__cplusplus
265 }
266 #endif
267 
268 #endif	/* _SYS_PSM_TYPES_H */
269