xref: /illumos-gate/usr/src/uts/i86pc/sys/psm_types.h (revision 355b4669e025ff377602b6fc7caaf30dbc218371)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_PSM_TYPES_H
28 #define	_SYS_PSM_TYPES_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 /*
33  * Platform Specific Module Types
34  */
35 
36 #include <sys/types.h>
37 #include <sys/cpuvar.h>
38 #include <sys/time.h>
39 
40 #ifdef	__cplusplus
41 extern "C" {
42 #endif
43 
44 /*
45  * PSM_OPS definitions
46  */
47 typedef enum psm_intr_op_e {
48 	PSM_INTR_OP_ALLOC_VECTORS = 0,	/* 0.  Allocate vectors */
49 	PSM_INTR_OP_FREE_VECTORS,	/* 1.  Free vectors */
50 	PSM_INTR_OP_NAVAIL_VECTORS,	/* 2.  Get # of available vectors */
51 	PSM_INTR_OP_XLATE_VECTOR,	/* 3.  Translate vector */
52 	PSM_INTR_OP_GET_PENDING,	/* 4.  Get pending information */
53 	PSM_INTR_OP_CLEAR_MASK,		/* 5.  Clear interrupt mask */
54 	PSM_INTR_OP_SET_MASK,		/* 6.  Set interrupt mask */
55 	PSM_INTR_OP_GET_CAP,		/* 7.  Get devices's capabilities */
56 	PSM_INTR_OP_SET_CAP,		/* 8.  Set devices's capabilities */
57 	PSM_INTR_OP_SET_PRI,		/* 9.  Set the interrupt priority */
58 	PSM_INTR_OP_GET_SHARED,		/* 10. Get the shared intr info */
59 	PSM_INTR_OP_CHECK_MSI,		/* 11. Chk if device supports MSI */
60 	PSM_INTR_OP_SET_CPU,		/* 12. Set vector's CPU */
61 	PSM_INTR_OP_GET_INTR		/* 13. Get vector's info */
62 } psm_intr_op_t;
63 
64 struct 	psm_ops {
65 	int	(*psm_probe)(void);
66 
67 	void	(*psm_softinit)(void);
68 	void	(*psm_picinit)(void);
69 	int	(*psm_intr_enter)(int ipl, int *vectorp);
70 	void	(*psm_intr_exit)(int ipl, int irqno);
71 	void	(*psm_setspl)(int ipl);
72 	int	(*psm_addspl)(int irqno, int ipl, int min_ipl, int max_ipl);
73 	int	(*psm_delspl)(int irqno, int ipl, int min_ipl, int max_ipl);
74 	int	(*psm_disable_intr)(processorid_t cpun);
75 	void	(*psm_enable_intr)(processorid_t cpun);
76 	int	(*psm_softlvl_to_irq)(int ipl);
77 	void	(*psm_set_softintr)(int ipl);
78 	void	(*psm_set_idlecpu)(processorid_t cpun);
79 	void	(*psm_unset_idlecpu)(processorid_t cpun);
80 
81 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5)
82 	int	(*psm_clkinit)(int hertz);
83 #else
84 	void	(*psm_clkinit)(int hertz);
85 #endif
86 
87 	int	(*psm_get_clockirq)(int ipl);
88 	void	(*psm_hrtimeinit)(void);
89 	hrtime_t (*psm_gethrtime)(void);
90 
91 	processorid_t (*psm_get_next_processorid)(processorid_t cpu_id);
92 	void	(*psm_cpu_start)(processorid_t cpun, caddr_t rm_code);
93 	int	(*psm_post_cpu_start)(void);
94 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
95     defined(PSMI_1_5)
96 	void	(*psm_shutdown)(int cmd, int fcn);
97 #else
98 	void	(*psm_shutdown)(void);
99 #endif
100 	int	(*psm_get_ipivect)(int ipl, int type);
101 	void	(*psm_send_ipi)(processorid_t cpun, int ipl);
102 
103 	int	(*psm_translate_irq)(dev_info_t *dip, int irqno);
104 
105 	int	(*psm_tod_get)(todinfo_t *tod);
106 	int	(*psm_tod_set)(todinfo_t *tod);
107 
108 	void	(*psm_notify_error)(int level, char *errmsg);
109 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
110     defined(PSMI_1_5)
111 	void	(*psm_notify_func)(int msg);
112 #endif
113 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5)
114 	void 	(*psm_timer_reprogram)(hrtime_t time);
115 	void	(*psm_timer_enable)(void);
116 	void 	(*psm_timer_disable)(void);
117 	void 	(*psm_post_cyclic_setup)(void *arg);
118 #endif
119 #if defined(PSMI_1_4) || defined(PSMI_1_5)
120 	void	(*psm_preshutdown)(int cmd, int fcn);
121 #endif
122 #if defined(PSMI_1_5)
123 	int	(*psm_intr_ops)(dev_info_t *dip, ddi_intr_handle_impl_t *handle,
124 		    psm_intr_op_t op, int *result);
125 #endif
126 };
127 
128 
129 struct 	psm_info {
130 	ushort_t p_version;
131 	ushort_t p_owner;
132 	struct 	psm_ops	*p_ops;
133 	char	*p_mach_idstring;	/* machine identification string */
134 	char	*p_mach_desc;		/* machine descriptions		 */
135 };
136 
137 /*
138  * version
139  * 0x86vm where v = (version no. - 1) and m = (minor no. + 1)
140  * i.e. psmi 1.0 has v=0 and m=1, psmi 1.1 has v=0 and m=2
141  * also, 0x86 in the high byte is the signature of the psmi
142  */
143 #define	PSM_INFO_VER01		0x8601
144 #define	PSM_INFO_VER01_1	0x8602
145 #define	PSM_INFO_VER01_2	0x8603
146 #define	PSM_INFO_VER01_3	0x8604
147 #define	PSM_INFO_VER01_4	0x8605
148 #define	PSM_INFO_VER01_5	0x8606
149 #define	PSM_INFO_VER01_X	(PSM_INFO_VER01_1 & 0xFFF0)	/* ver 1.X */
150 
151 /*
152  *	owner field definitions
153  */
154 #define	PSM_OWN_SYS_DEFAULT	0x0001
155 #define	PSM_OWN_EXCLUSIVE	0x0002
156 #define	PSM_OWN_OVERRIDE	0x0003
157 
158 #define	PSM_NULL_INFO		-1
159 
160 /*
161  *	Arg to psm_notify_func
162  */
163 #define	PSM_DEBUG_ENTER		1
164 #define	PSM_DEBUG_EXIT		2
165 #define	PSM_PANIC_ENTER		3
166 
167 /*
168  *	Soft-level to interrupt vector
169  */
170 #define	PSM_SV_SOFTWARE		-1
171 #define	PSM_SV_MIXED		-2
172 
173 /*
174  *	Inter-processor interrupt type
175  */
176 #define	PSM_INTR_IPI_HI		0x01
177 #define	PSM_INTR_IPI_LO		0x02
178 #define	PSM_INTR_POKE		0x03
179 
180 /*
181  *	Get INTR flags
182  */
183 #define	PSMGI_CPU_USER_BOUND	0x80000000 /* user requested bind if set */
184 #define	PSMGI_CPU_FLAGS		0x80000000 /* all possible flags */
185 
186 /*
187  *	return code
188  */
189 #define	PSM_SUCCESS		DDI_SUCCESS
190 #define	PSM_FAILURE		DDI_FAILURE
191 
192 #define	PSM_INVALID_IPL		0
193 #define	PSM_INVALID_CPU		-1
194 
195 
196 struct 	psm_ops_ver01 {
197 	int	(*psm_probe)(void);
198 
199 	void	(*psm_softinit)(void);
200 	void	(*psm_picinit)(void);
201 	int	(*psm_intr_enter)(int ipl, int *vectorp);
202 	void	(*psm_intr_exit)(int ipl, int irqno);
203 	void	(*psm_setspl)(int ipl);
204 	int	(*psm_addspl)(int irqno, int ipl, int min_ipl, int max_ipl);
205 	int	(*psm_delspl)(int irqno, int ipl, int min_ipl, int max_ipl);
206 	int	(*psm_disable_intr)(processorid_t cpun);
207 	void	(*psm_enable_intr)(processorid_t cpun);
208 	int	(*psm_softlvl_to_irq)(int ipl);
209 	void	(*psm_set_softintr)(int ipl);
210 	void	(*psm_set_idlecpu)(processorid_t cpun);
211 	void	(*psm_unset_idlecpu)(processorid_t cpun);
212 
213 	void	(*psm_clkinit)(int hertz);
214 	int	(*psm_get_clockirq)(int ipl);
215 	void	(*psm_hrtimeinit)(void);
216 	hrtime_t (*psm_gethrtime)(void);
217 
218 	processorid_t (*psm_get_next_processorid)(processorid_t cpu_id);
219 	void	(*psm_cpu_start)(processorid_t cpun, caddr_t rm_code);
220 	int	(*psm_post_cpu_start)(void);
221 	void	(*psm_shutdown)(void);
222 	int	(*psm_get_ipivect)(int ipl, int type);
223 	void	(*psm_send_ipi)(processorid_t cpun, int ipl);
224 };
225 
226 #ifdef	__cplusplus
227 }
228 #endif
229 
230 #endif	/* _SYS_PSM_TYPES_H */
231