1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 1992 Sun Microsystems, Inc. All Rights Reserved. 24 */ 25 26 #ifndef _SYS_MCDMA_H 27 #define _SYS_MCDMA_H 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 /* 34 * Defines for PS/2 DMA controllers. 35 */ 36 37 /* 38 * PS/2 DMA extended mode definitions 39 * 40 */ 41 #define PS2DMA_CTL 0x18 /* function register */ 42 #define PS2DMA_DAT 0x1A /* execute function register */ 43 44 #define PS2DMA_IOR 0x0 /* I/O address register */ 45 #define PS2DMA_MAR 0x20 /* memory address register */ 46 #define PS2DMA_RMA 0x30 /* read memory address register */ 47 #define PS2DMA_TCR 0x40 /* transfer count register */ 48 #define PS2DMA_RTC 0x50 /* read transfer count register */ 49 #define PS2DMA_STR 0x60 /* read status register */ 50 #define PS2DMA_WMR 0x70 /* write mode register */ 51 #define PS2DMA_ARB 0x80 /* arbus register */ 52 #define PS2DMA_SMK 0x90 /* set mask bit */ 53 #define PS2DMA_CMK 0xA0 /* clear mask bit */ 54 55 56 #define PS2DMA_M8 0x00 /* 8-bit mode */ 57 #define PS2DMA_M16 0x40 /* 16-bit mode */ 58 #define PS2DMA_MVF 0x00 /* mode for verify operation */ 59 #define PS2DMA_MRD 0x0C /* mode for read operation */ 60 #define PS2DMA_MWT 0x04 /* mode for write operation */ 61 #define PS2DMA_MIO 0x01 /* use i/o address reg */ 62 63 /* the following read & write are relative to memory, not the device */ 64 #define PS2DMA_RD 0x44 /* 16-bit read mode */ 65 #define PS2DMA_WR 0x4C /* 16-bit write mode */ 66 67 #ifdef __cplusplus 68 } 69 #endif 70 71 #endif /* _SYS_MCDMA_H */ 72