1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved. 24 */ 25 26 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ 27 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */ 28 /* All Rights Reserved */ 29 /* */ 30 /* Copyright (c) 1987, 1988 Microsoft Corporation */ 31 /* All Rights Reserved */ 32 /* */ 33 34 /* 35 * Copyright 2011 Joyent, Inc. All rights reserved. 36 */ 37 38 #include <sys/types.h> 39 #include <sys/sysmacros.h> 40 #include <sys/param.h> 41 #include <sys/signal.h> 42 #include <sys/systm.h> 43 #include <sys/user.h> 44 #include <sys/proc.h> 45 #include <sys/disp.h> 46 #include <sys/class.h> 47 #include <sys/core.h> 48 #include <sys/syscall.h> 49 #include <sys/cpuvar.h> 50 #include <sys/vm.h> 51 #include <sys/sysinfo.h> 52 #include <sys/fault.h> 53 #include <sys/stack.h> 54 #include <sys/psw.h> 55 #include <sys/regset.h> 56 #include <sys/fp.h> 57 #include <sys/trap.h> 58 #include <sys/kmem.h> 59 #include <sys/vtrace.h> 60 #include <sys/cmn_err.h> 61 #include <sys/prsystm.h> 62 #include <sys/mutex_impl.h> 63 #include <sys/machsystm.h> 64 #include <sys/archsystm.h> 65 #include <sys/sdt.h> 66 #include <sys/avintr.h> 67 #include <sys/kobj.h> 68 69 #include <vm/hat.h> 70 71 #include <vm/seg_kmem.h> 72 #include <vm/as.h> 73 #include <vm/seg.h> 74 #include <vm/hat_pte.h> 75 #include <vm/hat_i86.h> 76 77 #include <sys/procfs.h> 78 79 #include <sys/reboot.h> 80 #include <sys/debug.h> 81 #include <sys/debugreg.h> 82 #include <sys/modctl.h> 83 #include <sys/aio_impl.h> 84 #include <sys/tnf.h> 85 #include <sys/tnf_probe.h> 86 #include <sys/cred.h> 87 #include <sys/mman.h> 88 #include <sys/x86_archext.h> 89 #include <sys/copyops.h> 90 #include <c2/audit.h> 91 #include <sys/ftrace.h> 92 #include <sys/panic.h> 93 #include <sys/traptrace.h> 94 #include <sys/ontrap.h> 95 #include <sys/cpc_impl.h> 96 #include <sys/bootconf.h> 97 #include <sys/bootinfo.h> 98 #include <sys/promif.h> 99 #include <sys/mach_mmu.h> 100 #if defined(__xpv) 101 #include <sys/hypervisor.h> 102 #endif 103 #include <sys/contract/process_impl.h> 104 105 #define USER 0x10000 /* user-mode flag added to trap type */ 106 107 static const char *trap_type_mnemonic[] = { 108 "de", "db", "2", "bp", 109 "of", "br", "ud", "nm", 110 "df", "9", "ts", "np", 111 "ss", "gp", "pf", "15", 112 "mf", "ac", "mc", "xf" 113 }; 114 115 static const char *trap_type[] = { 116 "Divide error", /* trap id 0 */ 117 "Debug", /* trap id 1 */ 118 "NMI interrupt", /* trap id 2 */ 119 "Breakpoint", /* trap id 3 */ 120 "Overflow", /* trap id 4 */ 121 "BOUND range exceeded", /* trap id 5 */ 122 "Invalid opcode", /* trap id 6 */ 123 "Device not available", /* trap id 7 */ 124 "Double fault", /* trap id 8 */ 125 "Coprocessor segment overrun", /* trap id 9 */ 126 "Invalid TSS", /* trap id 10 */ 127 "Segment not present", /* trap id 11 */ 128 "Stack segment fault", /* trap id 12 */ 129 "General protection", /* trap id 13 */ 130 "Page fault", /* trap id 14 */ 131 "Reserved", /* trap id 15 */ 132 "x87 floating point error", /* trap id 16 */ 133 "Alignment check", /* trap id 17 */ 134 "Machine check", /* trap id 18 */ 135 "SIMD floating point exception", /* trap id 19 */ 136 }; 137 138 #define TRAP_TYPES (sizeof (trap_type) / sizeof (trap_type[0])) 139 140 #define SLOW_SCALL_SIZE 2 141 #define FAST_SCALL_SIZE 2 142 143 int tudebug = 0; 144 int tudebugbpt = 0; 145 int tudebugfpe = 0; 146 int tudebugsse = 0; 147 148 #if defined(TRAPDEBUG) || defined(lint) 149 int tdebug = 0; 150 int lodebug = 0; 151 int faultdebug = 0; 152 #else 153 #define tdebug 0 154 #define lodebug 0 155 #define faultdebug 0 156 #endif /* defined(TRAPDEBUG) || defined(lint) */ 157 158 #if defined(TRAPTRACE) 159 /* 160 * trap trace record for cpu0 is allocated here. 161 * trap trace records for non-boot cpus are allocated in mp_startup_init(). 162 */ 163 static trap_trace_rec_t trap_tr0[TRAPTR_NENT]; 164 trap_trace_ctl_t trap_trace_ctl[NCPU] = { 165 { 166 (uintptr_t)trap_tr0, /* next record */ 167 (uintptr_t)trap_tr0, /* first record */ 168 (uintptr_t)(trap_tr0 + TRAPTR_NENT), /* limit */ 169 (uintptr_t)0 /* current */ 170 }, 171 }; 172 173 /* 174 * default trap buffer size 175 */ 176 size_t trap_trace_bufsize = TRAPTR_NENT * sizeof (trap_trace_rec_t); 177 int trap_trace_freeze = 0; 178 int trap_trace_off = 0; 179 180 /* 181 * A dummy TRAPTRACE entry to use after death. 182 */ 183 trap_trace_rec_t trap_trace_postmort; 184 185 static void dump_ttrace(void); 186 #endif /* TRAPTRACE */ 187 static void dumpregs(struct regs *); 188 static void showregs(uint_t, struct regs *, caddr_t); 189 static int kern_gpfault(struct regs *); 190 191 /*ARGSUSED*/ 192 static int 193 die(uint_t type, struct regs *rp, caddr_t addr, processorid_t cpuid) 194 { 195 struct panic_trap_info ti; 196 const char *trap_name, *trap_mnemonic; 197 198 if (type < TRAP_TYPES) { 199 trap_name = trap_type[type]; 200 trap_mnemonic = trap_type_mnemonic[type]; 201 } else { 202 trap_name = "trap"; 203 trap_mnemonic = "-"; 204 } 205 206 #ifdef TRAPTRACE 207 TRAPTRACE_FREEZE; 208 #endif 209 210 ti.trap_regs = rp; 211 ti.trap_type = type & ~USER; 212 ti.trap_addr = addr; 213 214 curthread->t_panic_trap = &ti; 215 216 if (type == T_PGFLT && addr < (caddr_t)KERNELBASE) { 217 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p " 218 "occurred in module \"%s\" due to %s", 219 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr, 220 mod_containing_pc((caddr_t)rp->r_pc), 221 addr < (caddr_t)PAGESIZE ? 222 "a NULL pointer dereference" : 223 "an illegal access to a user address"); 224 } else 225 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p", 226 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr); 227 return (0); 228 } 229 230 /* 231 * Rewrite the instruction at pc to be an int $T_SYSCALLINT instruction. 232 * 233 * int <vector> is two bytes: 0xCD <vector> 234 */ 235 236 static int 237 rewrite_syscall(caddr_t pc) 238 { 239 uchar_t instr[SLOW_SCALL_SIZE] = { 0xCD, T_SYSCALLINT }; 240 241 if (uwrite(curthread->t_procp, instr, SLOW_SCALL_SIZE, 242 (uintptr_t)pc) != 0) 243 return (1); 244 245 return (0); 246 } 247 248 /* 249 * Test to see if the instruction at pc is sysenter or syscall. The second 250 * argument should be the x86 feature flag corresponding to the expected 251 * instruction. 252 * 253 * sysenter is two bytes: 0x0F 0x34 254 * syscall is two bytes: 0x0F 0x05 255 * int $T_SYSCALLINT is two bytes: 0xCD 0x91 256 */ 257 258 static int 259 instr_is_other_syscall(caddr_t pc, int which) 260 { 261 uchar_t instr[FAST_SCALL_SIZE]; 262 263 ASSERT(which == X86FSET_SEP || which == X86FSET_ASYSC || which == 0xCD); 264 265 if (copyin_nowatch(pc, (caddr_t)instr, FAST_SCALL_SIZE) != 0) 266 return (0); 267 268 switch (which) { 269 case X86FSET_SEP: 270 if (instr[0] == 0x0F && instr[1] == 0x34) 271 return (1); 272 break; 273 case X86FSET_ASYSC: 274 if (instr[0] == 0x0F && instr[1] == 0x05) 275 return (1); 276 break; 277 case 0xCD: 278 if (instr[0] == 0xCD && instr[1] == T_SYSCALLINT) 279 return (1); 280 break; 281 } 282 283 return (0); 284 } 285 286 static const char * 287 syscall_insn_string(int syscall_insn) 288 { 289 switch (syscall_insn) { 290 case X86FSET_SEP: 291 return ("sysenter"); 292 case X86FSET_ASYSC: 293 return ("syscall"); 294 case 0xCD: 295 return ("int"); 296 default: 297 return ("Unknown"); 298 } 299 } 300 301 static int 302 ldt_rewrite_syscall(struct regs *rp, proc_t *p, int syscall_insn) 303 { 304 caddr_t linearpc; 305 int return_code = 0; 306 307 mutex_enter(&p->p_ldtlock); /* Must be held across linear_pc() */ 308 309 if (linear_pc(rp, p, &linearpc) == 0) { 310 311 /* 312 * If another thread beat us here, it already changed 313 * this site to the slower (int) syscall instruction. 314 */ 315 if (instr_is_other_syscall(linearpc, 0xCD)) { 316 return_code = 1; 317 } else if (instr_is_other_syscall(linearpc, syscall_insn)) { 318 319 if (rewrite_syscall(linearpc) == 0) { 320 return_code = 1; 321 } 322 #ifdef DEBUG 323 else 324 cmn_err(CE_WARN, "failed to rewrite %s " 325 "instruction in process %d", 326 syscall_insn_string(syscall_insn), 327 p->p_pid); 328 #endif /* DEBUG */ 329 } 330 } 331 332 mutex_exit(&p->p_ldtlock); /* Must be held across linear_pc() */ 333 334 return (return_code); 335 } 336 337 /* 338 * Test to see if the instruction at pc is a system call instruction. 339 * 340 * The bytes of an lcall instruction used for the syscall trap. 341 * static uchar_t lcall[7] = { 0x9a, 0, 0, 0, 0, 0x7, 0 }; 342 * static uchar_t lcallalt[7] = { 0x9a, 0, 0, 0, 0, 0x27, 0 }; 343 */ 344 345 #define LCALLSIZE 7 346 347 static int 348 instr_is_lcall_syscall(caddr_t pc) 349 { 350 uchar_t instr[LCALLSIZE]; 351 352 if (copyin_nowatch(pc, (caddr_t)instr, LCALLSIZE) == 0 && 353 instr[0] == 0x9a && 354 instr[1] == 0 && 355 instr[2] == 0 && 356 instr[3] == 0 && 357 instr[4] == 0 && 358 (instr[5] == 0x7 || instr[5] == 0x27) && 359 instr[6] == 0) 360 return (1); 361 362 return (0); 363 } 364 365 #ifdef __amd64 366 367 /* 368 * In the first revisions of amd64 CPUs produced by AMD, the LAHF and 369 * SAHF instructions were not implemented in 64-bit mode. Later revisions 370 * did implement these instructions. An extension to the cpuid instruction 371 * was added to check for the capability of executing these instructions 372 * in 64-bit mode. 373 * 374 * Intel originally did not implement these instructions in EM64T either, 375 * but added them in later revisions. 376 * 377 * So, there are different chip revisions by both vendors out there that 378 * may or may not implement these instructions. The easy solution is to 379 * just always emulate these instructions on demand. 380 * 381 * SAHF == store %ah in the lower 8 bits of %rflags (opcode 0x9e) 382 * LAHF == load the lower 8 bits of %rflags into %ah (opcode 0x9f) 383 */ 384 385 #define LSAHFSIZE 1 386 387 static int 388 instr_is_lsahf(caddr_t pc, uchar_t *instr) 389 { 390 if (copyin_nowatch(pc, (caddr_t)instr, LSAHFSIZE) == 0 && 391 (*instr == 0x9e || *instr == 0x9f)) 392 return (1); 393 return (0); 394 } 395 396 /* 397 * Emulate the LAHF and SAHF instructions. The reference manuals define 398 * these instructions to always load/store bit 1 as a 1, and bits 3 and 5 399 * as a 0. The other, defined, bits are copied (the PS_ICC bits and PS_P). 400 * 401 * Note that %ah is bits 8-15 of %rax. 402 */ 403 static void 404 emulate_lsahf(struct regs *rp, uchar_t instr) 405 { 406 if (instr == 0x9e) { 407 /* sahf. Copy bits from %ah to flags. */ 408 rp->r_ps = (rp->r_ps & ~0xff) | 409 ((rp->r_rax >> 8) & PSL_LSAHFMASK) | PS_MB1; 410 } else { 411 /* lahf. Copy bits from flags to %ah. */ 412 rp->r_rax = (rp->r_rax & ~0xff00) | 413 (((rp->r_ps & PSL_LSAHFMASK) | PS_MB1) << 8); 414 } 415 rp->r_pc += LSAHFSIZE; 416 } 417 #endif /* __amd64 */ 418 419 #ifdef OPTERON_ERRATUM_91 420 421 /* 422 * Test to see if the instruction at pc is a prefetch instruction. 423 * 424 * The first byte of prefetch instructions is always 0x0F. 425 * The second byte is 0x18 for regular prefetch or 0x0D for AMD 3dnow prefetch. 426 * The third byte (ModRM) contains the register field bits (bits 3-5). 427 * These bits must be between 0 and 3 inclusive for regular prefetch and 428 * 0 and 1 inclusive for AMD 3dnow prefetch. 429 * 430 * In 64-bit mode, there may be a one-byte REX prefex (0x40-0x4F). 431 */ 432 433 static int 434 cmp_to_prefetch(uchar_t *p) 435 { 436 #ifdef _LP64 437 if ((p[0] & 0xF0) == 0x40) /* 64-bit REX prefix */ 438 p++; 439 #endif 440 return ((p[0] == 0x0F && p[1] == 0x18 && ((p[2] >> 3) & 7) <= 3) || 441 (p[0] == 0x0F && p[1] == 0x0D && ((p[2] >> 3) & 7) <= 1)); 442 } 443 444 static int 445 instr_is_prefetch(caddr_t pc) 446 { 447 uchar_t instr[4]; /* optional REX prefix plus 3-byte opcode */ 448 449 return (copyin_nowatch(pc, instr, sizeof (instr)) == 0 && 450 cmp_to_prefetch(instr)); 451 } 452 453 #endif /* OPTERON_ERRATUM_91 */ 454 455 /* 456 * Called from the trap handler when a processor trap occurs. 457 * 458 * Note: All user-level traps that might call stop() must exit 459 * trap() by 'goto out' or by falling through. 460 * Note Also: trap() is usually called with interrupts enabled, (PS_IE == 1) 461 * however, there are paths that arrive here with PS_IE == 0 so special care 462 * must be taken in those cases. 463 */ 464 void 465 trap(struct regs *rp, caddr_t addr, processorid_t cpuid) 466 { 467 kthread_t *ct = curthread; 468 enum seg_rw rw; 469 unsigned type; 470 proc_t *p = ttoproc(ct); 471 klwp_t *lwp = ttolwp(ct); 472 uintptr_t lofault; 473 faultcode_t pagefault(), res, errcode; 474 enum fault_type fault_type; 475 k_siginfo_t siginfo; 476 uint_t fault = 0; 477 int mstate; 478 int sicode = 0; 479 int watchcode; 480 int watchpage; 481 caddr_t vaddr; 482 int singlestep_twiddle; 483 size_t sz; 484 int ta; 485 #ifdef __amd64 486 uchar_t instr; 487 #endif 488 489 ASSERT_STACK_ALIGNED(); 490 491 type = rp->r_trapno; 492 CPU_STATS_ADDQ(CPU, sys, trap, 1); 493 ASSERT(ct->t_schedflag & TS_DONT_SWAP); 494 495 if (type == T_PGFLT) { 496 497 errcode = rp->r_err; 498 if (errcode & PF_ERR_WRITE) 499 rw = S_WRITE; 500 else if ((caddr_t)rp->r_pc == addr || 501 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) 502 rw = S_EXEC; 503 else 504 rw = S_READ; 505 506 #if defined(__i386) 507 /* 508 * Pentium Pro work-around 509 */ 510 if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) { 511 uint_t attr; 512 uint_t priv_violation; 513 uint_t access_violation; 514 515 if (hat_getattr(addr < (caddr_t)kernelbase ? 516 curproc->p_as->a_hat : kas.a_hat, addr, &attr) 517 == -1) { 518 errcode &= ~PF_ERR_PROT; 519 } else { 520 priv_violation = (errcode & PF_ERR_USER) && 521 !(attr & PROT_USER); 522 access_violation = (errcode & PF_ERR_WRITE) && 523 !(attr & PROT_WRITE); 524 if (!priv_violation && !access_violation) 525 goto cleanup; 526 } 527 } 528 #endif /* __i386 */ 529 530 } else if (type == T_SGLSTP && lwp != NULL) 531 lwp->lwp_pcb.pcb_drstat = (uintptr_t)addr; 532 533 if (tdebug) 534 showregs(type, rp, addr); 535 536 if (USERMODE(rp->r_cs)) { 537 /* 538 * Set up the current cred to use during this trap. u_cred 539 * no longer exists. t_cred is used instead. 540 * The current process credential applies to the thread for 541 * the entire trap. If trapping from the kernel, this 542 * should already be set up. 543 */ 544 if (ct->t_cred != p->p_cred) { 545 cred_t *oldcred = ct->t_cred; 546 /* 547 * DTrace accesses t_cred in probe context. t_cred 548 * must always be either NULL, or point to a valid, 549 * allocated cred structure. 550 */ 551 ct->t_cred = crgetcred(); 552 crfree(oldcred); 553 } 554 ASSERT(lwp != NULL); 555 type |= USER; 556 ASSERT(lwptoregs(lwp) == rp); 557 lwp->lwp_state = LWP_SYS; 558 559 switch (type) { 560 case T_PGFLT + USER: 561 if ((caddr_t)rp->r_pc == addr) 562 mstate = LMS_TFAULT; 563 else 564 mstate = LMS_DFAULT; 565 break; 566 default: 567 mstate = LMS_TRAP; 568 break; 569 } 570 /* Kernel probe */ 571 TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 572 tnf_microstate, state, mstate); 573 mstate = new_mstate(ct, mstate); 574 575 bzero(&siginfo, sizeof (siginfo)); 576 } 577 578 switch (type) { 579 case T_PGFLT + USER: 580 case T_SGLSTP: 581 case T_SGLSTP + USER: 582 case T_BPTFLT + USER: 583 break; 584 585 default: 586 FTRACE_2("trap(): type=0x%lx, regs=0x%lx", 587 (ulong_t)type, (ulong_t)rp); 588 break; 589 } 590 591 switch (type) { 592 case T_SIMDFPE: 593 /* Make sure we enable interrupts before die()ing */ 594 sti(); /* The SIMD exception comes in via cmninttrap */ 595 /*FALLTHROUGH*/ 596 default: 597 if (type & USER) { 598 if (tudebug) 599 showregs(type, rp, (caddr_t)0); 600 printf("trap: Unknown trap type %d in user mode\n", 601 type & ~USER); 602 siginfo.si_signo = SIGILL; 603 siginfo.si_code = ILL_ILLTRP; 604 siginfo.si_addr = (caddr_t)rp->r_pc; 605 siginfo.si_trapno = type & ~USER; 606 fault = FLTILL; 607 break; 608 } else { 609 (void) die(type, rp, addr, cpuid); 610 /*NOTREACHED*/ 611 } 612 613 case T_PGFLT: /* system page fault */ 614 /* 615 * If we're under on_trap() protection (see <sys/ontrap.h>), 616 * set ot_trap and bounce back to the on_trap() call site 617 * via the installed trampoline. 618 */ 619 if ((ct->t_ontrap != NULL) && 620 (ct->t_ontrap->ot_prot & OT_DATA_ACCESS)) { 621 ct->t_ontrap->ot_trap |= OT_DATA_ACCESS; 622 rp->r_pc = ct->t_ontrap->ot_trampoline; 623 goto cleanup; 624 } 625 626 /* 627 * See if we can handle as pagefault. Save lofault 628 * across this. Here we assume that an address 629 * less than KERNELBASE is a user fault. 630 * We can do this as copy.s routines verify that the 631 * starting address is less than KERNELBASE before 632 * starting and because we know that we always have 633 * KERNELBASE mapped as invalid to serve as a "barrier". 634 */ 635 lofault = ct->t_lofault; 636 ct->t_lofault = 0; 637 638 mstate = new_mstate(ct, LMS_KFAULT); 639 640 if (addr < (caddr_t)kernelbase) { 641 res = pagefault(addr, 642 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 0); 643 if (res == FC_NOMAP && 644 addr < p->p_usrstack && 645 grow(addr)) 646 res = 0; 647 } else { 648 res = pagefault(addr, 649 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 1); 650 } 651 (void) new_mstate(ct, mstate); 652 653 /* 654 * Restore lofault. If we resolved the fault, exit. 655 * If we didn't and lofault wasn't set, die. 656 */ 657 ct->t_lofault = lofault; 658 if (res == 0) 659 goto cleanup; 660 661 #if defined(OPTERON_ERRATUM_93) && defined(_LP64) 662 if (lofault == 0 && opteron_erratum_93) { 663 /* 664 * Workaround for Opteron Erratum 93. On return from 665 * a System Managment Interrupt at a HLT instruction 666 * the %rip might be truncated to a 32 bit value. 667 * BIOS is supposed to fix this, but some don't. 668 * If this occurs we simply restore the high order bits. 669 * The HLT instruction is 1 byte of 0xf4. 670 */ 671 uintptr_t rip = rp->r_pc; 672 673 if ((rip & 0xfffffffful) == rip) { 674 rip |= 0xfffffffful << 32; 675 if (hat_getpfnum(kas.a_hat, (caddr_t)rip) != 676 PFN_INVALID && 677 (*(uchar_t *)rip == 0xf4 || 678 *(uchar_t *)(rip - 1) == 0xf4)) { 679 rp->r_pc = rip; 680 goto cleanup; 681 } 682 } 683 } 684 #endif /* OPTERON_ERRATUM_93 && _LP64 */ 685 686 #ifdef OPTERON_ERRATUM_91 687 if (lofault == 0 && opteron_erratum_91) { 688 /* 689 * Workaround for Opteron Erratum 91. Prefetches may 690 * generate a page fault (they're not supposed to do 691 * that!). If this occurs we simply return back to the 692 * instruction. 693 */ 694 caddr_t pc = (caddr_t)rp->r_pc; 695 696 /* 697 * If the faulting PC is not mapped, this is a 698 * legitimate kernel page fault that must result in a 699 * panic. If the faulting PC is mapped, it could contain 700 * a prefetch instruction. Check for that here. 701 */ 702 if (hat_getpfnum(kas.a_hat, pc) != PFN_INVALID) { 703 if (cmp_to_prefetch((uchar_t *)pc)) { 704 #ifdef DEBUG 705 cmn_err(CE_WARN, "Opteron erratum 91 " 706 "occurred: kernel prefetch" 707 " at %p generated a page fault!", 708 (void *)rp->r_pc); 709 #endif /* DEBUG */ 710 goto cleanup; 711 } 712 } 713 (void) die(type, rp, addr, cpuid); 714 } 715 #endif /* OPTERON_ERRATUM_91 */ 716 717 if (lofault == 0) 718 (void) die(type, rp, addr, cpuid); 719 720 /* 721 * Cannot resolve fault. Return to lofault. 722 */ 723 if (lodebug) { 724 showregs(type, rp, addr); 725 traceregs(rp); 726 } 727 if (FC_CODE(res) == FC_OBJERR) 728 res = FC_ERRNO(res); 729 else 730 res = EFAULT; 731 rp->r_r0 = res; 732 rp->r_pc = ct->t_lofault; 733 goto cleanup; 734 735 case T_PGFLT + USER: /* user page fault */ 736 if (faultdebug) { 737 char *fault_str; 738 739 switch (rw) { 740 case S_READ: 741 fault_str = "read"; 742 break; 743 case S_WRITE: 744 fault_str = "write"; 745 break; 746 case S_EXEC: 747 fault_str = "exec"; 748 break; 749 default: 750 fault_str = ""; 751 break; 752 } 753 printf("user %s fault: addr=0x%lx errcode=0x%x\n", 754 fault_str, (uintptr_t)addr, errcode); 755 } 756 757 #if defined(OPTERON_ERRATUM_100) && defined(_LP64) 758 /* 759 * Workaround for AMD erratum 100 760 * 761 * A 32-bit process may receive a page fault on a non 762 * 32-bit address by mistake. The range of the faulting 763 * address will be 764 * 765 * 0xffffffff80000000 .. 0xffffffffffffffff or 766 * 0x0000000100000000 .. 0x000000017fffffff 767 * 768 * The fault is always due to an instruction fetch, however 769 * the value of r_pc should be correct (in 32 bit range), 770 * so we ignore the page fault on the bogus address. 771 */ 772 if (p->p_model == DATAMODEL_ILP32 && 773 (0xffffffff80000000 <= (uintptr_t)addr || 774 (0x100000000 <= (uintptr_t)addr && 775 (uintptr_t)addr <= 0x17fffffff))) { 776 if (!opteron_erratum_100) 777 panic("unexpected erratum #100"); 778 if (rp->r_pc <= 0xffffffff) 779 goto out; 780 } 781 #endif /* OPTERON_ERRATUM_100 && _LP64 */ 782 783 ASSERT(!(curthread->t_flag & T_WATCHPT)); 784 watchpage = (pr_watch_active(p) && pr_is_watchpage(addr, rw)); 785 #ifdef __i386 786 /* 787 * In 32-bit mode, the lcall (system call) instruction fetches 788 * one word from the stack, at the stack pointer, because of the 789 * way the call gate is constructed. This is a bogus 790 * read and should not be counted as a read watchpoint. 791 * We work around the problem here by testing to see if 792 * this situation applies and, if so, simply jumping to 793 * the code in locore.s that fields the system call trap. 794 * The registers on the stack are already set up properly 795 * due to the match between the call gate sequence and the 796 * trap gate sequence. We just have to adjust the pc. 797 */ 798 if (watchpage && addr == (caddr_t)rp->r_sp && 799 rw == S_READ && instr_is_lcall_syscall((caddr_t)rp->r_pc)) { 800 extern void watch_syscall(void); 801 802 rp->r_pc += LCALLSIZE; 803 watch_syscall(); /* never returns */ 804 /* NOTREACHED */ 805 } 806 #endif /* __i386 */ 807 vaddr = addr; 808 if (!watchpage || (sz = instr_size(rp, &vaddr, rw)) <= 0) 809 fault_type = (errcode & PF_ERR_PROT)? F_PROT: F_INVAL; 810 else if ((watchcode = pr_is_watchpoint(&vaddr, &ta, 811 sz, NULL, rw)) != 0) { 812 if (ta) { 813 do_watch_step(vaddr, sz, rw, 814 watchcode, rp->r_pc); 815 fault_type = F_INVAL; 816 } else { 817 bzero(&siginfo, sizeof (siginfo)); 818 siginfo.si_signo = SIGTRAP; 819 siginfo.si_code = watchcode; 820 siginfo.si_addr = vaddr; 821 siginfo.si_trapafter = 0; 822 siginfo.si_pc = (caddr_t)rp->r_pc; 823 fault = FLTWATCH; 824 break; 825 } 826 } else { 827 /* XXX pr_watch_emul() never succeeds (for now) */ 828 if (rw != S_EXEC && pr_watch_emul(rp, vaddr, rw)) 829 goto out; 830 do_watch_step(vaddr, sz, rw, 0, 0); 831 fault_type = F_INVAL; 832 } 833 834 res = pagefault(addr, fault_type, rw, 0); 835 836 /* 837 * If pagefault() succeeded, ok. 838 * Otherwise attempt to grow the stack. 839 */ 840 if (res == 0 || 841 (res == FC_NOMAP && 842 addr < p->p_usrstack && 843 grow(addr))) { 844 lwp->lwp_lastfault = FLTPAGE; 845 lwp->lwp_lastfaddr = addr; 846 if (prismember(&p->p_fltmask, FLTPAGE)) { 847 bzero(&siginfo, sizeof (siginfo)); 848 siginfo.si_addr = addr; 849 (void) stop_on_fault(FLTPAGE, &siginfo); 850 } 851 goto out; 852 } else if (res == FC_PROT && addr < p->p_usrstack && 853 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) { 854 report_stack_exec(p, addr); 855 } 856 857 #ifdef OPTERON_ERRATUM_91 858 /* 859 * Workaround for Opteron Erratum 91. Prefetches may generate a 860 * page fault (they're not supposed to do that!). If this 861 * occurs we simply return back to the instruction. 862 * 863 * We rely on copyin to properly fault in the page with r_pc. 864 */ 865 if (opteron_erratum_91 && 866 addr != (caddr_t)rp->r_pc && 867 instr_is_prefetch((caddr_t)rp->r_pc)) { 868 #ifdef DEBUG 869 cmn_err(CE_WARN, "Opteron erratum 91 occurred: " 870 "prefetch at %p in pid %d generated a trap!", 871 (void *)rp->r_pc, p->p_pid); 872 #endif /* DEBUG */ 873 goto out; 874 } 875 #endif /* OPTERON_ERRATUM_91 */ 876 877 if (tudebug) 878 showregs(type, rp, addr); 879 /* 880 * In the case where both pagefault and grow fail, 881 * set the code to the value provided by pagefault. 882 * We map all errors returned from pagefault() to SIGSEGV. 883 */ 884 bzero(&siginfo, sizeof (siginfo)); 885 siginfo.si_addr = addr; 886 switch (FC_CODE(res)) { 887 case FC_HWERR: 888 case FC_NOSUPPORT: 889 siginfo.si_signo = SIGBUS; 890 siginfo.si_code = BUS_ADRERR; 891 fault = FLTACCESS; 892 break; 893 case FC_ALIGN: 894 siginfo.si_signo = SIGBUS; 895 siginfo.si_code = BUS_ADRALN; 896 fault = FLTACCESS; 897 break; 898 case FC_OBJERR: 899 if ((siginfo.si_errno = FC_ERRNO(res)) != EINTR) { 900 siginfo.si_signo = SIGBUS; 901 siginfo.si_code = BUS_OBJERR; 902 fault = FLTACCESS; 903 } 904 break; 905 default: /* FC_NOMAP or FC_PROT */ 906 siginfo.si_signo = SIGSEGV; 907 siginfo.si_code = 908 (res == FC_NOMAP)? SEGV_MAPERR : SEGV_ACCERR; 909 fault = FLTBOUNDS; 910 break; 911 } 912 break; 913 914 case T_ILLINST + USER: /* invalid opcode fault */ 915 /* 916 * If the syscall instruction is disabled due to LDT usage, a 917 * user program that attempts to execute it will trigger a #ud 918 * trap. Check for that case here. If this occurs on a CPU which 919 * doesn't even support syscall, the result of all of this will 920 * be to emulate that particular instruction. 921 */ 922 if (p->p_ldt != NULL && 923 ldt_rewrite_syscall(rp, p, X86FSET_ASYSC)) 924 goto out; 925 926 #ifdef __amd64 927 /* 928 * Emulate the LAHF and SAHF instructions if needed. 929 * See the instr_is_lsahf function for details. 930 */ 931 if (p->p_model == DATAMODEL_LP64 && 932 instr_is_lsahf((caddr_t)rp->r_pc, &instr)) { 933 emulate_lsahf(rp, instr); 934 goto out; 935 } 936 #endif 937 938 /*FALLTHROUGH*/ 939 940 if (tudebug) 941 showregs(type, rp, (caddr_t)0); 942 siginfo.si_signo = SIGILL; 943 siginfo.si_code = ILL_ILLOPC; 944 siginfo.si_addr = (caddr_t)rp->r_pc; 945 fault = FLTILL; 946 break; 947 948 case T_ZERODIV + USER: /* integer divide by zero */ 949 if (tudebug && tudebugfpe) 950 showregs(type, rp, (caddr_t)0); 951 siginfo.si_signo = SIGFPE; 952 siginfo.si_code = FPE_INTDIV; 953 siginfo.si_addr = (caddr_t)rp->r_pc; 954 fault = FLTIZDIV; 955 break; 956 957 case T_OVFLW + USER: /* integer overflow */ 958 if (tudebug && tudebugfpe) 959 showregs(type, rp, (caddr_t)0); 960 siginfo.si_signo = SIGFPE; 961 siginfo.si_code = FPE_INTOVF; 962 siginfo.si_addr = (caddr_t)rp->r_pc; 963 fault = FLTIOVF; 964 break; 965 966 case T_NOEXTFLT + USER: /* math coprocessor not available */ 967 if (tudebug && tudebugfpe) 968 showregs(type, rp, addr); 969 if (fpnoextflt(rp)) { 970 siginfo.si_signo = SIGILL; 971 siginfo.si_code = ILL_ILLOPC; 972 siginfo.si_addr = (caddr_t)rp->r_pc; 973 fault = FLTILL; 974 } 975 break; 976 977 case T_EXTOVRFLT: /* extension overrun fault */ 978 /* check if we took a kernel trap on behalf of user */ 979 { 980 extern void ndptrap_frstor(void); 981 if (rp->r_pc != (uintptr_t)ndptrap_frstor) { 982 sti(); /* T_EXTOVRFLT comes in via cmninttrap */ 983 (void) die(type, rp, addr, cpuid); 984 } 985 type |= USER; 986 } 987 /*FALLTHROUGH*/ 988 case T_EXTOVRFLT + USER: /* extension overrun fault */ 989 if (tudebug && tudebugfpe) 990 showregs(type, rp, addr); 991 if (fpextovrflt(rp)) { 992 siginfo.si_signo = SIGSEGV; 993 siginfo.si_code = SEGV_MAPERR; 994 siginfo.si_addr = (caddr_t)rp->r_pc; 995 fault = FLTBOUNDS; 996 } 997 break; 998 999 case T_EXTERRFLT: /* x87 floating point exception pending */ 1000 /* check if we took a kernel trap on behalf of user */ 1001 { 1002 extern void ndptrap_frstor(void); 1003 if (rp->r_pc != (uintptr_t)ndptrap_frstor) { 1004 sti(); /* T_EXTERRFLT comes in via cmninttrap */ 1005 (void) die(type, rp, addr, cpuid); 1006 } 1007 type |= USER; 1008 } 1009 /*FALLTHROUGH*/ 1010 1011 case T_EXTERRFLT + USER: /* x87 floating point exception pending */ 1012 if (tudebug && tudebugfpe) 1013 showregs(type, rp, addr); 1014 if (sicode = fpexterrflt(rp)) { 1015 siginfo.si_signo = SIGFPE; 1016 siginfo.si_code = sicode; 1017 siginfo.si_addr = (caddr_t)rp->r_pc; 1018 fault = FLTFPE; 1019 } 1020 break; 1021 1022 case T_SIMDFPE + USER: /* SSE and SSE2 exceptions */ 1023 if (tudebug && tudebugsse) 1024 showregs(type, rp, addr); 1025 if (!is_x86_feature(x86_featureset, X86FSET_SSE) && 1026 !is_x86_feature(x86_featureset, X86FSET_SSE2)) { 1027 /* 1028 * There are rumours that some user instructions 1029 * on older CPUs can cause this trap to occur; in 1030 * which case send a SIGILL instead of a SIGFPE. 1031 */ 1032 siginfo.si_signo = SIGILL; 1033 siginfo.si_code = ILL_ILLTRP; 1034 siginfo.si_addr = (caddr_t)rp->r_pc; 1035 siginfo.si_trapno = type & ~USER; 1036 fault = FLTILL; 1037 } else if ((sicode = fpsimderrflt(rp)) != 0) { 1038 siginfo.si_signo = SIGFPE; 1039 siginfo.si_code = sicode; 1040 siginfo.si_addr = (caddr_t)rp->r_pc; 1041 fault = FLTFPE; 1042 } 1043 1044 sti(); /* The SIMD exception comes in via cmninttrap */ 1045 break; 1046 1047 case T_BPTFLT: /* breakpoint trap */ 1048 /* 1049 * Kernel breakpoint traps should only happen when kmdb is 1050 * active, and even then, it'll have interposed on the IDT, so 1051 * control won't get here. If it does, we've hit a breakpoint 1052 * without the debugger, which is very strange, and very 1053 * fatal. 1054 */ 1055 if (tudebug && tudebugbpt) 1056 showregs(type, rp, (caddr_t)0); 1057 1058 (void) die(type, rp, addr, cpuid); 1059 break; 1060 1061 case T_SGLSTP: /* single step/hw breakpoint exception */ 1062 1063 /* Now evaluate how we got here */ 1064 if (lwp != NULL && (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP)) { 1065 /* 1066 * i386 single-steps even through lcalls which 1067 * change the privilege level. So we take a trap at 1068 * the first instruction in privileged mode. 1069 * 1070 * Set a flag to indicate that upon completion of 1071 * the system call, deal with the single-step trap. 1072 * 1073 * The same thing happens for sysenter, too. 1074 */ 1075 singlestep_twiddle = 0; 1076 if (rp->r_pc == (uintptr_t)sys_sysenter || 1077 rp->r_pc == (uintptr_t)brand_sys_sysenter) { 1078 singlestep_twiddle = 1; 1079 #if defined(__amd64) 1080 /* 1081 * Since we are already on the kernel's 1082 * %gs, on 64-bit systems the sysenter case 1083 * needs to adjust the pc to avoid 1084 * executing the swapgs instruction at the 1085 * top of the handler. 1086 */ 1087 if (rp->r_pc == (uintptr_t)sys_sysenter) 1088 rp->r_pc = (uintptr_t) 1089 _sys_sysenter_post_swapgs; 1090 else 1091 rp->r_pc = (uintptr_t) 1092 _brand_sys_sysenter_post_swapgs; 1093 #endif 1094 } 1095 #if defined(__i386) 1096 else if (rp->r_pc == (uintptr_t)sys_call || 1097 rp->r_pc == (uintptr_t)brand_sys_call) { 1098 singlestep_twiddle = 1; 1099 } 1100 #endif 1101 else { 1102 /* not on sysenter/syscall; uregs available */ 1103 if (tudebug && tudebugbpt) 1104 showregs(type, rp, (caddr_t)0); 1105 } 1106 if (singlestep_twiddle) { 1107 rp->r_ps &= ~PS_T; /* turn off trace */ 1108 lwp->lwp_pcb.pcb_flags |= DEBUG_PENDING; 1109 ct->t_post_sys = 1; 1110 aston(curthread); 1111 goto cleanup; 1112 } 1113 } 1114 /* XXX - needs review on debugger interface? */ 1115 if (boothowto & RB_DEBUG) 1116 debug_enter((char *)NULL); 1117 else 1118 (void) die(type, rp, addr, cpuid); 1119 break; 1120 1121 case T_NMIFLT: /* NMI interrupt */ 1122 printf("Unexpected NMI in system mode\n"); 1123 goto cleanup; 1124 1125 case T_NMIFLT + USER: /* NMI interrupt */ 1126 printf("Unexpected NMI in user mode\n"); 1127 break; 1128 1129 case T_GPFLT: /* general protection violation */ 1130 /* 1131 * Any #GP that occurs during an on_trap .. no_trap bracket 1132 * with OT_DATA_ACCESS or OT_SEGMENT_ACCESS protection, 1133 * or in a on_fault .. no_fault bracket, is forgiven 1134 * and we trampoline. This protection is given regardless 1135 * of whether we are 32/64 bit etc - if a distinction is 1136 * required then define new on_trap protection types. 1137 * 1138 * On amd64, we can get a #gp from referencing addresses 1139 * in the virtual address hole e.g. from a copyin or in 1140 * update_sregs while updating user segment registers. 1141 * 1142 * On the 32-bit hypervisor we could also generate one in 1143 * mfn_to_pfn by reaching around or into where the hypervisor 1144 * lives which is protected by segmentation. 1145 */ 1146 1147 /* 1148 * If we're under on_trap() protection (see <sys/ontrap.h>), 1149 * set ot_trap and trampoline back to the on_trap() call site 1150 * for OT_DATA_ACCESS or OT_SEGMENT_ACCESS. 1151 */ 1152 if (ct->t_ontrap != NULL) { 1153 int ttype = ct->t_ontrap->ot_prot & 1154 (OT_DATA_ACCESS | OT_SEGMENT_ACCESS); 1155 1156 if (ttype != 0) { 1157 ct->t_ontrap->ot_trap |= ttype; 1158 if (tudebug) 1159 showregs(type, rp, (caddr_t)0); 1160 rp->r_pc = ct->t_ontrap->ot_trampoline; 1161 goto cleanup; 1162 } 1163 } 1164 1165 /* 1166 * If we're under lofault protection (copyin etc.), 1167 * longjmp back to lofault with an EFAULT. 1168 */ 1169 if (ct->t_lofault) { 1170 /* 1171 * Fault is not resolvable, so just return to lofault 1172 */ 1173 if (lodebug) { 1174 showregs(type, rp, addr); 1175 traceregs(rp); 1176 } 1177 rp->r_r0 = EFAULT; 1178 rp->r_pc = ct->t_lofault; 1179 goto cleanup; 1180 } 1181 1182 /* 1183 * We fall through to the next case, which repeats 1184 * the OT_SEGMENT_ACCESS check which we've already 1185 * done, so we'll always fall through to the 1186 * T_STKFLT case. 1187 */ 1188 /*FALLTHROUGH*/ 1189 case T_SEGFLT: /* segment not present fault */ 1190 /* 1191 * One example of this is #NP in update_sregs while 1192 * attempting to update a user segment register 1193 * that points to a descriptor that is marked not 1194 * present. 1195 */ 1196 if (ct->t_ontrap != NULL && 1197 ct->t_ontrap->ot_prot & OT_SEGMENT_ACCESS) { 1198 ct->t_ontrap->ot_trap |= OT_SEGMENT_ACCESS; 1199 if (tudebug) 1200 showregs(type, rp, (caddr_t)0); 1201 rp->r_pc = ct->t_ontrap->ot_trampoline; 1202 goto cleanup; 1203 } 1204 /*FALLTHROUGH*/ 1205 case T_STKFLT: /* stack fault */ 1206 case T_TSSFLT: /* invalid TSS fault */ 1207 if (tudebug) 1208 showregs(type, rp, (caddr_t)0); 1209 if (kern_gpfault(rp)) 1210 (void) die(type, rp, addr, cpuid); 1211 goto cleanup; 1212 1213 /* 1214 * ONLY 32-bit PROCESSES can USE a PRIVATE LDT! 64-bit apps 1215 * should have no need for them, so we put a stop to it here. 1216 * 1217 * So: not-present fault is ONLY valid for 32-bit processes with 1218 * a private LDT trying to do a system call. Emulate it. 1219 * 1220 * #gp fault is ONLY valid for 32-bit processes also, which DO NOT 1221 * have a private LDT, and are trying to do a system call. Emulate it. 1222 */ 1223 1224 case T_SEGFLT + USER: /* segment not present fault */ 1225 case T_GPFLT + USER: /* general protection violation */ 1226 #ifdef _SYSCALL32_IMPL 1227 if (p->p_model != DATAMODEL_NATIVE) { 1228 #endif /* _SYSCALL32_IMPL */ 1229 if (instr_is_lcall_syscall((caddr_t)rp->r_pc)) { 1230 if (type == T_SEGFLT + USER) 1231 ASSERT(p->p_ldt != NULL); 1232 1233 if ((p->p_ldt == NULL && type == T_GPFLT + USER) || 1234 type == T_SEGFLT + USER) { 1235 1236 /* 1237 * The user attempted a system call via the obsolete 1238 * call gate mechanism. Because the process doesn't have 1239 * an LDT (i.e. the ldtr contains 0), a #gp results. 1240 * Emulate the syscall here, just as we do above for a 1241 * #np trap. 1242 */ 1243 1244 /* 1245 * Since this is a not-present trap, rp->r_pc points to 1246 * the trapping lcall instruction. We need to bump it 1247 * to the next insn so the app can continue on. 1248 */ 1249 rp->r_pc += LCALLSIZE; 1250 lwp->lwp_regs = rp; 1251 1252 /* 1253 * Normally the microstate of the LWP is forced back to 1254 * LMS_USER by the syscall handlers. Emulate that 1255 * behavior here. 1256 */ 1257 mstate = LMS_USER; 1258 1259 dosyscall(); 1260 goto out; 1261 } 1262 } 1263 #ifdef _SYSCALL32_IMPL 1264 } 1265 #endif /* _SYSCALL32_IMPL */ 1266 /* 1267 * If the current process is using a private LDT and the 1268 * trapping instruction is sysenter, the sysenter instruction 1269 * has been disabled on the CPU because it destroys segment 1270 * registers. If this is the case, rewrite the instruction to 1271 * be a safe system call and retry it. If this occurs on a CPU 1272 * which doesn't even support sysenter, the result of all of 1273 * this will be to emulate that particular instruction. 1274 */ 1275 if (p->p_ldt != NULL && 1276 ldt_rewrite_syscall(rp, p, X86FSET_SEP)) 1277 goto out; 1278 1279 /*FALLTHROUGH*/ 1280 1281 case T_BOUNDFLT + USER: /* bound fault */ 1282 case T_STKFLT + USER: /* stack fault */ 1283 case T_TSSFLT + USER: /* invalid TSS fault */ 1284 if (tudebug) 1285 showregs(type, rp, (caddr_t)0); 1286 siginfo.si_signo = SIGSEGV; 1287 siginfo.si_code = SEGV_MAPERR; 1288 siginfo.si_addr = (caddr_t)rp->r_pc; 1289 fault = FLTBOUNDS; 1290 break; 1291 1292 case T_ALIGNMENT + USER: /* user alignment error (486) */ 1293 if (tudebug) 1294 showregs(type, rp, (caddr_t)0); 1295 bzero(&siginfo, sizeof (siginfo)); 1296 siginfo.si_signo = SIGBUS; 1297 siginfo.si_code = BUS_ADRALN; 1298 siginfo.si_addr = (caddr_t)rp->r_pc; 1299 fault = FLTACCESS; 1300 break; 1301 1302 case T_SGLSTP + USER: /* single step/hw breakpoint exception */ 1303 if (tudebug && tudebugbpt) 1304 showregs(type, rp, (caddr_t)0); 1305 1306 /* Was it single-stepping? */ 1307 if (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP) { 1308 pcb_t *pcb = &lwp->lwp_pcb; 1309 1310 rp->r_ps &= ~PS_T; 1311 /* 1312 * If both NORMAL_STEP and WATCH_STEP are in effect, 1313 * give precedence to WATCH_STEP. If neither is set, 1314 * user must have set the PS_T bit in %efl; treat this 1315 * as NORMAL_STEP. 1316 */ 1317 if ((fault = undo_watch_step(&siginfo)) == 0 && 1318 ((pcb->pcb_flags & NORMAL_STEP) || 1319 !(pcb->pcb_flags & WATCH_STEP))) { 1320 siginfo.si_signo = SIGTRAP; 1321 siginfo.si_code = TRAP_TRACE; 1322 siginfo.si_addr = (caddr_t)rp->r_pc; 1323 fault = FLTTRACE; 1324 } 1325 pcb->pcb_flags &= ~(NORMAL_STEP|WATCH_STEP); 1326 } 1327 break; 1328 1329 case T_BPTFLT + USER: /* breakpoint trap */ 1330 if (tudebug && tudebugbpt) 1331 showregs(type, rp, (caddr_t)0); 1332 /* 1333 * int 3 (the breakpoint instruction) leaves the pc referring 1334 * to the address one byte after the breakpointed address. 1335 * If the P_PR_BPTADJ flag has been set via /proc, We adjust 1336 * it back so it refers to the breakpointed address. 1337 */ 1338 if (p->p_proc_flag & P_PR_BPTADJ) 1339 rp->r_pc--; 1340 siginfo.si_signo = SIGTRAP; 1341 siginfo.si_code = TRAP_BRKPT; 1342 siginfo.si_addr = (caddr_t)rp->r_pc; 1343 fault = FLTBPT; 1344 break; 1345 1346 case T_AST: 1347 /* 1348 * This occurs only after the cs register has been made to 1349 * look like a kernel selector, either through debugging or 1350 * possibly by functions like setcontext(). The thread is 1351 * about to cause a general protection fault at common_iret() 1352 * in locore. We let that happen immediately instead of 1353 * doing the T_AST processing. 1354 */ 1355 goto cleanup; 1356 1357 case T_AST + USER: /* profiling, resched, h/w error pseudo trap */ 1358 if (lwp->lwp_pcb.pcb_flags & ASYNC_HWERR) { 1359 proc_t *p = ttoproc(curthread); 1360 extern void print_msg_hwerr(ctid_t ct_id, proc_t *p); 1361 1362 lwp->lwp_pcb.pcb_flags &= ~ASYNC_HWERR; 1363 print_msg_hwerr(p->p_ct_process->conp_contract.ct_id, 1364 p); 1365 contract_process_hwerr(p->p_ct_process, p); 1366 siginfo.si_signo = SIGKILL; 1367 siginfo.si_code = SI_NOINFO; 1368 } else if (lwp->lwp_pcb.pcb_flags & CPC_OVERFLOW) { 1369 lwp->lwp_pcb.pcb_flags &= ~CPC_OVERFLOW; 1370 if (kcpc_overflow_ast()) { 1371 /* 1372 * Signal performance counter overflow 1373 */ 1374 if (tudebug) 1375 showregs(type, rp, (caddr_t)0); 1376 bzero(&siginfo, sizeof (siginfo)); 1377 siginfo.si_signo = SIGEMT; 1378 siginfo.si_code = EMT_CPCOVF; 1379 siginfo.si_addr = (caddr_t)rp->r_pc; 1380 fault = FLTCPCOVF; 1381 } 1382 } 1383 1384 break; 1385 } 1386 1387 /* 1388 * We can't get here from a system trap 1389 */ 1390 ASSERT(type & USER); 1391 1392 if (fault) { 1393 /* We took a fault so abort single step. */ 1394 lwp->lwp_pcb.pcb_flags &= ~(NORMAL_STEP|WATCH_STEP); 1395 /* 1396 * Remember the fault and fault adddress 1397 * for real-time (SIGPROF) profiling. 1398 */ 1399 lwp->lwp_lastfault = fault; 1400 lwp->lwp_lastfaddr = siginfo.si_addr; 1401 1402 DTRACE_PROC2(fault, int, fault, ksiginfo_t *, &siginfo); 1403 1404 /* 1405 * If a debugger has declared this fault to be an 1406 * event of interest, stop the lwp. Otherwise just 1407 * deliver the associated signal. 1408 */ 1409 if (siginfo.si_signo != SIGKILL && 1410 prismember(&p->p_fltmask, fault) && 1411 stop_on_fault(fault, &siginfo) == 0) 1412 siginfo.si_signo = 0; 1413 } 1414 1415 if (siginfo.si_signo) 1416 trapsig(&siginfo, (fault != FLTFPE && fault != FLTCPCOVF)); 1417 1418 if (lwp->lwp_oweupc) 1419 profil_tick(rp->r_pc); 1420 1421 if (ct->t_astflag | ct->t_sig_check) { 1422 /* 1423 * Turn off the AST flag before checking all the conditions that 1424 * may have caused an AST. This flag is on whenever a signal or 1425 * unusual condition should be handled after the next trap or 1426 * syscall. 1427 */ 1428 astoff(ct); 1429 /* 1430 * If a single-step trap occurred on a syscall (see above) 1431 * recognize it now. Do this before checking for signals 1432 * because deferred_singlestep_trap() may generate a SIGTRAP to 1433 * the LWP or may otherwise mark the LWP to call issig(FORREAL). 1434 */ 1435 if (lwp->lwp_pcb.pcb_flags & DEBUG_PENDING) 1436 deferred_singlestep_trap((caddr_t)rp->r_pc); 1437 1438 ct->t_sig_check = 0; 1439 1440 mutex_enter(&p->p_lock); 1441 if (curthread->t_proc_flag & TP_CHANGEBIND) { 1442 timer_lwpbind(); 1443 curthread->t_proc_flag &= ~TP_CHANGEBIND; 1444 } 1445 mutex_exit(&p->p_lock); 1446 1447 /* 1448 * for kaio requests that are on the per-process poll queue, 1449 * aiop->aio_pollq, they're AIO_POLL bit is set, the kernel 1450 * should copyout their result_t to user memory. by copying 1451 * out the result_t, the user can poll on memory waiting 1452 * for the kaio request to complete. 1453 */ 1454 if (p->p_aio) 1455 aio_cleanup(0); 1456 /* 1457 * If this LWP was asked to hold, call holdlwp(), which will 1458 * stop. holdlwps() sets this up and calls pokelwps() which 1459 * sets the AST flag. 1460 * 1461 * Also check TP_EXITLWP, since this is used by fresh new LWPs 1462 * through lwp_rtt(). That flag is set if the lwp_create(2) 1463 * syscall failed after creating the LWP. 1464 */ 1465 if (ISHOLD(p)) 1466 holdlwp(); 1467 1468 /* 1469 * All code that sets signals and makes ISSIG evaluate true must 1470 * set t_astflag afterwards. 1471 */ 1472 if (ISSIG_PENDING(ct, lwp, p)) { 1473 if (issig(FORREAL)) 1474 psig(); 1475 ct->t_sig_check = 1; 1476 } 1477 1478 if (ct->t_rprof != NULL) { 1479 realsigprof(0, 0, 0); 1480 ct->t_sig_check = 1; 1481 } 1482 1483 /* 1484 * /proc can't enable/disable the trace bit itself 1485 * because that could race with the call gate used by 1486 * system calls via "lcall". If that happened, an 1487 * invalid EFLAGS would result. prstep()/prnostep() 1488 * therefore schedule an AST for the purpose. 1489 */ 1490 if (lwp->lwp_pcb.pcb_flags & REQUEST_STEP) { 1491 lwp->lwp_pcb.pcb_flags &= ~REQUEST_STEP; 1492 rp->r_ps |= PS_T; 1493 } 1494 if (lwp->lwp_pcb.pcb_flags & REQUEST_NOSTEP) { 1495 lwp->lwp_pcb.pcb_flags &= ~REQUEST_NOSTEP; 1496 rp->r_ps &= ~PS_T; 1497 } 1498 } 1499 1500 out: /* We can't get here from a system trap */ 1501 ASSERT(type & USER); 1502 1503 if (ISHOLD(p)) 1504 holdlwp(); 1505 1506 /* 1507 * Set state to LWP_USER here so preempt won't give us a kernel 1508 * priority if it occurs after this point. Call CL_TRAPRET() to 1509 * restore the user-level priority. 1510 * 1511 * It is important that no locks (other than spinlocks) be entered 1512 * after this point before returning to user mode (unless lwp_state 1513 * is set back to LWP_SYS). 1514 */ 1515 lwp->lwp_state = LWP_USER; 1516 1517 if (ct->t_trapret) { 1518 ct->t_trapret = 0; 1519 thread_lock(ct); 1520 CL_TRAPRET(ct); 1521 thread_unlock(ct); 1522 } 1523 if (CPU->cpu_runrun || curthread->t_schedflag & TS_ANYWAITQ) 1524 preempt(); 1525 prunstop(); 1526 (void) new_mstate(ct, mstate); 1527 1528 /* Kernel probe */ 1529 TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 1530 tnf_microstate, state, LMS_USER); 1531 1532 return; 1533 1534 cleanup: /* system traps end up here */ 1535 ASSERT(!(type & USER)); 1536 } 1537 1538 /* 1539 * Patch non-zero to disable preemption of threads in the kernel. 1540 */ 1541 int IGNORE_KERNEL_PREEMPTION = 0; /* XXX - delete this someday */ 1542 1543 struct kpreempt_cnts { /* kernel preemption statistics */ 1544 int kpc_idle; /* executing idle thread */ 1545 int kpc_intr; /* executing interrupt thread */ 1546 int kpc_clock; /* executing clock thread */ 1547 int kpc_blocked; /* thread has blocked preemption (t_preempt) */ 1548 int kpc_notonproc; /* thread is surrendering processor */ 1549 int kpc_inswtch; /* thread has ratified scheduling decision */ 1550 int kpc_prilevel; /* processor interrupt level is too high */ 1551 int kpc_apreempt; /* asynchronous preemption */ 1552 int kpc_spreempt; /* synchronous preemption */ 1553 } kpreempt_cnts; 1554 1555 /* 1556 * kernel preemption: forced rescheduling, preempt the running kernel thread. 1557 * the argument is old PIL for an interrupt, 1558 * or the distingished value KPREEMPT_SYNC. 1559 */ 1560 void 1561 kpreempt(int asyncspl) 1562 { 1563 kthread_t *ct = curthread; 1564 1565 if (IGNORE_KERNEL_PREEMPTION) { 1566 aston(CPU->cpu_dispthread); 1567 return; 1568 } 1569 1570 /* 1571 * Check that conditions are right for kernel preemption 1572 */ 1573 do { 1574 if (ct->t_preempt) { 1575 /* 1576 * either a privileged thread (idle, panic, interrupt) 1577 * or will check when t_preempt is lowered 1578 * We need to specifically handle the case where 1579 * the thread is in the middle of swtch (resume has 1580 * been called) and has its t_preempt set 1581 * [idle thread and a thread which is in kpreempt 1582 * already] and then a high priority thread is 1583 * available in the local dispatch queue. 1584 * In this case the resumed thread needs to take a 1585 * trap so that it can call kpreempt. We achieve 1586 * this by using siron(). 1587 * How do we detect this condition: 1588 * idle thread is running and is in the midst of 1589 * resume: curthread->t_pri == -1 && CPU->dispthread 1590 * != CPU->thread 1591 * Need to ensure that this happens only at high pil 1592 * resume is called at high pil 1593 * Only in resume_from_idle is the pil changed. 1594 */ 1595 if (ct->t_pri < 0) { 1596 kpreempt_cnts.kpc_idle++; 1597 if (CPU->cpu_dispthread != CPU->cpu_thread) 1598 siron(); 1599 } else if (ct->t_flag & T_INTR_THREAD) { 1600 kpreempt_cnts.kpc_intr++; 1601 if (ct->t_pil == CLOCK_LEVEL) 1602 kpreempt_cnts.kpc_clock++; 1603 } else { 1604 kpreempt_cnts.kpc_blocked++; 1605 if (CPU->cpu_dispthread != CPU->cpu_thread) 1606 siron(); 1607 } 1608 aston(CPU->cpu_dispthread); 1609 return; 1610 } 1611 if (ct->t_state != TS_ONPROC || 1612 ct->t_disp_queue != CPU->cpu_disp) { 1613 /* this thread will be calling swtch() shortly */ 1614 kpreempt_cnts.kpc_notonproc++; 1615 if (CPU->cpu_thread != CPU->cpu_dispthread) { 1616 /* already in swtch(), force another */ 1617 kpreempt_cnts.kpc_inswtch++; 1618 siron(); 1619 } 1620 return; 1621 } 1622 if (getpil() >= DISP_LEVEL) { 1623 /* 1624 * We can't preempt this thread if it is at 1625 * a PIL >= DISP_LEVEL since it may be holding 1626 * a spin lock (like sched_lock). 1627 */ 1628 siron(); /* check back later */ 1629 kpreempt_cnts.kpc_prilevel++; 1630 return; 1631 } 1632 if (!interrupts_enabled()) { 1633 /* 1634 * Can't preempt while running with ints disabled 1635 */ 1636 kpreempt_cnts.kpc_prilevel++; 1637 return; 1638 } 1639 if (asyncspl != KPREEMPT_SYNC) 1640 kpreempt_cnts.kpc_apreempt++; 1641 else 1642 kpreempt_cnts.kpc_spreempt++; 1643 1644 ct->t_preempt++; 1645 preempt(); 1646 ct->t_preempt--; 1647 } while (CPU->cpu_kprunrun); 1648 } 1649 1650 /* 1651 * Print out debugging info. 1652 */ 1653 static void 1654 showregs(uint_t type, struct regs *rp, caddr_t addr) 1655 { 1656 int s; 1657 1658 s = spl7(); 1659 type &= ~USER; 1660 if (PTOU(curproc)->u_comm[0]) 1661 printf("%s: ", PTOU(curproc)->u_comm); 1662 if (type < TRAP_TYPES) 1663 printf("#%s %s\n", trap_type_mnemonic[type], trap_type[type]); 1664 else 1665 switch (type) { 1666 case T_SYSCALL: 1667 printf("Syscall Trap:\n"); 1668 break; 1669 case T_AST: 1670 printf("AST\n"); 1671 break; 1672 default: 1673 printf("Bad Trap = %d\n", type); 1674 break; 1675 } 1676 if (type == T_PGFLT) { 1677 printf("Bad %s fault at addr=0x%lx\n", 1678 USERMODE(rp->r_cs) ? "user": "kernel", (uintptr_t)addr); 1679 } else if (addr) { 1680 printf("addr=0x%lx\n", (uintptr_t)addr); 1681 } 1682 1683 printf("pid=%d, pc=0x%lx, sp=0x%lx, eflags=0x%lx\n", 1684 (ttoproc(curthread) && ttoproc(curthread)->p_pidp) ? 1685 ttoproc(curthread)->p_pid : 0, rp->r_pc, rp->r_sp, rp->r_ps); 1686 1687 #if defined(__lint) 1688 /* 1689 * this clause can be deleted when lint bug 4870403 is fixed 1690 * (lint thinks that bit 32 is illegal in a %b format string) 1691 */ 1692 printf("cr0: %x cr4: %b\n", 1693 (uint_t)getcr0(), (uint_t)getcr4(), FMT_CR4); 1694 #else 1695 printf("cr0: %b cr4: %b\n", 1696 (uint_t)getcr0(), FMT_CR0, (uint_t)getcr4(), FMT_CR4); 1697 #endif /* __lint */ 1698 1699 printf("cr2: %lx", getcr2()); 1700 #if !defined(__xpv) 1701 printf("cr3: %lx", getcr3()); 1702 #if defined(__amd64) 1703 printf("cr8: %lx\n", getcr8()); 1704 #endif 1705 #endif 1706 printf("\n"); 1707 1708 dumpregs(rp); 1709 splx(s); 1710 } 1711 1712 static void 1713 dumpregs(struct regs *rp) 1714 { 1715 #if defined(__amd64) 1716 const char fmt[] = "\t%3s: %16lx %3s: %16lx %3s: %16lx\n"; 1717 1718 printf(fmt, "rdi", rp->r_rdi, "rsi", rp->r_rsi, "rdx", rp->r_rdx); 1719 printf(fmt, "rcx", rp->r_rcx, " r8", rp->r_r8, " r9", rp->r_r9); 1720 printf(fmt, "rax", rp->r_rax, "rbx", rp->r_rbx, "rbp", rp->r_rbp); 1721 printf(fmt, "r10", rp->r_r10, "r11", rp->r_r11, "r12", rp->r_r12); 1722 printf(fmt, "r13", rp->r_r13, "r14", rp->r_r14, "r15", rp->r_r15); 1723 1724 printf(fmt, "fsb", rdmsr(MSR_AMD_FSBASE), "gsb", rdmsr(MSR_AMD_GSBASE), 1725 " ds", rp->r_ds); 1726 printf(fmt, " es", rp->r_es, " fs", rp->r_fs, " gs", rp->r_gs); 1727 1728 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, "rip", rp->r_rip); 1729 printf(fmt, " cs", rp->r_cs, "rfl", rp->r_rfl, "rsp", rp->r_rsp); 1730 1731 printf("\t%3s: %16lx\n", " ss", rp->r_ss); 1732 1733 #elif defined(__i386) 1734 const char fmt[] = "\t%3s: %8lx %3s: %8lx %3s: %8lx %3s: %8lx\n"; 1735 1736 printf(fmt, " gs", rp->r_gs, " fs", rp->r_fs, 1737 " es", rp->r_es, " ds", rp->r_ds); 1738 printf(fmt, "edi", rp->r_edi, "esi", rp->r_esi, 1739 "ebp", rp->r_ebp, "esp", rp->r_esp); 1740 printf(fmt, "ebx", rp->r_ebx, "edx", rp->r_edx, 1741 "ecx", rp->r_ecx, "eax", rp->r_eax); 1742 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, 1743 "eip", rp->r_eip, " cs", rp->r_cs); 1744 printf("\t%3s: %8lx %3s: %8lx %3s: %8lx\n", 1745 "efl", rp->r_efl, "usp", rp->r_uesp, " ss", rp->r_ss); 1746 1747 #endif /* __i386 */ 1748 } 1749 1750 /* 1751 * Test to see if the instruction is iret on i386 or iretq on amd64. 1752 * 1753 * On the hypervisor we can only test for nopop_sys_rtt_syscall. If true 1754 * then we are in the context of hypervisor's failsafe handler because it 1755 * tried to iret and failed due to a bad selector. See xen_failsafe_callback. 1756 */ 1757 static int 1758 instr_is_iret(caddr_t pc) 1759 { 1760 1761 #if defined(__xpv) 1762 extern void nopop_sys_rtt_syscall(void); 1763 return ((pc == (caddr_t)nopop_sys_rtt_syscall) ? 1 : 0); 1764 1765 #else 1766 1767 #if defined(__amd64) 1768 static const uint8_t iret_insn[2] = { 0x48, 0xcf }; /* iretq */ 1769 1770 #elif defined(__i386) 1771 static const uint8_t iret_insn[1] = { 0xcf }; /* iret */ 1772 #endif /* __i386 */ 1773 return (bcmp(pc, iret_insn, sizeof (iret_insn)) == 0); 1774 1775 #endif /* __xpv */ 1776 } 1777 1778 #if defined(__i386) 1779 1780 /* 1781 * Test to see if the instruction is part of __SEGREGS_POP 1782 * 1783 * Note carefully the appallingly awful dependency between 1784 * the instruction sequence used in __SEGREGS_POP and these 1785 * instructions encoded here. 1786 */ 1787 static int 1788 instr_is_segregs_pop(caddr_t pc) 1789 { 1790 static const uint8_t movw_0_esp_gs[4] = { 0x8e, 0x6c, 0x24, 0x0 }; 1791 static const uint8_t movw_4_esp_fs[4] = { 0x8e, 0x64, 0x24, 0x4 }; 1792 static const uint8_t movw_8_esp_es[4] = { 0x8e, 0x44, 0x24, 0x8 }; 1793 static const uint8_t movw_c_esp_ds[4] = { 0x8e, 0x5c, 0x24, 0xc }; 1794 1795 if (bcmp(pc, movw_0_esp_gs, sizeof (movw_0_esp_gs)) == 0 || 1796 bcmp(pc, movw_4_esp_fs, sizeof (movw_4_esp_fs)) == 0 || 1797 bcmp(pc, movw_8_esp_es, sizeof (movw_8_esp_es)) == 0 || 1798 bcmp(pc, movw_c_esp_ds, sizeof (movw_c_esp_ds)) == 0) 1799 return (1); 1800 1801 return (0); 1802 } 1803 1804 #endif /* __i386 */ 1805 1806 /* 1807 * Test to see if the instruction is part of _sys_rtt. 1808 * 1809 * Again on the hypervisor if we try to IRET to user land with a bad code 1810 * or stack selector we will get vectored through xen_failsafe_callback. 1811 * In which case we assume we got here via _sys_rtt since we only allow 1812 * IRET to user land to take place in _sys_rtt. 1813 */ 1814 static int 1815 instr_is_sys_rtt(caddr_t pc) 1816 { 1817 extern void _sys_rtt(), _sys_rtt_end(); 1818 1819 if ((uintptr_t)pc < (uintptr_t)_sys_rtt || 1820 (uintptr_t)pc > (uintptr_t)_sys_rtt_end) 1821 return (0); 1822 1823 return (1); 1824 } 1825 1826 /* 1827 * Handle #gp faults in kernel mode. 1828 * 1829 * One legitimate way this can happen is if we attempt to update segment 1830 * registers to naughty values on the way out of the kernel. 1831 * 1832 * This can happen in a couple of ways: someone - either accidentally or 1833 * on purpose - creates (setcontext(2), lwp_create(2)) or modifies 1834 * (signal(2)) a ucontext that contains silly segment register values. 1835 * Or someone - either accidentally or on purpose - modifies the prgregset_t 1836 * of a subject process via /proc to contain silly segment register values. 1837 * 1838 * (The unfortunate part is that we can end up discovering the bad segment 1839 * register value in the middle of an 'iret' after we've popped most of the 1840 * stack. So it becomes quite difficult to associate an accurate ucontext 1841 * with the lwp, because the act of taking the #gp trap overwrites most of 1842 * what we were going to send the lwp.) 1843 * 1844 * OTOH if it turns out that's -not- the problem, and we're -not- an lwp 1845 * trying to return to user mode and we get a #gp fault, then we need 1846 * to die() -- which will happen if we return non-zero from this routine. 1847 */ 1848 static int 1849 kern_gpfault(struct regs *rp) 1850 { 1851 kthread_t *t = curthread; 1852 proc_t *p = ttoproc(t); 1853 klwp_t *lwp = ttolwp(t); 1854 struct regs tmpregs, *trp = NULL; 1855 caddr_t pc = (caddr_t)rp->r_pc; 1856 int v; 1857 uint32_t auditing = AU_AUDITING(); 1858 1859 /* 1860 * if we're not an lwp, or in the case of running native the 1861 * pc range is outside _sys_rtt, then we should immediately 1862 * be die()ing horribly. 1863 */ 1864 if (lwp == NULL || !instr_is_sys_rtt(pc)) 1865 return (1); 1866 1867 /* 1868 * So at least we're in the right part of the kernel. 1869 * 1870 * Disassemble the instruction at the faulting pc. 1871 * Once we know what it is, we carefully reconstruct the stack 1872 * based on the order in which the stack is deconstructed in 1873 * _sys_rtt. Ew. 1874 */ 1875 if (instr_is_iret(pc)) { 1876 /* 1877 * We took the #gp while trying to perform the IRET. 1878 * This means that either %cs or %ss are bad. 1879 * All we know for sure is that most of the general 1880 * registers have been restored, including the 1881 * segment registers, and all we have left on the 1882 * topmost part of the lwp's stack are the 1883 * registers that the iretq was unable to consume. 1884 * 1885 * All the rest of the state was crushed by the #gp 1886 * which pushed -its- registers atop our old save area 1887 * (because we had to decrement the stack pointer, sigh) so 1888 * all that we can try and do is to reconstruct the 1889 * crushed frame from the #gp trap frame itself. 1890 */ 1891 trp = &tmpregs; 1892 trp->r_ss = lwptoregs(lwp)->r_ss; 1893 trp->r_sp = lwptoregs(lwp)->r_sp; 1894 trp->r_ps = lwptoregs(lwp)->r_ps; 1895 trp->r_cs = lwptoregs(lwp)->r_cs; 1896 trp->r_pc = lwptoregs(lwp)->r_pc; 1897 bcopy(rp, trp, offsetof(struct regs, r_pc)); 1898 1899 /* 1900 * Validate simple math 1901 */ 1902 ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc); 1903 ASSERT(trp->r_err == rp->r_err); 1904 1905 1906 1907 } 1908 1909 #if defined(__amd64) 1910 if (trp == NULL && lwp->lwp_pcb.pcb_rupdate != 0) { 1911 1912 /* 1913 * This is the common case -- we're trying to load 1914 * a bad segment register value in the only section 1915 * of kernel code that ever loads segment registers. 1916 * 1917 * We don't need to do anything at this point because 1918 * the pcb contains all the pending segment register 1919 * state, and the regs are still intact because we 1920 * didn't adjust the stack pointer yet. Given the fidelity 1921 * of all this, we could conceivably send a signal 1922 * to the lwp, rather than core-ing. 1923 */ 1924 trp = lwptoregs(lwp); 1925 ASSERT((caddr_t)trp == (caddr_t)rp->r_sp); 1926 } 1927 1928 #elif defined(__i386) 1929 1930 if (trp == NULL && instr_is_segregs_pop(pc)) 1931 trp = lwptoregs(lwp); 1932 1933 #endif /* __i386 */ 1934 1935 if (trp == NULL) 1936 return (1); 1937 1938 /* 1939 * If we get to here, we're reasonably confident that we've 1940 * correctly decoded what happened on the way out of the kernel. 1941 * Rewrite the lwp's registers so that we can create a core dump 1942 * the (at least vaguely) represents the mcontext we were 1943 * being asked to restore when things went so terribly wrong. 1944 */ 1945 1946 /* 1947 * Make sure that we have a meaningful %trapno and %err. 1948 */ 1949 trp->r_trapno = rp->r_trapno; 1950 trp->r_err = rp->r_err; 1951 1952 if ((caddr_t)trp != (caddr_t)lwptoregs(lwp)) 1953 bcopy(trp, lwptoregs(lwp), sizeof (*trp)); 1954 1955 1956 mutex_enter(&p->p_lock); 1957 lwp->lwp_cursig = SIGSEGV; 1958 mutex_exit(&p->p_lock); 1959 1960 /* 1961 * Terminate all LWPs but don't discard them. If another lwp beat 1962 * us to the punch by calling exit(), evaporate now. 1963 */ 1964 proc_is_exiting(p); 1965 if (exitlwps(1) != 0) { 1966 mutex_enter(&p->p_lock); 1967 lwp_exit(); 1968 } 1969 1970 if (auditing) /* audit core dump */ 1971 audit_core_start(SIGSEGV); 1972 v = core(SIGSEGV, B_FALSE); 1973 if (auditing) /* audit core dump */ 1974 audit_core_finish(v ? CLD_KILLED : CLD_DUMPED); 1975 exit(v ? CLD_KILLED : CLD_DUMPED, SIGSEGV); 1976 return (0); 1977 } 1978 1979 /* 1980 * dump_tss() - Display the TSS structure 1981 */ 1982 1983 #if !defined(__xpv) 1984 #if defined(__amd64) 1985 1986 static void 1987 dump_tss(void) 1988 { 1989 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 1990 tss_t *tss = CPU->cpu_tss; 1991 1992 printf(tss_fmt, "tss_rsp0", (void *)tss->tss_rsp0); 1993 printf(tss_fmt, "tss_rsp1", (void *)tss->tss_rsp1); 1994 printf(tss_fmt, "tss_rsp2", (void *)tss->tss_rsp2); 1995 1996 printf(tss_fmt, "tss_ist1", (void *)tss->tss_ist1); 1997 printf(tss_fmt, "tss_ist2", (void *)tss->tss_ist2); 1998 printf(tss_fmt, "tss_ist3", (void *)tss->tss_ist3); 1999 printf(tss_fmt, "tss_ist4", (void *)tss->tss_ist4); 2000 printf(tss_fmt, "tss_ist5", (void *)tss->tss_ist5); 2001 printf(tss_fmt, "tss_ist6", (void *)tss->tss_ist6); 2002 printf(tss_fmt, "tss_ist7", (void *)tss->tss_ist7); 2003 } 2004 2005 #elif defined(__i386) 2006 2007 static void 2008 dump_tss(void) 2009 { 2010 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 2011 tss_t *tss = CPU->cpu_tss; 2012 2013 printf(tss_fmt, "tss_link", (void *)(uintptr_t)tss->tss_link); 2014 printf(tss_fmt, "tss_esp0", (void *)(uintptr_t)tss->tss_esp0); 2015 printf(tss_fmt, "tss_ss0", (void *)(uintptr_t)tss->tss_ss0); 2016 printf(tss_fmt, "tss_esp1", (void *)(uintptr_t)tss->tss_esp1); 2017 printf(tss_fmt, "tss_ss1", (void *)(uintptr_t)tss->tss_ss1); 2018 printf(tss_fmt, "tss_esp2", (void *)(uintptr_t)tss->tss_esp2); 2019 printf(tss_fmt, "tss_ss2", (void *)(uintptr_t)tss->tss_ss2); 2020 printf(tss_fmt, "tss_cr3", (void *)(uintptr_t)tss->tss_cr3); 2021 printf(tss_fmt, "tss_eip", (void *)(uintptr_t)tss->tss_eip); 2022 printf(tss_fmt, "tss_eflags", (void *)(uintptr_t)tss->tss_eflags); 2023 printf(tss_fmt, "tss_eax", (void *)(uintptr_t)tss->tss_eax); 2024 printf(tss_fmt, "tss_ebx", (void *)(uintptr_t)tss->tss_ebx); 2025 printf(tss_fmt, "tss_ecx", (void *)(uintptr_t)tss->tss_ecx); 2026 printf(tss_fmt, "tss_edx", (void *)(uintptr_t)tss->tss_edx); 2027 printf(tss_fmt, "tss_esp", (void *)(uintptr_t)tss->tss_esp); 2028 } 2029 2030 #endif /* __amd64 */ 2031 #endif /* !__xpv */ 2032 2033 #if defined(TRAPTRACE) 2034 2035 int ttrace_nrec = 10; /* number of records to dump out */ 2036 int ttrace_dump_nregs = 0; /* dump out this many records with regs too */ 2037 2038 /* 2039 * Dump out the last ttrace_nrec traptrace records on each CPU 2040 */ 2041 static void 2042 dump_ttrace(void) 2043 { 2044 trap_trace_ctl_t *ttc; 2045 trap_trace_rec_t *rec; 2046 uintptr_t current; 2047 int i, j, k; 2048 int n = NCPU; 2049 #if defined(__amd64) 2050 const char banner[] = 2051 "\ncpu address timestamp " 2052 "type vc handler pc\n"; 2053 const char fmt1[] = "%3d %016lx %12llx "; 2054 #elif defined(__i386) 2055 const char banner[] = 2056 "\ncpu address timestamp type vc handler pc\n"; 2057 const char fmt1[] = "%3d %08lx %12llx "; 2058 #endif 2059 const char fmt2[] = "%4s %3x "; 2060 const char fmt3[] = "%8s "; 2061 2062 if (ttrace_nrec == 0) 2063 return; 2064 2065 printf(banner); 2066 2067 for (i = 0; i < n; i++) { 2068 ttc = &trap_trace_ctl[i]; 2069 if (ttc->ttc_first == NULL) 2070 continue; 2071 2072 current = ttc->ttc_next - sizeof (trap_trace_rec_t); 2073 for (j = 0; j < ttrace_nrec; j++) { 2074 struct sysent *sys; 2075 struct autovec *vec; 2076 extern struct av_head autovect[]; 2077 int type; 2078 ulong_t off; 2079 char *sym, *stype; 2080 2081 if (current < ttc->ttc_first) 2082 current = 2083 ttc->ttc_limit - sizeof (trap_trace_rec_t); 2084 2085 if (current == NULL) 2086 continue; 2087 2088 rec = (trap_trace_rec_t *)current; 2089 2090 if (rec->ttr_stamp == 0) 2091 break; 2092 2093 printf(fmt1, i, (uintptr_t)rec, rec->ttr_stamp); 2094 2095 switch (rec->ttr_marker) { 2096 case TT_SYSCALL: 2097 case TT_SYSENTER: 2098 case TT_SYSC: 2099 case TT_SYSC64: 2100 #if defined(__amd64) 2101 sys = &sysent32[rec->ttr_sysnum]; 2102 switch (rec->ttr_marker) { 2103 case TT_SYSC64: 2104 sys = &sysent[rec->ttr_sysnum]; 2105 /*FALLTHROUGH*/ 2106 #elif defined(__i386) 2107 sys = &sysent[rec->ttr_sysnum]; 2108 switch (rec->ttr_marker) { 2109 case TT_SYSC64: 2110 #endif 2111 case TT_SYSC: 2112 stype = "sysc"; /* syscall */ 2113 break; 2114 case TT_SYSCALL: 2115 stype = "lcal"; /* lcall */ 2116 break; 2117 case TT_SYSENTER: 2118 stype = "syse"; /* sysenter */ 2119 break; 2120 default: 2121 break; 2122 } 2123 printf(fmt2, "sysc", rec->ttr_sysnum); 2124 if (sys != NULL) { 2125 sym = kobj_getsymname( 2126 (uintptr_t)sys->sy_callc, 2127 &off); 2128 if (sym != NULL) 2129 printf(fmt3, sym); 2130 else 2131 printf("%p ", sys->sy_callc); 2132 } else { 2133 printf(fmt3, "unknown"); 2134 } 2135 break; 2136 2137 case TT_INTERRUPT: 2138 printf(fmt2, "intr", rec->ttr_vector); 2139 if (get_intr_handler != NULL) 2140 vec = (struct autovec *) 2141 (*get_intr_handler) 2142 (rec->ttr_cpuid, rec->ttr_vector); 2143 else 2144 vec = 2145 autovect[rec->ttr_vector].avh_link; 2146 2147 if (vec != NULL) { 2148 sym = kobj_getsymname( 2149 (uintptr_t)vec->av_vector, &off); 2150 if (sym != NULL) 2151 printf(fmt3, sym); 2152 else 2153 printf("%p ", vec->av_vector); 2154 } else { 2155 printf(fmt3, "unknown "); 2156 } 2157 break; 2158 2159 case TT_TRAP: 2160 case TT_EVENT: 2161 type = rec->ttr_regs.r_trapno; 2162 printf(fmt2, "trap", type); 2163 if (type < TRAP_TYPES) 2164 printf(" #%s ", 2165 trap_type_mnemonic[type]); 2166 else 2167 switch (type) { 2168 case T_AST: 2169 printf(fmt3, "ast"); 2170 break; 2171 default: 2172 printf(fmt3, ""); 2173 break; 2174 } 2175 break; 2176 2177 default: 2178 break; 2179 } 2180 2181 sym = kobj_getsymname(rec->ttr_regs.r_pc, &off); 2182 if (sym != NULL) 2183 printf("%s+%lx\n", sym, off); 2184 else 2185 printf("%lx\n", rec->ttr_regs.r_pc); 2186 2187 if (ttrace_dump_nregs-- > 0) { 2188 int s; 2189 2190 if (rec->ttr_marker == TT_INTERRUPT) 2191 printf( 2192 "\t\tipl %x spl %x pri %x\n", 2193 rec->ttr_ipl, 2194 rec->ttr_spl, 2195 rec->ttr_pri); 2196 2197 dumpregs(&rec->ttr_regs); 2198 2199 printf("\t%3s: %p\n\n", " ct", 2200 (void *)rec->ttr_curthread); 2201 2202 /* 2203 * print out the pc stack that we recorded 2204 * at trap time (if any) 2205 */ 2206 for (s = 0; s < rec->ttr_sdepth; s++) { 2207 uintptr_t fullpc; 2208 2209 if (s >= TTR_STACK_DEPTH) { 2210 printf("ttr_sdepth corrupt\n"); 2211 break; 2212 } 2213 2214 fullpc = (uintptr_t)rec->ttr_stack[s]; 2215 2216 sym = kobj_getsymname(fullpc, &off); 2217 if (sym != NULL) 2218 printf("-> %s+0x%lx()\n", 2219 sym, off); 2220 else 2221 printf("-> 0x%lx()\n", fullpc); 2222 } 2223 printf("\n"); 2224 } 2225 current -= sizeof (trap_trace_rec_t); 2226 } 2227 } 2228 } 2229 2230 #endif /* TRAPTRACE */ 2231 2232 void 2233 panic_showtrap(struct panic_trap_info *tip) 2234 { 2235 showregs(tip->trap_type, tip->trap_regs, tip->trap_addr); 2236 2237 #if defined(TRAPTRACE) 2238 dump_ttrace(); 2239 #endif 2240 2241 #if !defined(__xpv) 2242 if (tip->trap_type == T_DBLFLT) 2243 dump_tss(); 2244 #endif 2245 } 2246 2247 void 2248 panic_savetrap(panic_data_t *pdp, struct panic_trap_info *tip) 2249 { 2250 panic_saveregs(pdp, tip->trap_regs); 2251 } 2252