1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #define PSMI_1_5 30 31 #include <sys/mutex.h> 32 #include <sys/types.h> 33 #include <sys/time.h> 34 #include <sys/machlock.h> 35 #include <sys/smp_impldefs.h> 36 #include <sys/uadmin.h> 37 #include <sys/promif.h> 38 #include <sys/psm.h> 39 #include <sys/pit.h> 40 #include <sys/psm_common.h> 41 #include <sys/atomic.h> 42 43 #define NSEC_IN_SEC 1000000000 44 45 /* 46 * External References 47 */ 48 extern int intr_clear(void); 49 extern void intr_restore(uint_t); 50 51 /* 52 * Local Function Prototypes 53 */ 54 static void uppc_softinit(void); 55 static void uppc_picinit(); 56 static int uppc_clkinit(int); 57 static int uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl); 58 static int uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl); 59 static processorid_t uppc_get_next_processorid(processorid_t cpu_id); 60 static int uppc_get_clockirq(int ipl); 61 static int uppc_probe(void); 62 static int uppc_translate_irq(dev_info_t *dip, int irqno); 63 static void uppc_shutdown(int cmd, int fcn); 64 static void uppc_preshutdown(int cmd, int fcn); 65 static int uppc_init_acpi(void); 66 static void uppc_setspl(int); 67 static int uppc_intr_enter(int, int *); 68 static void uppc_intr_exit(int, int); 69 static hrtime_t uppc_gethrtime(); 70 71 static int uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip, 72 int *pci_irqp, iflag_t *intr_flagp); 73 74 /* 75 * Global Data 76 */ 77 static struct standard_pic pics0; 78 int uppc_use_acpi = 1; /* Use ACPI by default */ 79 int uppc_enable_acpi = 0; 80 81 82 /* 83 * For interrupt link devices, if uppc_unconditional_srs is set, an irq resource 84 * will be assigned (via _SRS). If it is not set, use the current 85 * irq setting (via _CRS), but only if that irq is in the set of possible 86 * irqs (returned by _PRS) for the device. 87 */ 88 int uppc_unconditional_srs = 1; 89 90 /* 91 * For interrupt link devices, if uppc_prefer_crs is set when we are 92 * assigning an IRQ resource to a device, prefer the current IRQ setting 93 * over other possible irq settings under same conditions. 94 */ 95 int uppc_prefer_crs = 1; 96 97 int uppc_verbose = 0; 98 99 /* flag definitions for uppc_verbose */ 100 #define UPPC_VERBOSE_IRQ_FLAG 0x00000001 101 #define UPPC_VERBOSE_POWEROFF_FLAG 0x00000002 102 #define UPPC_VERBOSE_POWEROFF_PAUSE_FLAG 0x00000004 103 104 105 #define UPPC_VERBOSE_IRQ(fmt) \ 106 if (uppc_verbose & UPPC_VERBOSE_IRQ_FLAG) \ 107 cmn_err fmt; 108 109 #define UPPC_VERBOSE_POWEROFF(fmt) \ 110 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_FLAG) \ 111 prom_printf fmt; 112 113 uchar_t uppc_reserved_irqlist[MAX_ISA_IRQ + 1]; 114 115 static uint16_t uppc_irq_shared_table[MAX_ISA_IRQ + 1]; 116 117 /* 118 * Contains SCI irqno from FADT after initialization 119 */ 120 static int uppc_sci = -1; 121 122 /* 123 * Local Static Data 124 */ 125 126 static lock_t uppc_gethrtime_lock; 127 static hrtime_t uppc_lasthrtime; 128 129 130 #ifdef UPPC_DEBUG 131 #define DENT 0x0001 132 133 static int uppc_debug = 0; 134 135 136 #endif 137 138 139 static struct psm_ops uppc_ops = { 140 uppc_probe, /* psm_probe */ 141 142 uppc_softinit, /* psm_init */ 143 uppc_picinit, /* psm_picinit */ 144 uppc_intr_enter, /* psm_intr_enter */ 145 uppc_intr_exit, /* psm_intr_exit */ 146 uppc_setspl, /* psm_setspl */ 147 uppc_addspl, /* psm_addspl */ 148 uppc_delspl, /* psm_delspl */ 149 (int (*)(processorid_t))NULL, /* psm_disable_intr */ 150 (void (*)(processorid_t))NULL, /* psm_enable_intr */ 151 (int (*)(int))NULL, /* psm_softlvl_to_irq */ 152 (void (*)(int))NULL, /* psm_set_softintr */ 153 (void (*)(processorid_t))NULL, /* psm_set_idlecpu */ 154 (void (*)(processorid_t))NULL, /* psm_unset_idlecpu */ 155 156 uppc_clkinit, /* psm_clkinit */ 157 uppc_get_clockirq, /* psm_get_clockirq */ 158 (void (*)(void))NULL, /* psm_hrtimeinit */ 159 uppc_gethrtime, /* psm_gethrtime */ 160 161 uppc_get_next_processorid, /* psm_get_next_processorid */ 162 (void (*)(processorid_t, caddr_t))NULL, /* psm_cpu_start */ 163 (int (*)(void))NULL, /* psm_post_cpu_start */ 164 uppc_shutdown, /* psm_shutdown */ 165 (int (*)(int, int))NULL, /* psm_get_ipivect */ 166 (void (*)(processorid_t, int))NULL, /* psm_send_ipi */ 167 168 uppc_translate_irq, /* psm_translate_irq */ 169 170 (int (*)(todinfo_t *))NULL, /* psm_tod_get */ 171 (int (*)(todinfo_t *))NULL, /* psm_tod_set */ 172 173 (void (*)(int, char *))NULL, /* psm_notify_error */ 174 (void (*)(int msg))NULL, /* psm_notify_func */ 175 (void (*)(hrtime_t time))NULL, /* psm_timer_reprogram */ 176 (void (*)(void))NULL, /* psm_timer_enable */ 177 (void (*)(void))NULL, /* psm_timer_disable */ 178 (void (*)(void *arg))NULL, /* psm_post_cyclic_setup */ 179 uppc_preshutdown, /* psm_preshutdown */ 180 181 (int (*)(dev_info_t *, ddi_intr_handle_impl_t *, 182 psm_intr_op_t, int *))NULL /* psm_intr_ops */ 183 }; 184 185 186 static struct psm_info uppc_info = { 187 PSM_INFO_VER01_5, /* version */ 188 PSM_OWN_SYS_DEFAULT, /* ownership */ 189 (struct psm_ops *)&uppc_ops, /* operation */ 190 "uppc", /* machine name */ 191 "UniProcessor PC", /* machine descriptions */ 192 }; 193 194 /* 195 * Configuration Data 196 */ 197 198 /* 199 * This is the loadable module wrapper. 200 */ 201 #include <sys/modctl.h> 202 203 static void *uppc_hdlp; 204 205 int 206 _init(void) 207 { 208 return (psm_mod_init(&uppc_hdlp, &uppc_info)); 209 } 210 211 int 212 _fini(void) 213 { 214 return (psm_mod_fini(&uppc_hdlp, &uppc_info)); 215 } 216 217 int 218 _info(struct modinfo *modinfop) 219 { 220 return (psm_mod_info(&uppc_hdlp, &uppc_info, modinfop)); 221 } 222 223 /* 224 * Autoconfiguration Routines 225 */ 226 227 static int 228 uppc_probe(void) 229 { 230 231 232 return (PSM_SUCCESS); 233 } 234 235 static void 236 uppc_softinit(void) 237 { 238 struct standard_pic *pp; 239 int i; 240 241 pp = &pics0; 242 243 244 if (uppc_use_acpi && uppc_init_acpi()) { 245 build_reserved_irqlist((uchar_t *)uppc_reserved_irqlist); 246 for (i = 0; i <= MAX_ISA_IRQ; i++) 247 uppc_irq_shared_table[i] = 0; 248 uppc_enable_acpi = 1; 249 } 250 251 /* 252 * initialize the ipl mask 253 */ 254 for (i = 0; i < (MAXIPL << 1); i += 2) { 255 /* enable slave lines on master */ 256 pp->c_iplmask[i] = 0xff; 257 pp->c_iplmask[i+1] = (0xff & ~(1 << MASTERLINE)); 258 } 259 } 260 261 /*ARGSUSED*/ 262 static int 263 uppc_clkinit(int hertz) 264 { 265 ulong_t clkticks = PIT_HZ / hz; 266 267 if (hertz == 0) 268 return (0); /* One shot mode not supported */ 269 270 /* 271 * program timer 0 272 */ 273 outb(PITCTL_PORT, (PIT_C0|PIT_NDIVMODE|PIT_READMODE)); 274 outb(PITCTR0_PORT, (uchar_t)clkticks); 275 outb(PITCTR0_PORT, (uchar_t)(clkticks>>8)); 276 277 return (NSEC_IN_SEC / hertz); 278 } 279 280 static void 281 uppc_picinit() 282 { 283 picsetup(); 284 285 /* 286 * If a valid SCI is present, manually addspl() 287 * since we're not set-up early enough in boot 288 * to do it "conventionally" (via add_avintr) 289 */ 290 if (uppc_sci >= 0) 291 (void) uppc_addspl(uppc_sci, SCI_IPL, SCI_IPL, SCI_IPL); 292 } 293 294 /*ARGSUSED3*/ 295 static int 296 uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl) 297 { 298 struct standard_pic *pp; 299 int i; 300 int startidx; 301 uchar_t vectmask; 302 303 if (ipl != min_ipl) 304 return (0); 305 306 if (irqno > 7) { 307 vectmask = 1 << (irqno - 8); 308 startidx = (ipl << 1); 309 } else { 310 vectmask = 1 << irqno; 311 startidx = (ipl << 1) + 1; 312 } 313 314 if (irqno <= MAX_ISA_IRQ) 315 atomic_add_16(&uppc_irq_shared_table[irqno], 1); 316 317 /* 318 * mask intr same or above ipl 319 * level MAXIPL has all intr off as init. default 320 */ 321 pp = &pics0; 322 for (i = startidx; i < (MAXIPL << 1); i += 2) { 323 if (pp->c_iplmask[i] & vectmask) 324 break; 325 pp->c_iplmask[i] |= vectmask; 326 } 327 328 /* 329 * unmask intr below ipl 330 */ 331 for (i = startidx-2; i >= 0; i -= 2) { 332 if (!(pp->c_iplmask[i] & vectmask)) 333 break; 334 pp->c_iplmask[i] &= ~vectmask; 335 } 336 return (0); 337 } 338 339 static int 340 uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl) 341 { 342 struct standard_pic *pp; 343 int i; 344 uchar_t vectmask; 345 346 /* 347 * skip if we are not deleting the last handler 348 * and the ipl is higher than minimum 349 */ 350 if ((max_ipl != PSM_INVALID_IPL) && (ipl >= min_ipl)) 351 return (0); 352 353 if (irqno > 7) { 354 vectmask = 1 << (irqno - 8); 355 i = 0; 356 } else { 357 vectmask = 1 << irqno; 358 i = 1; 359 } 360 361 if (irqno <= MAX_ISA_IRQ) 362 atomic_add_16(&uppc_irq_shared_table[irqno], -1); 363 364 pp = &pics0; 365 366 /* 367 * check any handlers left for this irqno 368 */ 369 if (max_ipl != PSM_INVALID_IPL) { 370 /* 371 * unmasks all levels below the lowest priority 372 */ 373 i += ((min_ipl - 1) << 1); 374 for (; i >= 0; i -= 2) { 375 if (!(pp->c_iplmask[i] & vectmask)) 376 break; 377 pp->c_iplmask[i] &= ~vectmask; 378 } 379 } else { 380 /* 381 * set mask to all levels 382 */ 383 for (; i < (MAXIPL << 1); i += 2) { 384 if (pp->c_iplmask[i] & vectmask) 385 break; 386 pp->c_iplmask[i] |= vectmask; 387 } 388 } 389 return (0); 390 } 391 392 static processorid_t 393 uppc_get_next_processorid(processorid_t cpu_id) 394 { 395 if (cpu_id == -1) 396 return (0); 397 return (-1); 398 } 399 400 /*ARGSUSED*/ 401 static int 402 uppc_get_clockirq(int ipl) 403 { 404 return (CLOCK_VECTOR); 405 } 406 407 408 static int 409 uppc_init_acpi(void) 410 { 411 int verboseflags = 0; 412 int sci; 413 iflag_t sci_flags; 414 415 /* 416 * Process SCI configuration here; this may return 417 * an error if acpi-user-options has specified 418 * legacy mode (use ACPI without ACPI mode or SCI) 419 */ 420 if (acpica_get_sci(&sci, &sci_flags) != AE_OK) 421 sci = -1; 422 423 /* 424 * Initialize sub-system - if error is returns, ACPI is not 425 * used. 426 */ 427 if (acpica_init() != AE_OK) 428 return (0); 429 430 /* 431 * uppc implies system is in PIC mode; set edge/level 432 * via ELCR based on return value from get_sci; this 433 * will default to level/low if no override present, 434 * as recommended by Intel ACPI CA team. 435 */ 436 if (sci >= 0) { 437 ASSERT((sci_flags.intr_el == INTR_EL_LEVEL) || 438 (sci_flags.intr_el == INTR_EL_EDGE)); 439 440 psm_set_elcr(sci, sci_flags.intr_el == INTR_EL_LEVEL); 441 } 442 443 /* 444 * Remember SCI for later use 445 */ 446 uppc_sci = sci; 447 448 if (uppc_verbose & UPPC_VERBOSE_IRQ_FLAG) 449 verboseflags |= PSM_VERBOSE_IRQ_FLAG; 450 451 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_FLAG) 452 verboseflags |= PSM_VERBOSE_POWEROFF_FLAG; 453 454 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_PAUSE_FLAG) 455 verboseflags |= PSM_VERBOSE_POWEROFF_PAUSE_FLAG; 456 457 if (acpi_psm_init(uppc_info.p_mach_idstring, verboseflags) == 458 ACPI_PSM_FAILURE) { 459 return (0); 460 } 461 462 return (1); 463 } 464 465 466 static void 467 uppc_preshutdown(int cmd, int fcn) 468 { 469 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown(%d,%d);\n", cmd, fcn)); 470 471 if ((cmd != A_SHUTDOWN) || (fcn != AD_POWEROFF)) { 472 return; 473 } 474 475 if (uppc_enable_acpi) { 476 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown: ACPI enabled\n")); 477 } else { 478 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown: ACPI not enabled\n")); 479 } 480 } 481 482 static void 483 uppc_shutdown(int cmd, int fcn) 484 { 485 UPPC_VERBOSE_POWEROFF(("uppc_shutdown(%d,%d);\n", cmd, fcn)); 486 487 if ((cmd != A_SHUTDOWN) || (fcn != AD_POWEROFF)) { 488 return; 489 } 490 if (uppc_enable_acpi) 491 (void) acpi_poweroff(); 492 } 493 494 static int 495 uppc_acpi_translate_pci_irq(dev_info_t *dip, int busid, int devid, 496 int ipin, int *pci_irqp, iflag_t *intr_flagp) 497 { 498 int status; 499 acpi_psm_lnk_t acpipsmlnk; 500 501 if ((status = acpi_get_irq_cache_ent(busid, devid, ipin, pci_irqp, 502 intr_flagp)) == ACPI_PSM_SUCCESS) { 503 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Found irqno %d " 504 "from cache for device %s, instance #%d\n", *pci_irqp, 505 ddi_get_name(dip), ddi_get_instance(dip))); 506 return (status); 507 } 508 509 bzero(&acpipsmlnk, sizeof (acpi_psm_lnk_t)); 510 511 if ((status = acpi_translate_pci_irq(dip, ipin, pci_irqp, 512 intr_flagp, &acpipsmlnk)) == ACPI_PSM_FAILURE) { 513 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: " 514 " acpi_translate_pci_irq failed for device %s, instance" 515 " #%d\n", ddi_get_name(dip), ddi_get_instance(dip))); 516 517 return (status); 518 } 519 520 if (status == ACPI_PSM_PARTIAL && acpipsmlnk.lnkobj != NULL) { 521 status = uppc_acpi_irq_configure(&acpipsmlnk, dip, pci_irqp, 522 intr_flagp); 523 if (status != ACPI_PSM_SUCCESS) { 524 status = acpi_get_current_irq_resource(&acpipsmlnk, 525 pci_irqp, intr_flagp); 526 } 527 } 528 529 if (status == ACPI_PSM_SUCCESS) { 530 acpi_new_irq_cache_ent(busid, devid, ipin, *pci_irqp, 531 intr_flagp, &acpipsmlnk); 532 psm_set_elcr(*pci_irqp, 1); /* set IRQ to PCI mode */ 533 534 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: [ACPI] " 535 "new irq %d for device %s, instance #%d\n", 536 *pci_irqp, ddi_get_name(dip), ddi_get_instance(dip))); 537 } 538 539 return (status); 540 } 541 542 /* 543 * Configures the irq for the interrupt link device identified by 544 * acpipsmlnkp. 545 * 546 * Gets the current and the list of possible irq settings for the 547 * device. If uppc_unconditional_srs is not set, and the current 548 * resource setting is in the list of possible irq settings, 549 * current irq resource setting is passed to the caller. 550 * 551 * Otherwise, picks an irq number from the list of possible irq 552 * settings, and sets the irq of the device to this value. 553 * If prefer_crs is set, among a set of irq numbers in the list that have 554 * the least number of devices sharing the interrupt, we pick current irq 555 * resource setting if it is a member of this set. 556 * 557 * Passes the irq number in the value pointed to by pci_irqp, and 558 * polarity and sensitivity in the structure pointed to by dipintrflagp 559 * to the caller. 560 * 561 * Note that if setting the irq resource failed, but successfuly obtained 562 * the current irq resource settings, passes the current irq resources 563 * and considers it a success. 564 * 565 * Returns: 566 * ACPI_PSM_SUCCESS on success. 567 * 568 * ACPI_PSM_FAILURE if an error occured during the configuration or 569 * if a suitable irq was not found for this device, or if setting the 570 * irq resource and obtaining the current resource fails. 571 * 572 */ 573 static int 574 uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip, 575 int *pci_irqp, iflag_t *dipintr_flagp) 576 { 577 int i, min_share, foundnow, done = 0; 578 int32_t irq; 579 int32_t share_irq = -1; 580 int32_t chosen_irq = -1; 581 int cur_irq = -1; 582 acpi_irqlist_t *irqlistp; 583 acpi_irqlist_t *irqlistent; 584 585 if ((acpi_get_possible_irq_resources(acpipsmlnkp, &irqlistp)) 586 == ACPI_PSM_FAILURE) { 587 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: Unable to determine " 588 "or assign IRQ for device %s, instance #%d: The system was " 589 "unable to get the list of potential IRQs from ACPI.", 590 ddi_get_name(dip), ddi_get_instance(dip))); 591 592 return (ACPI_PSM_FAILURE); 593 } 594 595 if ((acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq, 596 dipintr_flagp) == ACPI_PSM_SUCCESS) && (!uppc_unconditional_srs) && 597 (cur_irq > 0)) { 598 599 if (acpi_irqlist_find_irq(irqlistp, cur_irq, NULL) 600 == ACPI_PSM_SUCCESS) { 601 602 acpi_free_irqlist(irqlistp); 603 ASSERT(pci_irqp != NULL); 604 *pci_irqp = cur_irq; 605 return (ACPI_PSM_SUCCESS); 606 } 607 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: Could not find the " 608 "current irq %d for device %s, instance #%d in ACPI's " 609 "list of possible irqs for this device. Picking one from " 610 " the latter list.", cur_irq, ddi_get_name(dip), 611 ddi_get_instance(dip))); 612 613 } 614 615 irqlistent = irqlistp; 616 min_share = 255; 617 618 while (irqlistent != NULL) { 619 620 for (foundnow = 0, i = 0; i < irqlistent->num_irqs; i++) { 621 622 irq = irqlistp->irqs[i]; 623 624 if ((irq > MAX_ISA_IRQ) || 625 (irqlistent->intr_flags.intr_el == INTR_EL_EDGE) || 626 (irq == 0)) 627 continue; 628 629 if (uppc_reserved_irqlist[irq]) 630 continue; 631 632 if (uppc_irq_shared_table[irq] == 0) { 633 chosen_irq = irq; 634 foundnow = 1; 635 if (!(uppc_prefer_crs) || (irq == cur_irq)) { 636 done = 1; 637 break; 638 } 639 } 640 641 if ((uppc_irq_shared_table[irq] < min_share) || 642 ((uppc_irq_shared_table[irq] == min_share) && 643 (cur_irq == irq) && (uppc_prefer_crs))) { 644 min_share = uppc_irq_shared_table[irq]; 645 share_irq = irq; 646 foundnow = 1; 647 } 648 } 649 650 /* If we found an IRQ in the inner loop, save the details */ 651 if (foundnow && ((chosen_irq != -1) || (share_irq != -1))) { 652 /* 653 * Copy the acpi_prs_private_t and flags from this 654 * irq list entry, since we found an irq from this 655 * entry. 656 */ 657 acpipsmlnkp->acpi_prs_prv = irqlistent->acpi_prs_prv; 658 *dipintr_flagp = irqlistent->intr_flags; 659 } 660 661 if (done) 662 break; 663 664 /* Load the next entry in the irqlist */ 665 irqlistent = irqlistent->next; 666 } 667 668 acpi_free_irqlist(irqlistp); 669 670 if (chosen_irq != -1) 671 irq = chosen_irq; 672 else if (share_irq != -1) 673 irq = share_irq; 674 else { 675 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Could not find a " 676 "suitable irq from the list of possible irqs for device " 677 "%s, instance #%d in ACPI's list of possible\n", 678 ddi_get_name(dip), ddi_get_instance(dip))); 679 680 return (ACPI_PSM_FAILURE); 681 } 682 683 684 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Setting irq %d for device %s " 685 "instance #%d\n", irq, ddi_get_name(dip), ddi_get_instance(dip))); 686 687 if ((acpi_set_irq_resource(acpipsmlnkp, irq)) == ACPI_PSM_SUCCESS) { 688 /* 689 * setting irq was successful, check to make sure CRS 690 * reflects that. If CRS does not agree with what we 691 * set, return the irq that was set. 692 */ 693 694 if (acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq, 695 dipintr_flagp) == ACPI_PSM_SUCCESS) { 696 697 if (cur_irq != irq) 698 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: " 699 "IRQ resource set (irqno %d) for device %s " 700 "instance #%d, differs from current " 701 "setting irqno %d", 702 irq, ddi_get_name(dip), 703 ddi_get_instance(dip), cur_irq)); 704 } 705 /* 706 * return the irq that was set, and not what CRS reports, 707 * since CRS has been seen to be bogus on some systems 708 */ 709 cur_irq = irq; 710 } else { 711 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: set resource irq %d " 712 "failed for device %s instance #%d", 713 irq, ddi_get_name(dip), ddi_get_instance(dip))); 714 if (cur_irq == -1) 715 return (ACPI_PSM_FAILURE); 716 } 717 718 ASSERT(pci_irqp != NULL); 719 *pci_irqp = cur_irq; 720 return (ACPI_PSM_SUCCESS); 721 } 722 723 724 /*ARGSUSED*/ 725 static int 726 uppc_translate_irq(dev_info_t *dip, int irqno) 727 { 728 char dev_type[16]; 729 int dev_len, pci_irq, devid, busid; 730 ddi_acc_handle_t cfg_handle; 731 uchar_t ipin, iline; 732 iflag_t intr_flag; 733 734 if (dip == NULL) { 735 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: irqno = %d" 736 " dip = NULL\n", irqno)); 737 return (irqno); 738 } 739 740 if (!uppc_enable_acpi) { 741 return (irqno); 742 } 743 744 dev_len = sizeof (dev_type); 745 if (ddi_getlongprop_buf(DDI_DEV_T_ANY, ddi_get_parent(dip), 746 DDI_PROP_DONTPASS, "device_type", (caddr_t)dev_type, 747 &dev_len) != DDI_PROP_SUCCESS) { 748 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: irqno %d" 749 "device %s instance %d no device_type\n", irqno, 750 ddi_get_name(dip), ddi_get_instance(dip))); 751 return (irqno); 752 } 753 754 if ((strcmp(dev_type, "pci") == 0) || 755 (strcmp(dev_type, "pciex") == 0)) { 756 757 /* pci device */ 758 if (acpica_get_bdf(dip, &busid, &devid, NULL) != 0) 759 return (irqno); 760 761 if (pci_config_setup(dip, &cfg_handle) != DDI_SUCCESS) 762 return (irqno); 763 764 ipin = pci_config_get8(cfg_handle, PCI_CONF_IPIN) - PCI_INTA; 765 iline = pci_config_get8(cfg_handle, PCI_CONF_ILINE); 766 if (uppc_acpi_translate_pci_irq(dip, busid, devid, 767 ipin, &pci_irq, &intr_flag) == ACPI_PSM_SUCCESS) { 768 769 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: [ACPI] new irq " 770 "%d old irq %d device %s, instance %d\n", pci_irq, 771 irqno, ddi_get_name(dip), ddi_get_instance(dip))); 772 773 /* 774 * Make sure pci_irq is within range. 775 * Otherwise, fall through and return irqno. 776 */ 777 if (pci_irq <= MAX_ISA_IRQ) { 778 if (iline != pci_irq) { 779 /* 780 * Update the device's ILINE byte, 781 * in case uppc_acpi_translate_pci_irq 782 * has choosen a different pci_irq 783 * than the BIOS has configured. 784 * Some chipsets use the value in 785 * ILINE to control interrupt routing, 786 * in conflict with the PCI spec. 787 */ 788 pci_config_put8(cfg_handle, 789 PCI_CONF_ILINE, pci_irq); 790 } 791 pci_config_teardown(&cfg_handle); 792 return (pci_irq); 793 } 794 } 795 pci_config_teardown(&cfg_handle); 796 797 /* FALLTHRU to common case - returning irqno */ 798 } else { 799 /* non-PCI; assumes ISA-style edge-triggered */ 800 psm_set_elcr(irqno, 0); /* set IRQ to ISA mode */ 801 802 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: non-pci," 803 "irqno %d device %s instance %d\n", irqno, 804 ddi_get_name(dip), ddi_get_instance(dip))); 805 806 } 807 808 return (irqno); 809 } 810 811 /* 812 * uppc_intr_enter() raises the ipl to the level of the current interrupt, 813 * and sends EOI to the pics. 814 * If interrupt is 7 or 15 and not spurious interrupt, send specific EOI 815 * else send non-specific EOI 816 * uppc_intr_enter() returns the new priority level, 817 * or -1 for spurious interrupt 818 */ 819 static int 820 uppc_intr_enter(int ipl, int *vector) 821 { 822 int newipl; 823 int intno; 824 825 intno = (*vector); 826 827 ASSERT(intno < 256); 828 829 newipl = autovect[intno].avh_hi_pri; 830 831 /* 832 * During wait_till_seen() periods when interrupt vector is being 833 * removed in remove_av(), the removed hardware interrupt could 834 * trigger and got here with newipl 0. It has to send EOI 835 * as usual but no need to call setspl and returns -1 like spurious. 836 */ 837 if ((intno & 7) != 7) { 838 if (newipl) 839 uppc_setspl(newipl); 840 outb(MCMD_PORT, PIC_NSEOI); 841 if (intno >= 8) { 842 outb(SCMD_PORT, PIC_NSEOI); 843 } 844 } else { /* int was 7 or 15 */ 845 if (newipl && newipl <= ipl) { /* Check for spurious int */ 846 if (intno != 7) 847 outb(MCMD_PORT, PIC_NSEOI); 848 return (-1); /* Spurious int */ 849 } else { 850 if (newipl) 851 uppc_setspl(newipl); 852 if (intno != 7) { 853 outb(MCMD_PORT, PIC_NSEOI); 854 outb(SCMD_PORT, PIC_SEOI_LVL7); 855 } else { 856 outb(MCMD_PORT, PIC_SEOI_LVL7); 857 } 858 } 859 } 860 861 if (newipl) 862 return (newipl); 863 else 864 return (-1); /* not real spurious int */ 865 } 866 867 /* 868 * uppc_intr_exit() restores the old interrupt 869 * priority level after processing an interrupt. 870 * It is called with interrupts disabled, and does not enable interrupts. 871 */ 872 /* ARGSUSED */ 873 static void 874 uppc_intr_exit(int ipl, int vector) 875 { 876 uppc_setspl(ipl); 877 } 878 879 /* 880 * uppc_setspl() loads new interrupt masks into the pics 881 * based on input ipl. 882 */ 883 /* ARGSUSED */ 884 static void 885 uppc_setspl(int ipl) 886 { 887 struct standard_pic *pp; 888 uint8_t smask, mmask; 889 uint8_t cursmask, curmmask; 890 891 pp = &pics0; 892 smask = pp->c_iplmask[ipl * 2]; 893 mmask = pp->c_iplmask[ipl * 2 + 1]; 894 cursmask = pp->c_curmask[0]; 895 curmmask = pp->c_curmask[1]; 896 if (cursmask == smask && curmmask == mmask) 897 return; 898 pp->c_curmask[0] = smask; 899 pp->c_curmask[1] = mmask; 900 901 if (cursmask != smask) { 902 /* 903 * program new slave pic mask 904 */ 905 outb(SIMR_PORT, smask); 906 } 907 if (curmmask != mmask) { 908 /* 909 * program new master pic mask 910 */ 911 outb(MIMR_PORT, mmask); 912 } 913 /* 914 * read master to allow pics to settle 915 */ 916 (void) inb(MIMR_PORT); 917 } 918 919 /* 920 * uppc_gethrtime() returns high resolution timer value 921 */ 922 static hrtime_t 923 uppc_gethrtime() 924 { 925 hrtime_t timeval, temp; 926 unsigned int oflags, ctr0; 927 928 oflags = intr_clear(); /* disable ints */ 929 lock_set(&uppc_gethrtime_lock); 930 retry: 931 temp = hrtime_base; 932 outb(PITCTL_PORT, 0); /* latch counter 0 */ 933 /* 934 * read counter 0 935 */ 936 ctr0 = inb(PITCTR0_PORT); 937 ctr0 |= inb(PITCTR0_PORT) << 8; 938 timeval = (hrtime_t)ctr0 * (NANOSEC / PIT_HZ); 939 if (temp != hrtime_base) 940 goto retry; 941 timeval -= temp; 942 if (timeval < uppc_lasthrtime) 943 timeval = uppc_lasthrtime; 944 uppc_lasthrtime = timeval; 945 lock_clear(&uppc_gethrtime_lock); 946 intr_restore(oflags); 947 return (timeval); 948 } 949