xref: /illumos-gate/usr/src/uts/i86pc/cpu/amd_opteron/ao_main.c (revision 2654012f83cec5dc15b61dfe3e4a4915f186e7a6)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 /*
30  * The CPU module for the AMD Athlon64 and Opteron processors
31  */
32 
33 #include <sys/types.h>
34 #include <sys/cmn_err.h>
35 #include <sys/sunddi.h>
36 #include <sys/cpu_module.h>
37 #include <sys/cpu_module_ms_impl.h>
38 #include <sys/cpuvar.h>
39 #include <sys/x86_archext.h>
40 #include <sys/kmem.h>
41 #include <sys/pghw.h>
42 #include <sys/modctl.h>
43 #include <sys/mc.h>
44 #include <sys/mca_x86.h>
45 
46 #include "ao.h"
47 
48 int ao_ms_support_disable = 0;
49 
50 static struct ao_chipshared *ao_shared[AO_MAX_CHIPS];
51 
52 /*
53  * This cpu module supports AMD family 0xf revisions B/C/D/E/F/G.  If
54  * a family 0xf cpu beyond the rev G model limit is detected then
55  * return ENOTSUP and let the generic x86 CPU module load instead.
56  */
57 uint_t ao_model_limit = 0x6f;
58 
59 int
60 ao_ms_init(cmi_hdl_t hdl, void **datap)
61 {
62 	uint_t chipid = cmi_hdl_chipid(hdl);
63 	struct ao_chipshared *sp, *osp;
64 	ao_ms_data_t *ao;
65 	uint64_t cap;
66 
67 	if (ao_ms_support_disable || cmi_hdl_model(hdl) >= ao_model_limit)
68 		return (ENOTSUP);
69 
70 	if (!(x86_feature & X86_MCA))
71 		return (ENOTSUP);
72 
73 	if (cmi_hdl_rdmsr(hdl, IA32_MSR_MCG_CAP, &cap) != CMI_SUCCESS)
74 		return (ENOTSUP);
75 
76 	if (!(cap & MCG_CAP_CTL_P))
77 		return (ENOTSUP);
78 
79 	if ((cap & MCG_CAP_COUNT_MASK) != AMD_MCA_BANK_COUNT) {
80 		cmn_err(CE_WARN, "Chip %d core %d has %llu MCA banks, "
81 		    "expected %u: disabling AMD-specific MCA support on "
82 		    "this CPU", chipid, cmi_hdl_coreid(hdl),
83 		    (u_longlong_t)cap & MCG_CAP_COUNT_MASK,
84 		    AMD_MCA_BANK_COUNT);
85 		return (ENOTSUP);
86 	}
87 
88 	ao = *datap = kmem_zalloc(sizeof (ao_ms_data_t), KM_SLEEP);
89 	cmi_hdl_hold(hdl);	/* release in fini */
90 	ao->ao_ms_hdl = hdl;
91 
92 	/*
93 	 * Allocate the chipshared structure if it appears not to have been
94 	 * allocated already (by a sibling core).  Install the newly
95 	 * allocated pointer atomically in case a sibling core beats
96 	 * us to it.
97 	 */
98 	if ((sp = ao_shared[chipid]) == NULL) {
99 		sp = kmem_zalloc(sizeof (struct ao_chipshared), KM_SLEEP);
100 		sp->aos_chiprev = cmi_hdl_chiprev(hdl);
101 		membar_producer();
102 
103 		osp = atomic_cas_ptr(&ao_shared[chipid], NULL, sp);
104 		if (osp != NULL) {
105 			kmem_free(sp, sizeof (struct ao_chipshared));
106 			sp = osp;
107 		}
108 	}
109 	ao->ao_ms_shared = sp;
110 
111 	return (0);
112 }
113 
114 /*ARGSUSED*/
115 void
116 ao_ms_post_mpstartup(cmi_hdl_t hdl)
117 {
118 	(void) ddi_install_driver("mc-amd");
119 }
120 
121 cms_api_ver_t _cms_api_version = CMS_API_VERSION_0;
122 
123 const cms_ops_t _cms_ops = {
124 	ao_ms_init,			/* cms_init */
125 	ao_ms_post_startup,		/* cms_post_startup */
126 	ao_ms_post_mpstartup,		/* cms_post_mpstartup */
127 	NULL,				/* cms_logout_size */
128 	ao_ms_mcgctl_val,		/* cms_mcgctl_val */
129 	ao_ms_bankctl_skipinit,		/* cms_bankctl_skipinit */
130 	ao_ms_bankctl_val,		/* cms_bankctl_val */
131 	NULL,				/* cms_bankstatus_skipinit */
132 	NULL,				/* cms_bankstatus_val */
133 	ao_ms_mca_init,			/* cms_mca_init */
134 	ao_ms_poll_ownermask,		/* cms_poll_ownermask */
135 	NULL,				/* cms_bank_logout */
136 	ao_ms_error_action,		/* cms_error_action */
137 	ao_ms_disp_match,		/* cms_disp_match */
138 	ao_ms_ereport_class,		/* cms_ereport_class */
139 	NULL,				/* cms_ereport_detector */
140 	ao_ms_ereport_includestack,	/* cms_ereport_includestack */
141 	ao_ms_ereport_add_logout,	/* cms_ereport_add_logout */
142 	ao_ms_msrinject,		/* cms_msrinject */
143 	NULL,				/* cms_fini */
144 };
145 
146 static struct modlcpu modlcpu = {
147 	&mod_cpuops,
148 	"AMD Athlon64/Opteron Model-Specific Support"
149 };
150 
151 static struct modlinkage modlinkage = {
152 	MODREV_1,
153 	(void *)&modlcpu,
154 	NULL
155 };
156 
157 int
158 _init(void)
159 {
160 	return (mod_install(&modlinkage));
161 }
162 
163 int
164 _info(struct modinfo *modinfop)
165 {
166 	return (mod_info(&modlinkage, modinfop));
167 }
168 
169 int
170 _fini(void)
171 {
172 	return (mod_remove(&modlinkage));
173 }
174