xref: /illumos-gate/usr/src/uts/common/sys/usb/clients/usbser/usbftdi/uftdi_reg.h (revision 4634c44f9aff3ceaf027e46cee4258d7ab23b40f)
1de81e71eSTim Marsland /*
2de81e71eSTim Marsland  * CDDL HEADER START
3de81e71eSTim Marsland  *
4de81e71eSTim Marsland  * The contents of this file are subject to the terms of the
5de81e71eSTim Marsland  * Common Development and Distribution License (the "License").
6de81e71eSTim Marsland  * You may not use this file except in compliance with the License.
7de81e71eSTim Marsland  *
8de81e71eSTim Marsland  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9de81e71eSTim Marsland  * or http://www.opensolaris.org/os/licensing.
10de81e71eSTim Marsland  * See the License for the specific language governing permissions
11de81e71eSTim Marsland  * and limitations under the License.
12de81e71eSTim Marsland  *
13de81e71eSTim Marsland  * When distributing Covered Code, include this CDDL HEADER in each
14de81e71eSTim Marsland  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15de81e71eSTim Marsland  * If applicable, add the following below this CDDL HEADER, with the
16de81e71eSTim Marsland  * fields enclosed by brackets "[]" replaced with your own identifying
17de81e71eSTim Marsland  * information: Portions Copyright [yyyy] [name of copyright owner]
18de81e71eSTim Marsland  *
19de81e71eSTim Marsland  * CDDL HEADER END
20de81e71eSTim Marsland  */
21de81e71eSTim Marsland 
22de81e71eSTim Marsland /*
23de81e71eSTim Marsland  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24de81e71eSTim Marsland  * Use is subject to license terms.
25de81e71eSTim Marsland  */
26de81e71eSTim Marsland 
27de81e71eSTim Marsland #ifndef	_USBSER_USBFTDI_UFTDI_REG_H
28de81e71eSTim Marsland #define	_USBSER_USBFTDI_UFTDI_REG_H
29de81e71eSTim Marsland 
30de81e71eSTim Marsland /*
31de81e71eSTim Marsland  * $NetBSD: uftdireg.h,v 1.6 2002/07/11 21:14:28 augustss Exp $
32de81e71eSTim Marsland  * $FreeBSD: src/sys/dev/usb/uftdireg.h,v 1.2 2004/07/01 17:16:20 brooks Exp $
33de81e71eSTim Marsland  */
34de81e71eSTim Marsland 
35de81e71eSTim Marsland /*
36de81e71eSTim Marsland  * Definitions for the FTDI USB Single Port Serial Converter -
37de81e71eSTim Marsland  * known as FTDI_SIO (Serial Input/Output application of the chipset)
38de81e71eSTim Marsland  *
39de81e71eSTim Marsland  * Thanx to FTDI (http://www.ftdi.co.uk) for so kindly providing details
40de81e71eSTim Marsland  * of the protocol required to talk to the device and ongoing assistence
41de81e71eSTim Marsland  * during development.
42de81e71eSTim Marsland  *
43de81e71eSTim Marsland  * Bill Ryder - bryder@sgi.com of Silicon Graphics, Inc. is the original
44de81e71eSTim Marsland  * author of this file.
45de81e71eSTim Marsland  */
46de81e71eSTim Marsland /* Modified by Lennart Augustsson */
47de81e71eSTim Marsland 
48de81e71eSTim Marsland #ifdef	__cplusplus
49de81e71eSTim Marsland extern "C" {
50de81e71eSTim Marsland #endif
51de81e71eSTim Marsland 
52de81e71eSTim Marsland /* Vendor Request Interface */
53de81e71eSTim Marsland #define	FTDI_SIO_RESET 		0 /* Reset the port */
54de81e71eSTim Marsland #define	FTDI_SIO_MODEM_CTRL 	1 /* Set the modem control register */
55de81e71eSTim Marsland #define	FTDI_SIO_SET_FLOW_CTRL	2 /* Set flow control register */
56de81e71eSTim Marsland #define	FTDI_SIO_SET_BAUD_RATE	3 /* Set baud rate */
57de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA	4 /* Set the data characteristics of the port */
58de81e71eSTim Marsland #define	FTDI_SIO_GET_STATUS	5 /* Retrieve current value of status reg */
59de81e71eSTim Marsland #define	FTDI_SIO_SET_EVENT_CHAR	6 /* Set the event character */
60de81e71eSTim Marsland #define	FTDI_SIO_SET_ERROR_CHAR	7 /* Set the error character */
61de81e71eSTim Marsland 
62de81e71eSTim Marsland /* Port Identifier Table */
63de81e71eSTim Marsland #define	FTDI_PIT_DEFAULT 	0 /* SIOA */
64de81e71eSTim Marsland #define	FTDI_PIT_SIOA		1 /* SIOA */
65de81e71eSTim Marsland #define	FTDI_PIT_SIOB		2 /* SIOB */
66de81e71eSTim Marsland #define	FTDI_PIT_PARALLEL	3 /* Parallel */
67de81e71eSTim Marsland 
68de81e71eSTim Marsland enum uftdi_type {
69de81e71eSTim Marsland 	UFTDI_TYPE_SIO,
70de81e71eSTim Marsland 	UFTDI_TYPE_8U232AM
71de81e71eSTim Marsland };
72de81e71eSTim Marsland 
73de81e71eSTim Marsland /*
74de81e71eSTim Marsland  * BmRequestType:  0100 0000B
75de81e71eSTim Marsland  * bRequest:       FTDI_SIO_RESET
76de81e71eSTim Marsland  * wValue:         Control Value
77de81e71eSTim Marsland  *                   0 = Reset SIO
78de81e71eSTim Marsland  *                   1 = Purge RX buffer
79de81e71eSTim Marsland  *                   2 = Purge TX buffer
80de81e71eSTim Marsland  * wIndex:         Port
81de81e71eSTim Marsland  * wLength:        0
82de81e71eSTim Marsland  * Data:           None
83de81e71eSTim Marsland  *
84de81e71eSTim Marsland  * The Reset SIO command has this effect:
85de81e71eSTim Marsland  *
86de81e71eSTim Marsland  *    Sets flow control set to 'none'
87de81e71eSTim Marsland  *    Event char = 0x0d
88de81e71eSTim Marsland  *    Event trigger = disabled
89de81e71eSTim Marsland  *    Purge RX buffer
90de81e71eSTim Marsland  *    Purge TX buffer
91de81e71eSTim Marsland  *    Clear DTR
92de81e71eSTim Marsland  *    Clear RTS
93de81e71eSTim Marsland  *    baud and data format not reset
94de81e71eSTim Marsland  *
95de81e71eSTim Marsland  * The Purge RX and TX buffer commands affect nothing except the buffers
96de81e71eSTim Marsland  *
97de81e71eSTim Marsland  */
98de81e71eSTim Marsland /* FTDI_SIO_RESET */
99de81e71eSTim Marsland #define	FTDI_SIO_RESET_SIO 0
100de81e71eSTim Marsland #define	FTDI_SIO_RESET_PURGE_RX 1
101de81e71eSTim Marsland #define	FTDI_SIO_RESET_PURGE_TX 2
102de81e71eSTim Marsland 
103de81e71eSTim Marsland 
104de81e71eSTim Marsland /*
105de81e71eSTim Marsland  * BmRequestType:  0100 0000B
106de81e71eSTim Marsland  * bRequest:       FTDI_SIO_SET_BAUDRATE
107de81e71eSTim Marsland  * wValue:         BaudRate value - see below
108de81e71eSTim Marsland  * wIndex:         Port
109de81e71eSTim Marsland  * wLength:        0
110de81e71eSTim Marsland  * Data:           None
111de81e71eSTim Marsland  */
112de81e71eSTim Marsland /* FTDI_SIO_SET_BAUDRATE */
113de81e71eSTim Marsland enum {
114de81e71eSTim Marsland 	ftdi_sio_b300 = 0,
115de81e71eSTim Marsland 	ftdi_sio_b600 = 1,
116de81e71eSTim Marsland 	ftdi_sio_b1200 = 2,
117de81e71eSTim Marsland 	ftdi_sio_b2400 = 3,
118de81e71eSTim Marsland 	ftdi_sio_b4800 = 4,
119de81e71eSTim Marsland 	ftdi_sio_b9600 = 5,
120de81e71eSTim Marsland 	ftdi_sio_b19200 = 6,
121de81e71eSTim Marsland 	ftdi_sio_b38400 = 7,
122de81e71eSTim Marsland 	ftdi_sio_b57600 = 8,
123de81e71eSTim Marsland 	ftdi_sio_b115200 = 9
124de81e71eSTim Marsland };
125de81e71eSTim Marsland 
126de81e71eSTim Marsland enum {
127de81e71eSTim Marsland 	ftdi_8u232am_b300 = 0x2710,
128de81e71eSTim Marsland 	ftdi_8u232am_b600 = 0x1388,
129de81e71eSTim Marsland 	ftdi_8u232am_b1200 = 0x09c4,
130de81e71eSTim Marsland 	ftdi_8u232am_b2400 = 0x04e2,
131de81e71eSTim Marsland 	ftdi_8u232am_b4800 = 0x0271,
132de81e71eSTim Marsland 	ftdi_8u232am_b9600 = 0x4138,
133de81e71eSTim Marsland 	ftdi_8u232am_b19200 = 0x809c,
134de81e71eSTim Marsland 	ftdi_8u232am_b38400 = 0xc04e,
135de81e71eSTim Marsland 	ftdi_8u232am_b57600 = 0x0034,
136de81e71eSTim Marsland 	ftdi_8u232am_b115200 = 0x001a,
137de81e71eSTim Marsland 	ftdi_8u232am_b230400 = 0x000d,
138de81e71eSTim Marsland 	ftdi_8u232am_b460800 = 0x4006,
139de81e71eSTim Marsland 	ftdi_8u232am_b921600 = 0x8003,
140de81e71eSTim Marsland 	ftdi_8u232am_b2000000 = 0x0001,	/* special case for 2M baud */
141de81e71eSTim Marsland 	ftdi_8u232am_b3000000 = 0x0000,	/* special case for 3M baud */
142de81e71eSTim Marsland };
143de81e71eSTim Marsland 
144de81e71eSTim Marsland /*
145de81e71eSTim Marsland  * BmRequestType:  0100 0000B
146de81e71eSTim Marsland  * bRequest:       FTDI_SIO_SET_DATA
147de81e71eSTim Marsland  * wValue:         Data characteristics (see below)
148de81e71eSTim Marsland  * wIndex:         Port
149de81e71eSTim Marsland  * wLength:        0
150de81e71eSTim Marsland  * Data:           No
151de81e71eSTim Marsland  *
152de81e71eSTim Marsland  * Data characteristics
153de81e71eSTim Marsland  *
154de81e71eSTim Marsland  *   B0..7   Number of data bits
155de81e71eSTim Marsland  *   B8..10  Parity
156de81e71eSTim Marsland  *           0 = None
157de81e71eSTim Marsland  *           1 = Odd
158de81e71eSTim Marsland  *           2 = Even
159de81e71eSTim Marsland  *           3 = Mark
160de81e71eSTim Marsland  *           4 = Space
161de81e71eSTim Marsland  *   B11..13 Stop Bits
162de81e71eSTim Marsland  *           0 = 1
163de81e71eSTim Marsland  *           1 = 1.5
164de81e71eSTim Marsland  *           2 = 2
165de81e71eSTim Marsland  *   B14..15 Reserved
166de81e71eSTim Marsland  *
167de81e71eSTim Marsland  */
168de81e71eSTim Marsland /* FTDI_SIO_SET_DATA */
169de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_BITS(n) (n)
170de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_BITS_MASK	0xff
171de81e71eSTim Marsland 
172de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_PARITY_SHIFT		8
173de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_PARITY_MASK		0x7
174de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_PARITY_NONE (0x0 << 8)
175de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_PARITY_ODD (0x1 << 8)
176de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_PARITY_EVEN (0x2 << 8)
177de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_PARITY_MARK (0x3 << 8)
178de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_PARITY_SPACE (0x4 << 8)
179de81e71eSTim Marsland 
180de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_STOP_BITS_SHIFT	11
181de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_STOP_BITS_MASK	0x3
182de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_STOP_BITS_1 (0x0 << 11)
183de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_STOP_BITS_15 (0x1 << 11)
184de81e71eSTim Marsland #define	FTDI_SIO_SET_DATA_STOP_BITS_2 (0x2 << 11)
185de81e71eSTim Marsland 
186de81e71eSTim Marsland #define	FTDI_SIO_SET_BREAK (0x1 << 14)
187de81e71eSTim Marsland 
188de81e71eSTim Marsland 
189de81e71eSTim Marsland /*
190de81e71eSTim Marsland  * BmRequestType:   0100 0000B
191de81e71eSTim Marsland  * bRequest:        FTDI_SIO_MODEM_CTRL
192de81e71eSTim Marsland  * wValue:          ControlValue (see below)
193de81e71eSTim Marsland  * wIndex:          Port
194de81e71eSTim Marsland  * wLength:         0
195de81e71eSTim Marsland  * Data:            None
196de81e71eSTim Marsland  *
197de81e71eSTim Marsland  * NOTE: If the device is in RTS/CTS flow control, the RTS set by this
198de81e71eSTim Marsland  * command will be IGNORED without an error being returned
199de81e71eSTim Marsland  * Also - you can not set DTR and RTS with one control message
200de81e71eSTim Marsland  *
201de81e71eSTim Marsland  * ControlValue
202de81e71eSTim Marsland  * B0    DTR state
203de81e71eSTim Marsland  *          0 = reset
204de81e71eSTim Marsland  *          1 = set
205de81e71eSTim Marsland  * B1    RTS state
206de81e71eSTim Marsland  *          0 = reset
207de81e71eSTim Marsland  *          1 = set
208de81e71eSTim Marsland  * B2..7 Reserved
209de81e71eSTim Marsland  * B8    DTR state enable
210de81e71eSTim Marsland  *          0 = ignore
211de81e71eSTim Marsland  *          1 = use DTR state
212de81e71eSTim Marsland  * B9    RTS state enable
213de81e71eSTim Marsland  *          0 = ignore
214de81e71eSTim Marsland  *          1 = use RTS state
215de81e71eSTim Marsland  * B10..15 Reserved
216de81e71eSTim Marsland  */
217de81e71eSTim Marsland /* FTDI_SIO_MODEM_CTRL */
218de81e71eSTim Marsland #define	FTDI_SIO_SET_DTR_MASK	0x1
219de81e71eSTim Marsland #define	FTDI_SIO_SET_DTR_HIGH	(1 | (FTDI_SIO_SET_DTR_MASK  << 8))
220de81e71eSTim Marsland #define	FTDI_SIO_SET_DTR_LOW 	(0 | (FTDI_SIO_SET_DTR_MASK  << 8))
221de81e71eSTim Marsland #define	FTDI_SIO_SET_RTS_MASK	0x2
222de81e71eSTim Marsland #define	FTDI_SIO_SET_RTS_HIGH	(2 | (FTDI_SIO_SET_RTS_MASK << 8))
223de81e71eSTim Marsland #define	FTDI_SIO_SET_RTS_LOW	(0 | (FTDI_SIO_SET_RTS_MASK << 8))
224de81e71eSTim Marsland 
225de81e71eSTim Marsland 
226de81e71eSTim Marsland /*
227de81e71eSTim Marsland  *   BmRequestType:  0100 0000b
228de81e71eSTim Marsland  *   bRequest:       FTDI_SIO_SET_FLOW_CTRL
229de81e71eSTim Marsland  *   wValue:         Xoff/Xon
230de81e71eSTim Marsland  *   wIndex:         Protocol/Port - hIndex is protocl / lIndex is port
231de81e71eSTim Marsland  *   wLength:        0
232de81e71eSTim Marsland  *   Data:           None
233de81e71eSTim Marsland  *
234de81e71eSTim Marsland  * hIndex protocol is:
235de81e71eSTim Marsland  *   B0 Output handshaking using RTS/CTS
236de81e71eSTim Marsland  *       0 = disabled
237de81e71eSTim Marsland  *       1 = enabled
238de81e71eSTim Marsland  *   B1 Output handshaking using DTR/DSR
239de81e71eSTim Marsland  *       0 = disabled
240de81e71eSTim Marsland  *       1 = enabled
241de81e71eSTim Marsland  *   B2 Xon/Xoff handshaking
242de81e71eSTim Marsland  *       0 = disabled
243de81e71eSTim Marsland  *       1 = enabled
244de81e71eSTim Marsland  *
245de81e71eSTim Marsland  * A value of zero in the hIndex field disables handshaking
246de81e71eSTim Marsland  *
247de81e71eSTim Marsland  * If Xon/Xoff handshaking is specified, the hValue field should contain the
248de81e71eSTim Marsland  * XOFF character and the lValue field contains the XON character.
249de81e71eSTim Marsland  */
250de81e71eSTim Marsland /* FTDI_SIO_SET_FLOW_CTRL */
251de81e71eSTim Marsland #define	FTDI_SIO_DISABLE_FLOW_CTRL 0x0
252de81e71eSTim Marsland #define	FTDI_SIO_RTS_CTS_HS 0x1
253de81e71eSTim Marsland #define	FTDI_SIO_DTR_DSR_HS 0x2
254de81e71eSTim Marsland #define	FTDI_SIO_XON_XOFF_HS 0x4
255de81e71eSTim Marsland 
256de81e71eSTim Marsland 
257de81e71eSTim Marsland /*
258de81e71eSTim Marsland  *  BmRequestType:   0100 0000b
259de81e71eSTim Marsland  *  bRequest:        FTDI_SIO_SET_EVENT_CHAR
260de81e71eSTim Marsland  *  wValue:          Event Char
261de81e71eSTim Marsland  *  wIndex:          Port
262de81e71eSTim Marsland  *  wLength:         0
263de81e71eSTim Marsland  *  Data:            None
264de81e71eSTim Marsland  *
265de81e71eSTim Marsland  * wValue:
266de81e71eSTim Marsland  *   B0..7   Event Character
267de81e71eSTim Marsland  *   B8      Event Character Processing
268de81e71eSTim Marsland  *             0 = disabled
269de81e71eSTim Marsland  *             1 = enabled
270de81e71eSTim Marsland  *   B9..15  Reserved
271de81e71eSTim Marsland  *
272de81e71eSTim Marsland  * FTDI_SIO_SET_EVENT_CHAR
273de81e71eSTim Marsland  *
274de81e71eSTim Marsland  * Set the special event character for the specified communications port.
275de81e71eSTim Marsland  * If the device sees this character it will immediately return the
276de81e71eSTim Marsland  * data read so far - rather than wait 40ms or until 62 bytes are read
277de81e71eSTim Marsland  * which is what normally happens.
278de81e71eSTim Marsland  */
279de81e71eSTim Marsland 
280de81e71eSTim Marsland 
281de81e71eSTim Marsland 
282de81e71eSTim Marsland /*
283de81e71eSTim Marsland  *  BmRequestType:  0100 0000b
284de81e71eSTim Marsland  *  bRequest:       FTDI_SIO_SET_ERROR_CHAR
285de81e71eSTim Marsland  *  wValue:         Error Char
286de81e71eSTim Marsland  *  wIndex:         Port
287de81e71eSTim Marsland  *  wLength:        0
288de81e71eSTim Marsland  *  Data:           None
289de81e71eSTim Marsland  *
290de81e71eSTim Marsland  *  Error Char
291de81e71eSTim Marsland  *  B0..7  Error Character
292de81e71eSTim Marsland  *  B8     Error Character Processing
293de81e71eSTim Marsland  *           0 = disabled
294de81e71eSTim Marsland  *           1 = enabled
295de81e71eSTim Marsland  *  B9..15 Reserved
296de81e71eSTim Marsland  *
297de81e71eSTim Marsland  *
298de81e71eSTim Marsland  * FTDI_SIO_SET_ERROR_CHAR
299de81e71eSTim Marsland  * Set the parity error replacement character for the specified communications
300de81e71eSTim Marsland  * port.
301de81e71eSTim Marsland  */
302de81e71eSTim Marsland 
303de81e71eSTim Marsland 
304de81e71eSTim Marsland /*
305de81e71eSTim Marsland  *   BmRequestType:   1100 0000b
306de81e71eSTim Marsland  *   bRequest:        FTDI_SIO_GET_MODEM_STATUS
307de81e71eSTim Marsland  *   wValue:          zero
308de81e71eSTim Marsland  *   wIndex:          Port
309de81e71eSTim Marsland  *   wLength:         1
310de81e71eSTim Marsland  *   Data:            Status
311de81e71eSTim Marsland  *
312de81e71eSTim Marsland  * One byte of data is returned
313de81e71eSTim Marsland  * B0..3 0
314de81e71eSTim Marsland  * B4    CTS
315de81e71eSTim Marsland  *         0 = inactive
316de81e71eSTim Marsland  *         1 = active
317de81e71eSTim Marsland  * B5    DSR
318de81e71eSTim Marsland  *         0 = inactive
319de81e71eSTim Marsland  *         1 = active
320de81e71eSTim Marsland  * B6    Ring Indicator (RI)
321de81e71eSTim Marsland  *         0 = inactive
322de81e71eSTim Marsland  *         1 = active
323de81e71eSTim Marsland  * B7    Receive Line Signal Detect (RLSD)
324de81e71eSTim Marsland  *         0 = inactive
325de81e71eSTim Marsland  *         1 = active
326de81e71eSTim Marsland  *
327de81e71eSTim Marsland  * FTDI_SIO_GET_MODEM_STATUS
328de81e71eSTim Marsland  * Retrieve the current value of the modem status register.
329de81e71eSTim Marsland  */
330de81e71eSTim Marsland #define	FTDI_SIO_CTS_MASK 0x10
331de81e71eSTim Marsland #define	FTDI_SIO_DSR_MASK 0x20
332de81e71eSTim Marsland #define	FTDI_SIO_RI_MASK  0x40
333de81e71eSTim Marsland #define	FTDI_SIO_RLSD_MASK 0x80
334de81e71eSTim Marsland 
335de81e71eSTim Marsland 
336de81e71eSTim Marsland 
337de81e71eSTim Marsland /*
338de81e71eSTim Marsland  *
339de81e71eSTim Marsland  * DATA FORMAT
340de81e71eSTim Marsland  *
341de81e71eSTim Marsland  * IN Endpoint
342de81e71eSTim Marsland  *
343de81e71eSTim Marsland  * The device reserves the first two bytes of data on this endpoint to contain
344de81e71eSTim Marsland  * the current values of the modem and line status registers. In the absence of
345de81e71eSTim Marsland  * data, the device generates a message consisting of these two status bytes
346de81e71eSTim Marsland  * every 40 ms.
347de81e71eSTim Marsland  *
348de81e71eSTim Marsland  * Byte 0: Modem Status
349de81e71eSTim Marsland  *   NOTE: 4 upper bits have same layout as the MSR register in a 16550
350de81e71eSTim Marsland  *
351de81e71eSTim Marsland  * Offset	Description
352de81e71eSTim Marsland  * B0..3	Port
353de81e71eSTim Marsland  * B4		Clear to Send (CTS)
354de81e71eSTim Marsland  * B5		Data Set Ready (DSR)
355de81e71eSTim Marsland  * B6		Ring Indicator (RI)
356de81e71eSTim Marsland  * B7		Receive Line Signal Detect (RLSD)
357de81e71eSTim Marsland  *
358de81e71eSTim Marsland  * Byte 1: Line Status
359de81e71eSTim Marsland  *   NOTE: same layout as the LSR register in a 16550
360de81e71eSTim Marsland  *
361de81e71eSTim Marsland  * Offset	Description
362de81e71eSTim Marsland  * B0	Data Ready (DR)
363de81e71eSTim Marsland  * B1	Overrun Error (OE)
364de81e71eSTim Marsland  * B2	Parity Error (PE)
365de81e71eSTim Marsland  * B3	Framing Error (FE)
366de81e71eSTim Marsland  * B4	Break Interrupt (BI)
367de81e71eSTim Marsland  * B5	Transmitter Holding Register (THRE)
368de81e71eSTim Marsland  * B6	Transmitter Empty (TEMT)
369de81e71eSTim Marsland  * B7	Error in RCVR FIFO
370de81e71eSTim Marsland  *
371de81e71eSTim Marsland  *
372de81e71eSTim Marsland  * OUT Endpoint
373de81e71eSTim Marsland  *
374de81e71eSTim Marsland  * This device reserves the first bytes of data on this endpoint contain the
375de81e71eSTim Marsland  * length and port identifier of the message. For the FTDI USB Serial converter
376de81e71eSTim Marsland  * the port identifier is always 1.
377de81e71eSTim Marsland  *
378de81e71eSTim Marsland  * Byte 0: Port & length
379de81e71eSTim Marsland  *
380de81e71eSTim Marsland  * Offset	Description
381de81e71eSTim Marsland  * B0..1	Port
382de81e71eSTim Marsland  * B2..7	Length of message - (not including Byte 0)
383de81e71eSTim Marsland  *
384de81e71eSTim Marsland  */
385de81e71eSTim Marsland #define	FTDI_PORT_MASK 0x0f
386de81e71eSTim Marsland #define	FTDI_MSR_MASK 0xf0
387de81e71eSTim Marsland #define	FTDI_GET_MSR(p) (((p)[0]) & FTDI_MSR_MASK)
388de81e71eSTim Marsland #define	FTDI_GET_LSR(p) ((p)[1])
389*4634c44fSTim Marsland #define	FTDI_LSR_MASK		(~0x60)	/* interesting rx bits */
390de81e71eSTim Marsland 
391de81e71eSTim Marsland #define	FTDI_MSR_STATUS_CTS	0x10
392de81e71eSTim Marsland #define	FTDI_MSR_STATUS_DSR	0x20
393de81e71eSTim Marsland #define	FTDI_MSR_STATUS_RI	0x40
394de81e71eSTim Marsland #define	FTDI_MSR_STATUS_RLSD	0x80	/* aka Carrier Detect */
395de81e71eSTim Marsland 
396*4634c44fSTim Marsland #define	FTDI_LSR_STATUS_OE	0x02	/* overrun */
397*4634c44fSTim Marsland #define	FTDI_LSR_STATUS_PE	0x04	/* parity */
398*4634c44fSTim Marsland #define	FTDI_LSR_STATUS_FE	0x08	/* framing */
399*4634c44fSTim Marsland #define	FTDI_LSR_STATUS_BI	0x10	/* break */
400*4634c44fSTim Marsland #define	FTDI_LSR_STATUS_THRE	0x20	/* tx hold register is now empty */
401*4634c44fSTim Marsland #define	FTDI_LSR_STATUS_TEMT	0x40	/* tx shift register is now empty */
402*4634c44fSTim Marsland 
403de81e71eSTim Marsland #define	FTDI_OUT_TAG(len, port) (((len) << 2) | (port))
404de81e71eSTim Marsland 
405de81e71eSTim Marsland #ifdef	__cplusplus
406de81e71eSTim Marsland }
407de81e71eSTim Marsland #endif
408de81e71eSTim Marsland 
409de81e71eSTim Marsland #endif	/* _USBSER_USBFTDI_UFTDI_REG_H */
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