xref: /illumos-gate/usr/src/uts/common/sys/scsi/adapters/mpt_sas/mptsas_ioctl.h (revision 2acef22db7808606888f8f92715629ff3ba555b9)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 /*
27  * Copyright (c) 2013, Joyent, Inc. All rights reserved.
28  */
29 
30 /*
31  * Copyright (c) 2000 to 2010, LSI Corporation.
32  * All rights reserved.
33  *
34  * Redistribution and use in source and binary forms of all code within
35  * this file that is exclusively owned by LSI, with or without
36  * modification, is permitted provided that, in addition to the CDDL 1.0
37  * License requirements, the following conditions are met:
38  *
39  *    Neither the name of the author nor the names of its contributors may be
40  *    used to endorse or promote products derived from this software without
41  *    specific prior written permission.
42  *
43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
46  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
47  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
48  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
49  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
50  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
51  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
53  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
54  * DAMAGE.
55  */
56 
57 #ifndef _MPTSAS_IOCTL_H
58 #define	_MPTSAS_IOCTL_H
59 
60 #ifdef  __cplusplus
61 extern "C" {
62 #endif
63 
64 #include <sys/types.h>
65 
66 #define	MPTIOCTL			('I' << 8)
67 #define	MPTIOCTL_GET_ADAPTER_DATA	(MPTIOCTL | 1)
68 #define	MPTIOCTL_UPDATE_FLASH		(MPTIOCTL | 2)
69 #define	MPTIOCTL_RESET_ADAPTER		(MPTIOCTL | 3)
70 #define	MPTIOCTL_PASS_THRU		(MPTIOCTL | 4)
71 #define	MPTIOCTL_EVENT_QUERY		(MPTIOCTL | 5)
72 #define	MPTIOCTL_EVENT_ENABLE		(MPTIOCTL | 6)
73 #define	MPTIOCTL_EVENT_REPORT		(MPTIOCTL | 7)
74 #define	MPTIOCTL_GET_PCI_INFO		(MPTIOCTL | 8)
75 #define	MPTIOCTL_DIAG_ACTION		(MPTIOCTL | 9)
76 #define	MPTIOCTL_REG_ACCESS		(MPTIOCTL | 10)
77 #define	MPTIOCTL_GET_DISK_INFO		(MPTIOCTL | 11)
78 #define	MPTIOCTL_LED_CONTROL		(MPTIOCTL | 12)
79 
80 /*
81  *  The following are our ioctl() return status values.  If everything went
82  *  well, we return good status.  If the buffer length sent to us is too short
83  *  we return a status to tell the user.
84  */
85 #define	MPTIOCTL_STATUS_GOOD		0
86 #define	MPTIOCTL_STATUS_LEN_TOO_SHORT	1
87 
88 typedef struct mptsas_pci_bits
89 {
90 	union {
91 		struct {
92 			uint32_t	DeviceNumber	:5;
93 			uint32_t	FunctionNumber	:3;
94 			uint32_t	BusNumber	:24;
95 		} bits;
96 		uint32_t	AsDWORD;
97 	} u;
98 	uint32_t	PciSegmentId;
99 } mptsas_pci_bits_t;
100 /*
101  *  The following is the MPTIOCTL_GET_ADAPTER_DATA data structure.  This data
102  *  structure is setup so that we hopefully are properly aligned for both
103  *  32-bit and 64-bit mode applications.
104  *
105  *  Adapter Type - Value = 4 = SCSI Protocol through SAS-2 adapter
106  *
107  *  MPI Port Number - The PCI Function number for this device
108  *
109  *  PCI Device HW Id - The PCI device number for this device
110  *
111  */
112 #define	MPTIOCTL_ADAPTER_TYPE_SAS2	4
113 typedef struct mptsas_adapter_data
114 {
115 	uint32_t		StructureLength;
116 	uint32_t		AdapterType;
117 	uint32_t		MpiPortNumber;
118 	uint32_t		PCIDeviceHwId;
119 	uint32_t		PCIDeviceHwRev;
120 	uint32_t		SubSystemId;
121 	uint32_t		SubsystemVendorId;
122 	uint32_t		Reserved1;
123 	uint32_t		MpiFirmwareVersion;
124 	uint32_t		BiosVersion;
125 	uint8_t			DriverVersion[32];
126 	uint8_t			Reserved2;
127 	uint8_t			ScsiId;
128 	uint16_t		Reserved3;
129 	mptsas_pci_bits_t	PciInformation;
130 } mptsas_adapter_data_t;
131 
132 
133 typedef struct mptsas_update_flash
134 {
135 	uint64_t	PtrBuffer;
136 	uint32_t	ImageChecksum;
137 	uint32_t	ImageOffset;
138 	uint32_t	ImageSize;
139 	uint32_t	ImageType;
140 } mptsas_update_flash_t;
141 
142 
143 #define	MPTSAS_PASS_THRU_DIRECTION_NONE		0
144 #define	MPTSAS_PASS_THRU_DIRECTION_READ		1
145 #define	MPTSAS_PASS_THRU_DIRECTION_WRITE	2
146 #define	MPTSAS_PASS_THRU_DIRECTION_BOTH		3
147 
148 typedef struct mptsas_pass_thru
149 {
150 	uint64_t	PtrRequest;
151 	uint64_t	PtrReply;
152 	uint64_t	PtrData;
153 	uint32_t	RequestSize;
154 	uint32_t	ReplySize;
155 	uint32_t	DataSize;
156 	uint32_t	DataDirection;
157 	uint64_t	PtrDataOut;
158 	uint32_t	DataOutSize;
159 	uint32_t	Timeout;
160 } mptsas_pass_thru_t;
161 
162 
163 /*
164  * Event queue defines
165  */
166 #define	MPTSAS_EVENT_QUEUE_SIZE		(50) /* Max Events stored in driver */
167 #define	MPTSAS_MAX_EVENT_DATA_LENGTH	(48) /* Size of each event in Dwords */
168 
169 typedef struct mptsas_event_query
170 {
171 	uint16_t	Entries;
172 	uint16_t	Reserved;
173 	uint32_t	Types[4];
174 } mptsas_event_query_t;
175 
176 typedef struct mptsas_event_enable
177 {
178 	uint32_t	Types[4];
179 } mptsas_event_enable_t;
180 
181 /*
182  * Event record entry for ioctl.
183  */
184 typedef struct mptsas_event_entry
185 {
186 	uint32_t	Type;
187 	uint32_t	Number;
188 	uint32_t	Data[MPTSAS_MAX_EVENT_DATA_LENGTH];
189 } mptsas_event_entry_t;
190 
191 typedef struct mptsas_event_report
192 {
193 	uint32_t		Size;
194 	mptsas_event_entry_t	Events[1];
195 } mptsas_event_report_t;
196 
197 
198 typedef struct mptsas_pci_info
199 {
200 	uint32_t	BusNumber;
201 	uint8_t		DeviceNumber;
202 	uint8_t		FunctionNumber;
203 	uint16_t	InterruptVector;
204 	uint8_t		PciHeader[256];
205 } mptsas_pci_info_t;
206 
207 
208 typedef struct mptsas_diag_action
209 {
210 	uint32_t	Action;
211 	uint32_t	Length;
212 	uint64_t	PtrDiagAction;
213 	uint32_t	ReturnCode;
214 } mptsas_diag_action_t;
215 
216 #define	MPTSAS_FW_DIAGNOSTIC_UID_NOT_FOUND	(0xFF)
217 
218 #define	MPTSAS_FW_DIAG_NEW			(0x806E6577)
219 
220 #define	MPTSAS_FW_DIAG_TYPE_REGISTER		(0x00000001)
221 #define	MPTSAS_FW_DIAG_TYPE_UNREGISTER		(0x00000002)
222 #define	MPTSAS_FW_DIAG_TYPE_QUERY		(0x00000003)
223 #define	MPTSAS_FW_DIAG_TYPE_READ_BUFFER		(0x00000004)
224 #define	MPTSAS_FW_DIAG_TYPE_RELEASE		(0x00000005)
225 
226 #define	MPTSAS_FW_DIAG_INVALID_UID		(0x00000000)
227 
228 #define	MPTSAS_FW_DIAG_ERROR_SUCCESS		(0x00000000)
229 #define	MPTSAS_FW_DIAG_ERROR_FAILURE		(0x00000001)
230 #define	MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER	(0x00000002)
231 #define	MPTSAS_FW_DIAG_ERROR_POST_FAILED	(0x00000010)
232 #define	MPTSAS_FW_DIAG_ERROR_INVALID_UID	(0x00000011)
233 #define	MPTSAS_FW_DIAG_ERROR_RELEASE_FAILED	(0x00000012)
234 #define	MPTSAS_FW_DIAG_ERROR_NO_BUFFER		(0x00000013)
235 #define	MPTSAS_FW_DIAG_ERROR_ALREADY_RELEASED	(0x00000014)
236 
237 
238 typedef struct mptsas_fw_diag_register
239 {
240 	uint8_t		ExtendedType;
241 	uint8_t		BufferType;
242 	uint16_t	ApplicationFlags;
243 	uint32_t	DiagnosticFlags;
244 	uint32_t	ProductSpecific[23];
245 	uint32_t	RequestedBufferSize;
246 	uint32_t	UniqueId;
247 } mptsas_fw_diag_register_t;
248 
249 typedef struct mptsas_fw_diag_unregister
250 {
251 	uint32_t	UniqueId;
252 } mptsas_fw_diag_unregister_t;
253 
254 #define	MPTSAS_FW_DIAG_FLAG_APP_OWNED		(0x0001)
255 #define	MPTSAS_FW_DIAG_FLAG_BUFFER_VALID	(0x0002)
256 #define	MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS	(0x0004)
257 
258 typedef struct mptsas_fw_diag_query
259 {
260 	uint8_t		ExtendedType;
261 	uint8_t		BufferType;
262 	uint16_t	ApplicationFlags;
263 	uint32_t	DiagnosticFlags;
264 	uint32_t	ProductSpecific[23];
265 	uint32_t	TotalBufferSize;
266 	uint32_t	DriverAddedBufferSize;
267 	uint32_t	UniqueId;
268 } mptsas_fw_diag_query_t;
269 
270 typedef struct mptsas_fw_diag_release
271 {
272 	uint32_t	UniqueId;
273 } mptsas_fw_diag_release_t;
274 
275 #define	MPTSAS_FW_DIAG_FLAG_REREGISTER		(0x0001)
276 #define	MPTSAS_FW_DIAG_FLAG_FORCE_RELEASE	(0x0002)
277 
278 typedef struct mptsas_diag_read_buffer
279 {
280 	uint8_t		Status;
281 	uint8_t		Reserved;
282 	uint16_t	Flags;
283 	uint32_t	StartingOffset;
284 	uint32_t	BytesToRead;
285 	uint32_t	UniqueId;
286 	uint32_t	DataBuffer[1];
287 } mptsas_diag_read_buffer_t;
288 
289 /*
290  * Register Access
291  */
292 #define	REG_IO_READ	1
293 #define	REG_IO_WRITE	2
294 #define	REG_MEM_READ	3
295 #define	REG_MEM_WRITE	4
296 
297 typedef struct mptsas_reg_access
298 {
299 	uint32_t	Command;
300 	uint32_t	RegOffset;
301 	uint32_t	RegData;
302 } mptsas_reg_access_t;
303 
304 /*
305  * Disk Toplogy Information
306  */
307 typedef struct mptsas_disk_info
308 {
309 	uint64_t	SasAddress;
310 	uint16_t	Instance;
311 	uint16_t	Enclosure;
312 	uint16_t	Slot;
313 } mptsas_disk_info_t;
314 
315 typedef struct mptsas_get_disk_info
316 {
317 	uint16_t		DiskCount;
318 	mptsas_disk_info_t	*PtrDiskInfoArray;
319 	uint64_t		DiskInfoArraySize;
320 } mptsas_get_disk_info_t;
321 
322 #ifdef _KERNEL
323 
324 typedef struct mptsas_get_disk_info32
325 {
326 	uint16_t		DiskCount;
327 	caddr32_t		PtrDiskInfoArray;
328 	uint64_t		DiskInfoArraySize;
329 } mptsas_get_disk_info32_t;
330 
331 #endif /* _KERNEL */
332 
333 /*
334  * LED Control
335  */
336 
337 typedef struct mptsas_led_control
338 {
339 	uint8_t		Command;
340 	uint16_t	Enclosure;
341 	uint16_t	Slot;
342 	uint8_t		Led;
343 	uint8_t		LedStatus;
344 } mptsas_led_control_t;
345 
346 #define	MPTSAS_LEDCTL_FLAG_SET		1
347 #define	MPTSAS_LEDCTL_FLAG_GET		2
348 
349 #define	MPTSAS_LEDCTL_LED_IDENT		1
350 #define	MPTSAS_LEDCTL_LED_FAIL		2
351 #define	MPTSAS_LEDCTL_LED_OK2RM		3
352 
353 #define	MPTSAS_LEDCTL_LED_MIN		MPTSAS_LEDCTL_LED_IDENT
354 #define	MPTSAS_LEDCTL_LED_MAX		MPTSAS_LEDCTL_LED_OK2RM
355 
356 #ifdef  __cplusplus
357 }
358 #endif
359 
360 #endif	/* _MPTSAS_IOCTL_H */
361