xref: /illumos-gate/usr/src/uts/common/sys/sata/sata_defs.h (revision 3893cb7fe5bfa1c9a4f7954517a917367f6cf081)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _SATA_DEFS_H
28 #define	_SATA_DEFS_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * Common ATA commands (subset)
38  */
39 #define	SATAC_DIAG		0x90    /* diagnose command */
40 #define	SATAC_RECAL		0x10	/* restore cmd, 4 bits step rate */
41 #define	SATAC_FORMAT		0x50	/* format track command */
42 #define	SATAC_SET_FEATURES	0xef	/* set features	*/
43 #define	SATAC_IDLE_IM		0xe1	/* idle immediate */
44 #define	SATAC_STANDBY_IM	0xe0	/* standby immediate */
45 #define	SATAC_DOOR_LOCK		0xde	/* door lock */
46 #define	SATAC_DOOR_UNLOCK	0xdf	/* door unlock */
47 #define	SATAC_IDLE		0xe3	/* idle	*/
48 
49 /*
50  * ATA/ATAPI disk commands (subset)
51  */
52 #define	SATAC_DEVICE_RESET	0x08    /* ATAPI device reset */
53 #define	SATAC_DOWNLOAD_MICROCODE 0x92   /* Download microcode */
54 #define	SATAC_EJECT		0xed	/* media eject */
55 #define	SATAC_FLUSH_CACHE	0xe7	/* flush write-cache */
56 #define	SATAC_ID_DEVICE		0xec    /* IDENTIFY DEVICE */
57 #define	SATAC_ID_PACKET_DEVICE	0xa1	/* ATAPI identify packet device */
58 #define	SATAC_INIT_DEVPARMS	0x91	/* initialize device parameters */
59 #define	SATAC_PACKET		0xa0	/* ATAPI packet */
60 #define	SATAC_RDMULT		0xc4	/* read multiple w/DMA */
61 #define	SATAC_RDSEC		0x20    /* read sector */
62 #define	SATAC_RDVER		0x40	/* read verify */
63 #define	SATAC_READ_DMA		0xc8	/* read DMA */
64 #define	SATAC_SEEK		0x70    /* seek */
65 #define	SATAC_SERVICE		0xa2	/* queued/overlap service */
66 #define	SATAC_SETMULT		0xc6	/* set multiple mode */
67 #define	SATAC_WRITE_DMA		0xca	/* write (multiple) w/DMA */
68 #define	SATAC_WRMULT		0xc5	/* write multiple */
69 #define	SATAC_WRSEC		0x30    /* write sector */
70 #define	SATAC_RDSEC_EXT		0x24    /* read sector extended (LBA48) */
71 #define	SATAC_READ_DMA_EXT	0x25	/* read DMA extended (LBA48) */
72 #define	SATAC_RDMULT_EXT	0x29	/* read multiple extended (LBA48) */
73 #define	SATAC_WRSEC_EXT		0x34    /* read sector extended (LBA48) */
74 #define	SATAC_WRITE_DMA_EXT	0x35	/* read DMA extended (LBA48) */
75 #define	SATAC_WRMULT_EXT	0x39	/* read multiple extended (LBA48) */
76 
77 #define	SATAC_READ_DMA_QUEUED	0xc7	/* read DMA / may be queued */
78 #define	SATAC_READ_DMA_QUEUED_EXT 0x26	/* read DMA ext / may be queued */
79 #define	SATAC_WRITE_DMA_QUEUED	0xcc	/* read DMA / may be queued */
80 #define	SATAC_WRITE_DMA_QUEUED_EXT 0x36	/* read DMA ext / may be queued */
81 #define	SATAC_READ_PM_REG	0xe4	/* read port mult reg */
82 #define	SATAC_WRITE_PM_REG	0xe8	/* write port mult reg */
83 
84 #define	SATAC_READ_FPDMA_QUEUED	0x60	/* First-Party-DMA read queued */
85 #define	SATAC_WRITE_FPDMA_QUEUED 0x61	/* First-Party-DMA write queued */
86 
87 #define	SATAC_READ_LOG_EXT	0x2f	/* read log */
88 
89 #define	SATAC_SMART		0xb0	/* SMART */
90 
91 #define	SATA_LOG_PAGE_10	0x10	/* log page 0x10 - SATA error */
92 /*
93  * Power Managment Commands (subset)
94  */
95 #define	SATAC_CHECK_POWER_MODE	0xe5	/* check power mode */
96 
97 #define	SATA_PWRMODE_STANDBY	0	/* standby mode */
98 #define	SATA_PWRMODE_IDLE	0x80	/* idle mode */
99 #define	SATA_PWRMODE_ACTIVE	0xFF	/* active or idle mode, rev7 spec */
100 
101 
102 /*
103  * SMART FEATURES Subcommands
104  */
105 #define	SATA_SMART_READ_DATA		0xd0
106 #define	SATA_SMART_ATTR_AUTOSAVE	0xd2
107 #define	SATA_SMART_EXECUTE_OFFLINE_IMM	0xd4
108 #define	SATA_SMART_READ_LOG		0xd5
109 #define	SATA_SMART_WRITE_LOG		0xd6
110 #define	SATA_SMART_ENABLE_OPS		0xd8
111 #define	SATA_SMART_DISABLE_OPS		0xd9
112 #define	SATA_SMART_RETURN_STATUS	0xda
113 
114 /*
115  * SET FEATURES Subcommands
116  */
117 #define	SATAC_SF_ENABLE_WRITE_CACHE	0x02
118 #define	SATAC_SF_TRANSFER_MODE		0x03
119 #define	SATAC_SF_DISABLE_READ_AHEAD	0x55
120 #define	SATAC_SF_DISABLE_WRITE_CACHE	0x82
121 #define	SATAC_SF_ENABLE_READ_AHEAD	0xaa
122 
123 /*
124  * SET FEATURES transfer mode values
125  */
126 #define	SATAC_TRANSFER_MODE_PIO_DEFAULT		0x00
127 #define	SATAC_TRANSFER_MODE_PIO_DISABLE_IODRY	0x01
128 #define	SATAC_TRANSFER_MODE_PIO_FLOW_CONTROL	0x08
129 #define	SATAC_TRANSFER_MODE_MULTI_WORD_DMA	0x20
130 #define	SATAC_TRANSFER_MODE_ULTRA_DMA		0x40
131 
132 /*
133  * Download microcode subcommands
134  */
135 #define	SATA_DOWNLOAD_MCODE_TEMP	1	/* Revert on/ reset/pwr cycle */
136 #define	SATA_DOWNLOAD_MCODE_SAVE	7	/* No offset, keep mcode */
137 
138 
139 /* Generic ATA definitions */
140 
141 #define	SATA_TAG_QUEUING_SHIFT 3
142 #define	SATA_TAG_QUEUING_MASK 0x1f
143 /*
144  * Identify Device data
145  * Although bot ATA and ATAPI devices' Identify Data has the same lenght,
146  * some words have different meaning/content and/or are irrelevant for
147  * other type of device.
148  * Following is the ATA Device Identify data layout
149  */
150 typedef struct sata_id {
151 /*  					WORD				  */
152 /* 					OFFSET COMMENT			  */
153 	ushort_t  ai_config;	   /*   0  general configuration bits	  */
154 	ushort_t  ai_fixcyls;	   /*   1  # of cylinders (obsolete)	  */
155 	ushort_t  ai_resv0;	   /*   2  # reserved			  */
156 	ushort_t  ai_heads;	   /*   3  # of heads (obsolete)	  */
157 	ushort_t  ai_trksiz;	   /*   4  # of bytes/track (retired)	  */
158 	ushort_t  ai_secsiz;	   /*   5  # of bytes/sector (retired)	  */
159 	ushort_t  ai_sectors;	   /*   6  # of sectors/track (obsolete)  */
160 	ushort_t  ai_resv1[3];	   /*   7  "Vendor Unique"		  */
161 	char	ai_drvser[20];	   /*  10  Serial number		  */
162 	ushort_t ai_buftype;	   /*  20  Buffer type			  */
163 	ushort_t ai_bufsz;	   /*  21  Buffer size in 512 byte incr   */
164 	ushort_t ai_ecc;	   /*  22  # of ecc bytes avail on rd/wr  */
165 	char	ai_fw[8];	   /*  23  Firmware revision		  */
166 	char	ai_model[40];	   /*  27  Model #			  */
167 	ushort_t ai_mult1;	   /*  47  Multiple command flags	  */
168 	ushort_t ai_dwcap;	   /*  48  Doubleword capabilities	  */
169 	ushort_t ai_cap;	   /*  49  Capabilities			  */
170 	ushort_t ai_resv2;	   /*  50  Reserved			  */
171 	ushort_t ai_piomode;	   /*  51  PIO timing mode		  */
172 	ushort_t ai_dmamode;	   /*  52  DMA timing mode		  */
173 	ushort_t ai_validinfo;	   /*  53  bit0: wds 54-58, bit1: 64-70	  */
174 	ushort_t ai_curcyls;	   /*  54  # of current cylinders	  */
175 	ushort_t ai_curheads;	   /*  55  # of current heads		  */
176 	ushort_t ai_cursectrk;	   /*  56  # of current sectors/track	  */
177 	ushort_t ai_cursccp[2];	   /*  57  current sectors capacity	  */
178 	ushort_t ai_mult2;	   /*  59  multiple sectors info	  */
179 	ushort_t ai_addrsec[2];	   /*  60  LBA only: no of addr secs	  */
180 	ushort_t ai_sworddma;	   /*  62  single word dma modes	  */
181 	ushort_t ai_dworddma;	   /*  63  double word dma modes	  */
182 	ushort_t ai_advpiomode;	   /*  64  advanced PIO modes supported	  */
183 	ushort_t ai_minmwdma;	   /*  65  min multi-word dma cycle info  */
184 	ushort_t ai_recmwdma;	   /*  66  rec multi-word dma cycle info  */
185 	ushort_t ai_minpio;	   /*  67  min PIO cycle info		  */
186 	ushort_t ai_minpioflow;	   /*  68  min PIO cycle info w/flow ctl  */
187 	ushort_t ai_resv3[2];	   /* 69,70 reserved			  */
188 	ushort_t ai_typtime[2];	   /* 71-72 timing			  */
189 	ushort_t ai_resv4[2];	   /* 73-74 reserved			  */
190 	ushort_t ai_qdepth;	   /*  75  queue depth			  */
191 	ushort_t ai_satacap;	   /*  76  SATA capabilities		  */
192 	ushort_t ai_resv5;	   /*  77 reserved			  */
193 	ushort_t ai_satafsup;	   /*  78 SATA features supported	  */
194 	ushort_t ai_satafenbl;	   /*  79 SATA features enabled		  */
195 	ushort_t ai_majorversion;  /*  80  major versions supported	  */
196 	ushort_t ai_minorversion;  /*  81  minor version number supported */
197 	ushort_t ai_cmdset82;	   /*  82  command set supported	  */
198 	ushort_t ai_cmdset83;	   /*  83  more command sets supported	  */
199 	ushort_t ai_cmdset84;	   /*  84  more command sets supported	  */
200 	ushort_t ai_features85;	   /*  85 enabled features		  */
201 	ushort_t ai_features86;	   /*  86 enabled features		  */
202 	ushort_t ai_features87;	   /*  87 enabled features		  */
203 	ushort_t ai_ultradma;	   /*  88 Ultra DMA mode		  */
204 	ushort_t ai_erasetime;	   /*  89 security erase time		  */
205 	ushort_t ai_erasetimex;	   /*  90 enhanced security erase time	  */
206 	ushort_t ai_adv_pwr_mgmt;  /*  91 advanced power management time  */
207 	ushort_t ai_master_pwd;    /*  92 master password revision code   */
208 	ushort_t ai_hrdwre_reset;  /*  93 hardware reset result		  */
209 	ushort_t ai_acoustic;	   /*  94 accoustic management values	  */
210 	ushort_t ai_stream_min_sz; /*  95 stream minimum request size	  */
211 	ushort_t ai_stream_xfer_d; /*  96 streaming transfer time (DMA)   */
212 	ushort_t ai_stream_lat;    /*  97 streaming access latency	  */
213 	ushort_t ai_streamperf[2]; /* 98-99 streaming performance gran.   */
214 	ushort_t ai_addrsecxt[4];  /* 100 extended max LBA sector	  */
215 	ushort_t ai_stream_xfer_p; /* 104 streaming transfer time (PIO)   */
216 	ushort_t ai_padding1;	   /* 105 pad				  */
217 	ushort_t ai_phys_sect_sz;  /* 106 physical sector size		  */
218 	ushort_t ai_seek_delay;	   /* 107 inter-seek delay time (usecs)	  */
219 	ushort_t ai_naa_ieee_oui;  /* 108 NAA/IEEE OUI			  */
220 	ushort_t ai_ieee_oui_uid;  /* 109 IEEE OUT/unique id		  */
221 	ushort_t ai_uid_mid;	   /* 110 unique id (mid)		  */
222 	ushort_t ai_uid_low;	   /* 111 unique id (low)		  */
223 	ushort_t ai_resv_wwn[4];   /* 112-115 reserved for WWN ext.	  */
224 	ushort_t ai_incits;	   /* 116 reserved for INCITS TR-37-2004  */
225 	ushort_t ai_words_lsec[2]; /* 117-118 words per logical sector	  */
226 	ushort_t ai_cmdset119;	   /* 119 more command sets supported	  */
227 	ushort_t ai_features120;   /* 120 enabled features		  */
228 	ushort_t ai_padding2[6];   /* pad to 126			  */
229 	ushort_t ai_rmsn;	   /* 127 removable media notification	  */
230 	ushort_t ai_securestatus;  /* 128 security status		  */
231 	ushort_t ai_vendor[31];	   /* 129-159 vendor specific		  */
232 	ushort_t ai_padding3[16];  /* 160 pad to 176			  */
233 	ushort_t ai_curmedser[30]; /* 176-205 current media serial #	  */
234 	ushort_t ai_sctsupport;	   /* 206 SCT command transport		  */
235 	ushort_t ai_padding4[48];  /* 207 pad to 255			  */
236 	ushort_t ai_integrity;	   /* 255 integrity word		  */
237 } sata_id_t;
238 
239 
240 /* Identify Device: general config bits  - word 0 */
241 
242 #define	SATA_ATA_TYPE_MASK	0x8001	/* ATA Device type mask */
243 #define	SATA_ATA_TYPE		0x0000	/* ATA device */
244 #define	SATA_REM_MEDIA  	0x0080 	/* Removable media */
245 #define	SATA_INCOMPLETE_DATA	0x0004	/* Incomplete Identify Device data */
246 
247 #define	SATA_ID_SERIAL_OFFSET	10
248 #define	SATA_ID_SERIAL_LEN	20
249 #define	SATA_ID_MODEL_OFFSET	27
250 #define	SATA_ID_MODEL_LEN	40
251 #define	SATA_ID_FW_LEN		8
252 
253 /* Identify Device: common capability bits - word 49 */
254 
255 #define	SATA_DMA_SUPPORT	0x0100
256 #define	SATA_LBA_SUPPORT	0x0200
257 #define	SATA_IORDY_DISABLE	0x0400
258 #define	SATA_IORDY_SUPPORT	0x0800
259 #define	SATA_STANDBYTIMER	0x2000
260 
261 /* Identify Device: ai_validinfo (word 53) */
262 
263 #define	SATA_VALIDINFO_88	0x0004	/* word 88 supported fields valid */
264 
265 /* Identify Device: ai_majorversion (word 80) */
266 
267 #define	SATA_MAJVER_6		0x0040	/* ATA/ATAPI-6 version supported */
268 #define	SATA_MAJVER_4		0x0010	/* ATA/ATAPI-4 version supported */
269 
270 /* Identify Device: command set supported/enabled bits - words 83 and 86 */
271 
272 #define	SATA_EXT48		0x0400	/* 48 bit address feature */
273 #define	SATA_RW_DMA_QUEUED_CMD	0x0002	/* R/W DMA Queued supported */
274 #define	SATA_DWNLOAD_MCODE_CMD	0x0001	/* Download Microcode CMD supp/enbld */
275 
276 /* Identify Device: command set supported/enabled bits - words 82 and 85 */
277 
278 #define	SATA_SMART_SUPPORTED	0x0001	/* SMART feature set is supported */
279 #define	SATA_WRITE_CACHE	0x0020	/* Write Cache supported/enabled */
280 #define	SATA_LOOK_AHEAD		0x0040	/* Look Ahead supported/enabled */
281 #define	SATA_DEVICE_RESET_CMD	0x0200	/* Device Reset CMD supported/enbld */
282 #define	SATA_READ_BUFFER_CMD	0x2000	/* Read Buffer CMD supported/enbld */
283 #define	SATA_WRITE_BUFFER_CMD	0x1000	/* Write Buffer CMD supported/enbld */
284 #define	SATA_SMART_ENABLED	0x0001	/* SMART feature set is enabled */
285 
286 /* Identify Device: command set supported/enabled bits - words 84 & 87 */
287 #define	SATA_SMART_SELF_TEST_SUPPORTED	0x0002	/* SMART self-test supported */
288 
289 #define	SATA_MDMA_SEL_MASK	0x0700	/* Multiword DMA selected */
290 #define	SATA_MDMA_2_SEL		0x0400	/* Multiword DMA mode 2 selected */
291 #define	SATA_MDMA_1_SEL		0x0200	/* Multiword DMA mode 1 selected */
292 #define	SATA_MDMA_0_SEL		0x0100	/* Multiword DMA mode 0 selected */
293 #define	SATA_MDMA_2_SUP		0x0004	/* Multiword DMA mode 2 supported */
294 #define	SATA_MDMA_1_SUP		0x0002	/* Multiword DMA mode 1 supported */
295 #define	SATA_MDMA_0_SUP		0x0001	/* Multiword DMA mode 0 supported */
296 
297 /* Identify Device: command set supported/enabled bits - word 206 */
298 
299 /* All are SCT Command Transport support */
300 #define	SATA_SCT_CMD_TRANS_SUP		0x0001	/* anything */
301 #define	SATA_SCT_CMD_TRANS_LNG_SECT_SUP	0x0002	/* Long Sector Access */
302 #define	SATA_SCT_CMD_TRANS_WR_SAME_SUP	0x0004	/* Write Same */
303 #define	SATA_SCT_CMD_TRANS_ERR_RCOV_SUP	0x0008	/* Error Recovery Control */
304 #define	SATA_SCT_CMD_TRANS_FEAT_CTL_SUP	0x0010	/* Features Control */
305 #define	SATA_SCT_CMD_TRANS_DATA_TBL_SUP	0x0020	/* Data Tables supported */
306 
307 #define	SATA_DISK_SECTOR_SIZE	512	/* HD physical sector size */
308 
309 /* Identify Packet Device data definitions (ATAPI devices) */
310 
311 /* Identify Packet Device: general config bits  - word 0 */
312 
313 #define	SATA_ATAPI_TYPE_MASK	0xc000
314 #define	SATA_ATAPI_TYPE		0x8000 	/* ATAPI device */
315 #define	SATA_ATAPI_ID_PKT_SZ	0x0003 	/* Packet size mask */
316 #define	SATA_ATAPI_ID_PKT_12B	0x0000  /* Packet size 12 bytes */
317 #define	SATA_ATAPI_ID_PKT_16B	0x0001  /* Packet size 16 bytes */
318 #define	SATA_ATAPI_ID_DRQ_TYPE	0x0060 	/* DRQ asserted in 3ms after pkt */
319 #define	SATA_ATAPI_ID_DRQ_INTR	0x0020  /* Obsolete in ATA/ATAPI 7 */
320 
321 #define	SATA_ATAPI_ID_DEV_TYPE	0x0f00	/* device type/command set mask */
322 #define	SATA_ATAPI_ID_DEV_SHFT	8
323 #define	SATA_ATAPI_DIRACC_DEV	0x0000	/* Direct Access device */
324 #define	SATA_ATAPI_SQACC_DEV	0x0100  /* Sequential access dev (tape ?) */
325 #define	SATA_ATAPI_CDROM_DEV	0x0500  /* CD_ROM device */
326 
327 /*
328  * Status bits from ATAPI Interrupt reason register (AT_COUNT) register
329  */
330 #define	SATA_ATAPI_I_COD	0x01	/* Command or Data */
331 #define	SATA_ATAPI_I_IO		0x02	/* IO direction */
332 #define	SATA_ATAPI_I_RELEASE	0x04	/* Release for ATAPI overlap */
333 
334 /* ATAPI feature reg definitions */
335 
336 #define	SATA_ATAPI_F_OVERLAP	0x02
337 
338 
339 /*
340  * ATAPI IDENTIFY_DRIVE capabilities word
341  */
342 
343 #define	SATA_ATAPI_ID_CAP_DMA		0x0100
344 #define	SATA_ATAPI_ID_CAP_OVERLAP	0x2000
345 
346 /*
347  * ATAPI signature bits
348  */
349 #define	SATA_ATAPI_SIG_HI	0xeb	/* in high cylinder register */
350 #define	SATA_ATAPI_SIG_LO	0x14	/* in low cylinder register */
351 
352 /* These values are pre-set for CD_ROM/DVD ? */
353 
354 #define	SATA_ATAPI_SECTOR_SIZE		2048
355 #define	SATA_ATAPI_MAX_BYTES_PER_DRQ	0xf800 /* 16 bits - 2KB  ie 62KB */
356 #define	SATA_ATAPI_HEADS		64
357 #define	SATA_ATAPI_SECTORS_PER_TRK	32
358 
359 /* SATA Capabilites bits (word 76) */
360 
361 #define	SATA_NCQ		0x100
362 #define	SATA_2_SPEED		0x004
363 #define	SATA_1_SPEED		0x002
364 
365 /* SATA Features Supported (word 78) - not used */
366 
367 /* SATA Features Enabled (word 79) - not used */
368 
369 /*
370  * Generic NCQ related defines
371  */
372 
373 #define	NQ			0x80	/* Not a queued cmd - tag not valid */
374 #define	NCQ_TAG_MASK		0x1f	/* NCQ command tag mask */
375 #define	FIS_TYPE_REG_H2D	0x27	/* Reg FIS - Host to Device */
376 #define	FIS_CMD_UPDATE		0x80
377 /*
378  * Status bits from AT_STATUS register
379  */
380 #define	SATA_STATUS_BSY		0x80    /* controller busy */
381 #define	SATA_STATUS_DRDY	0x40    /* drive ready 	*/
382 #define	SATA_STATUS_DF		0x20    /* device fault	*/
383 #define	SATA_STATUS_DSC    	0x10    /* seek operation complete */
384 #define	SATA_STATUS_DRQ		0x08	/* data request */
385 #define	SATA_STATUS_CORR	0x04    /* obsolete */
386 #define	SATA_STATUS_IDX		0x02    /* obsolete */
387 #define	SATA_STATUS_ERR		0x01    /* error flag */
388 
389 /*
390  * Status bits from AT_ERROR register
391  */
392 #define	SATA_ERROR_ICRC		0x80	/* CRC data transfer error detected */
393 #define	SATA_ERROR_UNC		0x40	/* uncorrectable data error */
394 #define	SATA_ERROR_MC		0x20    /* Media change	*/
395 #define	SATA_ERROR_IDNF		0x10    /* ID/Address not found	*/
396 #define	SATA_ERROR_MCR		0x08	/* media change request	*/
397 #define	SATA_ERROR_ABORT	0x04    /* aborted command */
398 #define	SATA_ERROR_NM		0x02	/* no media */
399 #define	SATA_ERROR_EOM		0x02    /* end of media (Packet cmds) */
400 #define	SATA_ERROR_ILI		0x01    /* cmd sepcific */
401 
402 
403 /*
404  * Bits from the device control register
405  */
406 #define	SATA_DEVCTL_NIEN	0x02	/* not interrupt enabled */
407 #define	SATA_DEVCTL_SRST	0x04	/* software reset */
408 #define	SATA_DEVCTL_HOB		0x80	/* high order bit */
409 
410 /* device_reg */
411 #define	SATA_ADH_LBA		0x40	/* addressing in LBA mode not chs */
412 
413 
414 #define	SCSI_LOG_PAGE_HDR_LEN	4	/* # bytes of a SCSI log page header */
415 #define	SCSI_LOG_PARAM_HDR_LEN	4	/* # byttes of a SCSI log param hdr */
416 
417 /* Number of log entries per extended selftest log block */
418 #define	ENTRIES_PER_EXT_SELFTEST_LOG_BLK	19
419 
420 /* Number of entries per SCSI LOG SENSE SELFTEST RESULTS page */
421 #define	SCSI_ENTRIES_IN_LOG_SENSE_SELFTEST_RESULTS	20
422 
423 /* Length of a SCSI LOG SENSE SELFTEST RESULTS parameter */
424 #define	SCSI_LOG_SENSE_SELFTEST_PARAM_LEN	0x10
425 
426 #define	DIAGNOSTIC_FAILURE_ON_COMPONENT	0x40
427 
428 #define	SCSI_COMPONENT_81	0x81
429 #define	SCSI_COMPONENT_82	0x82
430 #define	SCSI_COMPONENT_83	0x83
431 #define	SCSI_COMPONENT_84	0x84
432 #define	SCSI_COMPONENT_85	0x85
433 #define	SCSI_COMPONENT_86	0x86
434 #define	SCSI_COMPONENT_87	0x87
435 #define	SCSI_COMPONENT_88	0x88
436 
437 #define	SCSI_ASC_ATA_DEV_FEAT_NOT_ENABLED	0x67
438 #define	SCSI_ASCQ_ATA_DEV_FEAT_NOT_ENABLED	0x0b
439 
440 #define	SCSI_PREDICTED_FAILURE	0x5d
441 #define	SCSI_GENERAL_HD_FAILURE	0x10
442 
443 #define	SCSI_INFO_EXCEPTIONS_PARAM_LEN	4
444 
445 #define	READ_LOG_EXT_LOG_DIRECTORY	0
446 #define	READ_LOG_EXT_NCQ_ERROR_RECOVERY	0x10
447 #define	SMART_SELFTEST_LOG_PAGE		6
448 #define	EXT_SMART_SELFTEST_LOG_PAGE	7
449 
450 /*
451  * SATA NCQ error recovery page (0x10)
452  */
453 struct sata_ncq_error_recovery_page {
454 	uint8_t	ncq_tag;
455 	uint8_t reserved1;
456 	uint8_t ncq_status;
457 	uint8_t ncq_error;
458 	uint8_t ncq_sector_number;
459 	uint8_t ncq_cyl_low;
460 	uint8_t ncq_cyl_high;
461 	uint8_t ncq_dev_head;
462 	uint8_t ncq_sector_number_ext;
463 	uint8_t ncq_cyl_low_ext;
464 	uint8_t ncq_cyl_high_ext;
465 	uint8_t reserved2;
466 	uint8_t ncq_sector_count;
467 	uint8_t ncq_sector_count_ext;
468 	uint8_t reserved3[242];
469 	uint8_t ncq_vendor_unique[255];
470 	uint8_t ncq_checksum;
471 };
472 
473 /*
474  * SMART data structures
475  */
476 struct smart_data {
477 	uint8_t smart_vendor_specific[362];
478 	uint8_t smart_offline_data_collection_status;
479 	uint8_t smart_selftest_exec_status;
480 	uint8_t smart_secs_to_complete_offline_data[2];
481 	uint8_t smart_vendor_specific2;
482 	uint8_t smart_offline_data_collection_capability;
483 	uint8_t smart_capability[2];
484 	uint8_t	smart_error_logging_capability;
485 	uint8_t smart_vendor_specific3;
486 	uint8_t smart_short_selftest_polling_time;
487 	uint8_t smart_extended_selftest_polling_time;
488 	uint8_t smart_conveyance_selftest_polling_time;
489 	uint8_t smart_reserved[11];
490 	uint8_t smart_vendor_specific4[125];
491 	uint8_t smart_checksum;
492 };
493 
494 struct smart_selftest_log_entry {
495 	uint8_t	smart_selftest_log_lba_low;
496 	uint8_t	smart_selftest_log_status;
497 	uint8_t	smart_selftest_log_timestamp[2];
498 	uint8_t smart_selftest_log_checkpoint;
499 	uint8_t smart_selftest_log_failing_lba[4];	/* from LSB to MSB */
500 	uint8_t smart_selftest_log_vendor_specific[15];
501 };
502 
503 #define	NUM_SMART_SELFTEST_LOG_ENTRIES	21
504 struct smart_selftest_log {
505 	uint8_t	smart_selftest_log_revision[2];
506 	struct	smart_selftest_log_entry
507 	    smart_selftest_log_entries[NUM_SMART_SELFTEST_LOG_ENTRIES];
508 	uint8_t	smart_selftest_log_vendor_specific[2];
509 	uint8_t smart_selftest_log_index;
510 	uint8_t smart_selftest_log_reserved[2];
511 	uint8_t smart_selftest_log_checksum;
512 };
513 
514 struct smart_ext_selftest_log_entry {
515 	uint8_t	smart_ext_selftest_log_lba_low;
516 	uint8_t smart_ext_selftest_log_status;
517 	uint8_t smart_ext_selftest_log_timestamp[2];
518 	uint8_t smart_ext_selftest_log_checkpoint;
519 	uint8_t smart_ext_selftest_log_failing_lba[6];
520 	uint8_t smart_ext_selftest_log_vendor_specific[15];
521 };
522 
523 struct smart_ext_selftest_log {
524 	uint8_t	smart_ext_selftest_log_rev;
525 	uint8_t	smart_ext_selftest_log_reserved;
526 	uint8_t	smart_ext_selftest_log_index[2];
527 	struct smart_ext_selftest_log_entry smart_ext_selftest_log_entries[19];
528 	uint8_t	smart_ext_selftest_log_vendor_specific[2];
529 	uint8_t	smart_ext_selftest_log_reserved2[11];
530 	uint8_t	smart_ext_selftest_log_checksum;
531 };
532 
533 struct read_log_ext_directory {
534 	uint8_t	read_log_ext_vers[2];	/* general purpose log version */
535 	uint8_t read_log_ext_nblks[255][2]; /* # of blks @ log addr index+1 */
536 };
537 
538 /*
539  * SMART specific data
540  * These eventually need to go to a generic scsi hearder file
541  * for now they will reside here
542  */
543 #define	PC_CUMULATIVE_VALUES			0x01
544 #define	PAGE_CODE_GET_SUPPORTED_LOG_PAGES	0x00
545 #define	PAGE_CODE_SELF_TEST_RESULTS		0x10
546 #define	PAGE_CODE_INFORMATION_EXCEPTIONS	0x2f
547 #define	PAGE_CODE_SMART_READ_DATA		0x30
548 
549 
550 struct log_parameter {
551 	uint8_t param_code[2];		/* parameter dependant */
552 	uint8_t param_ctrl_flags;	/* see defines below */
553 	uint8_t param_len;		/* # of bytes following */
554 	uint8_t param_values[1];	/* # of bytes defined by param_len */
555 };
556 
557 /* param_ctrl_flag fields */
558 #define	LOG_CTRL_LP	0x01	/* list parameter */
559 #define	LOG_CTRL_LBIN	0x02	/* list is binary */
560 #define	LOG_CTRL_TMC	0x0c	/* threshold met criteria */
561 #define	LOG_CTRL_ETC	0x10	/* enable threshold comparison */
562 #define	LOG_CTRL_TSD	0x20	/* target save disable */
563 #define	LOG_CTRL_DS	0x40	/* disable save */
564 #define	LOG_CTRL_DU	0x80	/* disable update */
565 
566 #define	SMART_MAGIC_VAL_1	0x4f
567 #define	SMART_MAGIC_VAL_2	0xc2
568 #define	SMART_MAGIC_VAL_3	0xf4
569 #define	SMART_MAGIC_VAL_4	0x2c
570 
571 #define	SCT_STATUS_LOG_PAGE	0xe0
572 
573 #ifdef	__cplusplus
574 }
575 #endif
576 
577 #endif /* _SATA_DEFS_H */
578