1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. 24 */ 25 26 #ifndef _SI3124VAR_H 27 #define _SI3124VAR_H 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 #define SI3124_MAX_PORTS 4 34 #define SI3132_MAX_PORTS 2 35 #define SI_MAX_PORTS SI3124_MAX_PORTS 36 37 #define SI_SUCCESS (0) /* successful return */ 38 #define SI_TIMEOUT (1) /* timed out */ 39 #define SI_FAILURE (-1) /* unsuccessful return */ 40 41 #define SI_MAX_SGT_TABLES_PER_PRB 21844 42 #define SI_DEFAULT_SGT_TABLES_PER_PRB 85 43 #define SI_MIN_SGT_TABLES_PER_PRB 1 44 /* 45 * While the si_sge_t and si_sgt_t correspond to the actual SGE and SGT 46 * definitions as per the datasheet, the si_sgblock_t (i.e scatter gather 47 * block) is a logical data structure which can hold dynamic SGEs and it 48 * is tunable through global variables /etc/system si3124:si_dma_sg_number. 49 * The idea is to use multiple tunable chained SGT tables per each PRB request. 50 */ 51 52 typedef struct si_sgblock { 53 si_sgt_t sgb_sgt[1]; 54 } si_sgblock_t; 55 56 /* 57 * Each SGT (Scatter Gather Table) has 4 SGEs (Scatter Gather Entries). 58 * But each SGT effectively can host only 3 SGEs since the last SGE entry 59 * is used to hold a link to the next SGT in the chain. However the last 60 * SGT in the chain can host all the 4 entries since it does not need to 61 * link any more. 62 */ 63 #define SGE_LENGTH(x) (3*(x)+1) 64 #define SI_DEFAULT_SGL_LENGTH SGE_LENGTH(SI_DEFAULT_SGT_TABLES_PER_PRB) 65 66 typedef struct si_portmult_state { 67 int sipm_num_ports; 68 uint8_t sipm_port_type[15]; 69 /* one of PORT_TYPE_[NODEV | MULTIPLIER | ATAPI | DISK | UNKNOWN] */ 70 71 /* 72 * sipm_port_type[] is good enough to capture the state of ports 73 * behind the multiplier. Since any of the port behind a multiplier 74 * is accessed through the same main controller port, we don't need 75 * additional si_port_state_t here. 76 */ 77 78 } si_portmult_state_t; 79 80 81 /* The following are for port types */ 82 #define PORT_TYPE_NODEV 0x0 83 #define PORT_TYPE_MULTIPLIER 0x1 84 #define PORT_TYPE_ATAPI 0x2 85 #define PORT_TYPE_DISK 0x3 86 #define PORT_TYPE_UNKNOWN 0x4 87 88 /* The following are for active state */ 89 #define PORT_INACTIVE 0x0 90 #define PORT_ACTIVE 0x1 91 92 typedef struct si_port_state { 93 uint8_t siport_port_type; 94 /* one of PORT_TYPE_[NODEV | MULTIPLIER | ATAPI | DISK | UNKNOWN] */ 95 96 uint8_t siport_active; /* one of ACTIVE or INACTIVE */ 97 98 si_portmult_state_t siport_portmult_state; 99 100 si_prb_t *siport_prbpool; /* These are 31 incore PRBs */ 101 uint64_t siport_prbpool_physaddr; 102 ddi_dma_handle_t siport_prbpool_dma_handle; 103 ddi_acc_handle_t siport_prbpool_acc_handle; 104 105 106 si_sgblock_t *siport_sgbpool; /* These are 31 incore sg blocks */ 107 uint64_t siport_sgbpool_physaddr; 108 ddi_dma_handle_t siport_sgbpool_dma_handle; 109 ddi_acc_handle_t siport_sgbpool_acc_handle; 110 111 kmutex_t siport_mutex; /* main per port mutex */ 112 uint32_t siport_pending_tags; /* remembers the pending tags */ 113 sata_pkt_t *siport_slot_pkts[SI_NUM_SLOTS]; 114 115 /* 116 * While the reset is in progress, we don't accept any more commands 117 * until we receive the command with SATA_CLEAR_DEV_RESET_STATE flag. 118 * However any commands with SATA_IGNORE_DEV_RESET_STATE are allowed in 119 * during such blockage. 120 */ 121 int siport_reset_in_progress; 122 123 /* 124 * We mop the commands for either abort, reset, timeout or 125 * error handling cases. This counts how many mops are in progress. 126 * It is also used to return BUSY in tran_start if a mop is going on. 127 */ 128 int mopping_in_progress; 129 130 /* error recovery related info */ 131 uint32_t siport_err_tags_SDBERROR; 132 uint32_t siport_err_tags_nonSDBERROR; 133 int siport_pending_ncq_count; 134 135 } si_port_state_t; 136 137 /* Warlock annotation */ 138 _NOTE(MUTEX_PROTECTS_DATA(si_port_state_t::siport_mutex, si_port_state_t)) 139 _NOTE(READ_ONLY_DATA(si_port_state_t::siport_prbpool_dma_handle)) 140 _NOTE(READ_ONLY_DATA(si_port_state_t::siport_sgbpool_dma_handle)) 141 142 143 typedef struct si_ctl_state { 144 145 dev_info_t *sictl_devinfop; 146 147 int sictl_num_ports; /* number of controller ports */ 148 si_port_state_t *sictl_ports[SI_MAX_PORTS]; 149 150 int sictl_devid; /* whether it is 3124 or 3132 */ 151 int sictl_flags; /* some important state of controller */ 152 int sictl_power_level; 153 154 /* pci config space handle */ 155 ddi_acc_handle_t sictl_pci_conf_handle; 156 157 /* mapping into bar 0 */ 158 ddi_acc_handle_t sictl_global_acc_handle; 159 uintptr_t sictl_global_addr; 160 161 /* mapping into bar 1 */ 162 ddi_acc_handle_t sictl_port_acc_handle; 163 uintptr_t sictl_port_addr; 164 165 struct sata_hba_tran *sictl_sata_hba_tran; 166 timeout_id_t sictl_timeout_id; 167 168 kmutex_t sictl_mutex; /* per controller mutex */ 169 170 ddi_intr_handle_t *sictl_htable; /* For array of interrupts */ 171 int sictl_intr_type; /* What type of interrupt */ 172 int sictl_intr_cnt; /* # of intrs count returned */ 173 size_t sictl_intr_size; /* Size of intr array */ 174 uint_t sictl_intr_pri; /* Interrupt priority */ 175 int sictl_intr_cap; /* Interrupt capabilities */ 176 int fm_capabilities; /* FMA capabilities */ 177 178 } si_ctl_state_t; 179 180 /* Warlock annotation */ 181 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 182 si_ctl_state_t::sictl_ports)) 183 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 184 si_ctl_state_t::sictl_power_level)) 185 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 186 si_ctl_state_t::sictl_flags)) 187 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 188 si_ctl_state_t::sictl_timeout_id)) 189 /* 190 * flags for si_flags 191 */ 192 #define SI_PM 0x01 193 #define SI_ATTACH 0x02 194 #define SI_DETACH 0x04 195 #define SI_NO_TIMEOUTS 0x08 196 #define SI_FRAMEWORK_ATTACHED 0x10 /* are we attached to framework ? */ 197 198 /* progress values for si_attach */ 199 #define ATTACH_PROGRESS_NONE (1<<0) 200 #define ATTACH_PROGRESS_STATEP_ALLOC (1<<1) 201 #define ATTACH_PROGRESS_INIT_FMA (1<<2) 202 #define ATTACH_PROGRESS_CONF_HANDLE (1<<3) 203 #define ATTACH_PROGRESS_BAR0_MAP (1<<4) 204 #define ATTACH_PROGRESS_BAR1_MAP (1<<5) 205 #define ATTACH_PROGRESS_INTR_ADDED (1<<6) 206 #define ATTACH_PROGRESS_MUTEX_INIT (1<<7) 207 #define ATTACH_PROGRESS_HW_INIT (1<<8) 208 209 #define SI_10MS_TICKS (drv_usectohz(10000)) /* ticks in 10 millisec */ 210 #define SI_1MS_TICKS (drv_usectohz(1000)) /* ticks in 1 millisec */ 211 #define SI_1MS_USECS (1000) /* usecs in 1 millisec */ 212 #define SI_POLLRATE_SOFT_RESET 1000 213 #define SI_POLLRATE_SSTATUS 10 214 #define SI_POLLRATE_PORTREADY 50 215 #define SI_POLLRATE_SLOTSTATUS 50 216 #define SI_POLLRATE_RECOVERPORTMULT 1000 217 218 #define PORTMULT_CONTROL_PORT 0xf 219 220 /* clearing & setting the n'th bit in a given tag */ 221 #define CLEAR_BIT(tag, bit) (tag &= ~(0x1<<bit)) 222 #define SET_BIT(tag, bit) (tag |= (0x1<<bit)) 223 224 #if DEBUG 225 226 #define SI_DEBUG 1 227 228 #define SIDBG_TEST 0x0001 229 #define SIDBG_INIT 0x0002 230 #define SIDBG_ENTRY 0x0004 231 #define SIDBG_DUMP_PRB 0x0008 232 #define SIDBG_EVENT 0x0010 233 #define SIDBG_POLL_LOOP 0x0020 234 #define SIDBG_PKTCOMP 0x0040 235 #define SIDBG_TIMEOUT 0x0080 236 #define SIDBG_INFO 0x0100 237 #define SIDBG_VERBOSE 0x0200 238 #define SIDBG_INTR 0x0400 239 #define SIDBG_ERRS 0x0800 240 #define SIDBG_COOKIES 0x1000 241 #define SIDBG_POWER 0x2000 242 243 extern uint32_t si_debug_flags; 244 245 #define SIDBG0(flag, softp, format) \ 246 if (si_debug_flags & (flag)) { \ 247 si_log(softp, CE_WARN, format); \ 248 } 249 250 #define SIDBG1(flag, softp, format, arg1) \ 251 if (si_debug_flags & (flag)) { \ 252 si_log(softp, CE_WARN, format, arg1); \ 253 } 254 255 #define SIDBG2(flag, softp, format, arg1, arg2) \ 256 if (si_debug_flags & (flag)) { \ 257 si_log(softp, CE_WARN, format, arg1, arg2); \ 258 } 259 260 #define SIDBG3(flag, softp, format, arg1, arg2, arg3) \ 261 if (si_debug_flags & (flag)) { \ 262 si_log(softp, CE_WARN, format, arg1, arg2, arg3); \ 263 } 264 265 #define SIDBG4(flag, softp, format, arg1, arg2, arg3, arg4) \ 266 if (si_debug_flags & (flag)) { \ 267 si_log(softp, CE_WARN, format, arg1, arg2, arg3, arg4); \ 268 } 269 #else 270 271 #define SIDBG0(flag, dip, frmt) 272 #define SIDBG1(flag, dip, frmt, arg1) 273 #define SIDBG2(flag, dip, frmt, arg1, arg2) 274 #define SIDBG3(flag, dip, frmt, arg1, arg2, arg3) 275 #define SIDBG4(flag, dip, frmt, arg1, arg2, arg3, arg4) 276 277 #endif /* DEBUG */ 278 279 /* Flags controlling the reset behavior */ 280 #define SI_PORT_RESET 0x1 /* Reset the port */ 281 #define SI_DEVICE_RESET 0x2 /* Reset the device, not the port */ 282 #define SI_RESET_NO_EVENTS_UP 0x4 /* Don't send reset events up */ 283 284 #ifdef __cplusplus 285 } 286 #endif 287 288 #endif /* _SI3124VAR_H */ 289