xref: /illumos-gate/usr/src/uts/common/sys/pic.h (revision ddb365bfc9e868ad24ccdcb0dc91af18b10df082)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc.	*/
28 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T	*/
29 /*	  All Rights Reserved  	*/
30 
31 #ifndef _SYS_PIC_H
32 #define	_SYS_PIC_H
33 
34 #include <sys/avintr.h>
35 
36 #ifdef	__cplusplus
37 extern "C" {
38 #endif
39 
40 /* Definitions for 8259 Programmable Interrupt Controller */
41 
42 #define	PIC_NEEDICW4	0x01		/* ICW4 needed */
43 #define	PIC_ICW1BASE	0x10		/* base for ICW1 */
44 #define	PIC_LTIM	0x08		/* level-triggered mode */
45 #define	PIC_86MODE	0x01		/* MCS 86 mode */
46 #define	PIC_AUTOEOI	0x02		/* do auto eoi's */
47 #define	PIC_SLAVEBUF	0x08		/* put slave in buffered mode */
48 #define	PIC_MASTERBUF	0x0C		/* put master in buffered mode */
49 #define	PIC_SPFMODE	0x10		/* special fully nested mode */
50 #define	PIC_READISR	0x0B		/* Read the ISR */
51 #define	PIC_READIRR	0x0A		/* Read the IRR */
52 #define	PIC_NSEOI	0x20		/* Non-specific EOI command */
53 #define	PIC_SEOI	0x60		/* specific EOI command */
54 #define	PIC_SEOI_LVL7	(PIC_SEOI | 0x7)	/* specific EOI for level 7 */
55 
56 #if defined(__i386) || defined(__amd64)
57 #define	PIC_VECTBASE	0x20		/* Vectors for external interrupts */
58 					/* start at 32. */
59 #endif	/* __i386 || __amd64 */
60 
61 /*
62  * Interrupt configuration information specific to a particular computer.
63  * These constants are used to initialize tables in modules/pic/space.c.
64  * NOTE: The master pic must always be pic zero.
65  */
66 
67 #define	NPIC		2		/* 2 PICs */
68 /* Port addresses */
69 #define	MCMD_PORT	0x20		/* master command port */
70 #define	MIMR_PORT	0x21		/* master intr mask register port */
71 #define	SCMD_PORT	0xA0		/* slave command port */
72 #define	SIMR_PORT	0xA1		/* slave intr mask register port */
73 #define	MASTERLINE	0x02		/* slave on IR2 of master PIC */
74 #define	SLAVEBASE	8		/* slave IR0 interrupt number */
75 #define	PICBUFFERED	0		/* PICs not in buffered mode */
76 
77 struct standard_pic {
78 	short c_npic;
79 	uchar_t c_curmask[NPIC];
80 	uchar_t c_iplmask[MAXIPL*NPIC];
81 };
82 
83 #define	CLOCK_VECTOR	0 	/* line at which clock interrupt comes */
84 
85 #ifdef	__cplusplus
86 }
87 #endif
88 
89 #endif /* _SYS_PIC_H */
90