1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PCI_TOOLS_H 28 #define _SYS_PCI_TOOLS_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/modctl.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 /* 39 * Versioning. Have different versions for userland program and drivers, so 40 * they can all stay in sync with each other. 41 */ 42 #define PCITOOL_USER_VERSION 1 43 #define PCITOOL_DRVR_VERSION 1 44 45 /* File suffixes for nexus pcitool nodes. */ 46 #define PCI_MINOR_REG "reg" 47 #define PCI_MINOR_INTR "intr" 48 49 /* 50 * Ioctls for PCI tools. 51 */ 52 #define PCITOOL_IOC (('P' << 24) | ('C' << 16) | ('T' << 8)) 53 54 /* Read/write a device on a PCI bus, in physical space. */ 55 #define PCITOOL_DEVICE_GET_REG (PCITOOL_IOC | 1) 56 #define PCITOOL_DEVICE_SET_REG (PCITOOL_IOC | 2) 57 58 /* Read/write the PCI nexus bridge, in physical space. */ 59 #define PCITOOL_NEXUS_GET_REG (PCITOOL_IOC | 3) 60 #define PCITOOL_NEXUS_SET_REG (PCITOOL_IOC | 4) 61 62 /* Get/set interrupt-CPU mapping for PCI devices. */ 63 #define PCITOOL_DEVICE_GET_INTR (PCITOOL_IOC | 5) 64 #define PCITOOL_DEVICE_SET_INTR (PCITOOL_IOC | 6) 65 66 /* Return the number of supported interrupts on a PCI bus. */ 67 #define PCITOOL_DEVICE_NUM_INTR (PCITOOL_IOC | 7) 68 69 70 /* 71 * This file contains data structures for the pci tool. 72 */ 73 #define PCITOOL_CONFIG 0 74 #define PCITOOL_BAR0 1 75 #define PCITOOL_BAR1 2 76 #define PCITOOL_BAR2 3 77 #define PCITOOL_BAR3 4 78 #define PCITOOL_BAR4 5 79 #define PCITOOL_BAR5 6 80 #define PCITOOL_ROM 7 81 82 /* 83 * Pass this through barnum to signal to use a base addr instead. 84 * This is for platforms which do not have a way to automatically map 85 * a selected bank to a base addr. 86 */ 87 #define PCITOOL_BASE 0xFF 88 89 /* 90 * BAR corresponding to space desired. 91 */ 92 typedef enum { 93 config = PCITOOL_CONFIG, 94 bar0 = PCITOOL_BAR0, 95 bar1 = PCITOOL_BAR1, 96 bar2 = PCITOOL_BAR2, 97 bar3 = PCITOOL_BAR3, 98 bar4 = PCITOOL_BAR4, 99 bar5 = PCITOOL_BAR5, 100 rom = PCITOOL_ROM 101 } pcitool_bars_t; 102 103 104 /* 105 * PCITOOL error numbers. 106 */ 107 108 typedef enum { 109 PCITOOL_SUCCESS = 0x0, 110 PCITOOL_INVALID_CPUID, 111 PCITOOL_INVALID_INO, 112 PCITOOL_PENDING_INTRTIMEOUT, 113 PCITOOL_REGPROP_NOTWELLFORMED, 114 PCITOOL_INVALID_ADDRESS, 115 PCITOOL_NOT_ALIGNED, 116 PCITOOL_OUT_OF_RANGE, 117 PCITOOL_END_OF_RANGE, 118 PCITOOL_ROM_DISABLED, 119 PCITOOL_ROM_WRITE, 120 PCITOOL_IO_ERROR, 121 PCITOOL_INVALID_SIZE 122 } pcitool_errno_t; 123 124 125 /* 126 * PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts. 127 */ 128 typedef struct pcitool_intr_set { 129 uint16_t user_version; /* Userland program version - to krnl */ 130 uint16_t drvr_version; /* Driver version - from kernel */ 131 uint32_t ino; /* interrupt to set - to kernel */ 132 uint32_t cpu_id; /* to: cpu to set / from: old cpu returned */ 133 pcitool_errno_t status; /* from kernel */ 134 } pcitool_intr_set_t; 135 136 137 /* 138 * PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the 139 * ino mapping information. 140 */ 141 142 typedef struct pcitool_intr_dev { 143 uint32_t dev_inst; /* device instance - from kernel */ 144 char driver_name[MAXMODCONFNAME]; /* from kernel */ 145 char path[MAXPATHLEN]; /* device path - from kernel */ 146 } pcitool_intr_dev_t; 147 148 149 typedef struct pcitool_intr_get { 150 uint16_t user_version; /* Userland program version - to krnl */ 151 uint16_t drvr_version; /* Driver version - from kernel */ 152 uint32_t ino; /* interrupt number - to kernel */ 153 uint8_t num_devs_ret; /* room for this # of devs to be */ 154 /* returned - to kernel */ 155 /* # devs returned - from kernel */ 156 uint8_t num_devs; /* # devs on this ino - from kernel */ 157 /* intrs enabled for devs if > 0 */ 158 uint8_t ctlr; /* controller number - from kernel */ 159 uint32_t cpu_id; /* cpu of interrupt - from kernel */ 160 pcitool_errno_t status; /* returned status - from kernel */ 161 pcitool_intr_dev_t dev[1]; /* start of variable device list */ 162 /* from kernel */ 163 } pcitool_intr_get_t; 164 165 /* 166 * Get the size needed to return the number of devices wanted. 167 * Can't say num_devs - 1 as num_devs may be unsigned. 168 */ 169 #define PCITOOL_IGET_SIZE(num_devs) \ 170 (sizeof (pcitool_intr_get_t) - \ 171 sizeof (pcitool_intr_dev_t) + \ 172 (num_devs * sizeof (pcitool_intr_dev_t))) 173 174 /* 175 * Size and endian fields for acc_attr bitmask. 176 */ 177 #define PCITOOL_ACC_ATTR_SIZE_MASK 0x3 178 #define PCITOOL_ACC_ATTR_SIZE_1 0x0 179 #define PCITOOL_ACC_ATTR_SIZE_2 0x1 180 #define PCITOOL_ACC_ATTR_SIZE_4 0x2 181 #define PCITOOL_ACC_ATTR_SIZE_8 0x3 182 #define PCITOOL_ACC_ATTR_SIZE(x) (1 << (x & PCITOOL_ACC_ATTR_SIZE_MASK)) 183 184 #define PCITOOL_ACC_ATTR_ENDN_MASK 0x100 185 #define PCITOOL_ACC_ATTR_ENDN_LTL 0x0 186 #define PCITOOL_ACC_ATTR_ENDN_BIG 0x100 187 #define PCITOOL_ACC_IS_BIG_ENDIAN(x) (x & PCITOOL_ACC_ATTR_ENDN_BIG) 188 189 /* 190 * Data stucture to read and write to pci device registers. 191 * This is the argument to the following ioctls: 192 * PCITOOL_DEVICE_SET/GET_REG 193 * PCITOOL_NEXUS_SET/GET_REG 194 */ 195 typedef struct pcitool_reg { 196 uint16_t user_version; /* Userland program version - to krnl */ 197 uint16_t drvr_version; /* Driver version - from kernel */ 198 uint8_t bus_no; /* pci bus - to kernel */ 199 uint8_t dev_no; /* pci dev - to kernel */ 200 uint8_t func_no; /* pci function - to kernel */ 201 uint8_t barnum; /* bank (DEVCTL_NEXUS_SET/GET_REG) or */ 202 /* BAR from pcitools_bar_t */ 203 /* (DEVCTL_DEVICE_SET/GET_REG) */ 204 /* to kernel */ 205 uint64_t offset; /* to kernel */ 206 uint32_t acc_attr; /* access attributes - to kernel */ 207 uint32_t padding1; /* 8-byte align next uint64_t for X86 */ 208 uint64_t data; /* to/from kernel, 64-bit alignment */ 209 uint32_t status; /* from kernel */ 210 uint32_t padding2; /* 8-byte align next uint64_t for X86 */ 211 uint64_t phys_addr; /* from kernel, 64-bit alignment */ 212 } pcitool_reg_t; 213 214 215 #ifdef __cplusplus 216 } 217 #endif 218 219 #endif /* _SYS_PCI_TOOLS_H */ 220