1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2024 Oxide Computer Company 14 */ 15 16 #ifndef _SYS_NVME_WDC_SN65X_H 17 #define _SYS_NVME_WDC_SN65X_H 18 19 /* 20 * This header defines vendor-specific NVMe interfaces and is not a committed 21 * interface. Its contents and existence are subject to change. 22 * 23 * Vendor-specific definitions for the WDC SN650 and SN655 NVMe devices. 24 */ 25 26 #ifdef __cplusplus 27 extern "C" { 28 #endif 29 30 #define WDC_SN650_DID 0x2720 31 #define WDC_SN655_DID 0x2722 32 33 typedef enum { 34 WDC_SN65X_LOG_OCP_SMART = 0xc0, 35 /* 36 * This uses the common wdc_vul_power_t structure. 37 */ 38 WDC_SN65X_LOG_POWER = 0xc5, 39 /* 40 * This uses the common wdc_vul_temp_t structure. The specific 41 * measurements are recorded in the wdc_log_sn65x_temp_t. 42 */ 43 WDC_SN65X_LOG_TEMP = 0xc6, 44 WDC_SN65X_LOG_UNIQUE_SMART = 0xca 45 } wdc_sn65x_vul_t; 46 47 typedef enum { 48 WDC_SN65X_TEMP_BOARD1 = 0, 49 WDC_SN65X_TEMP_BOARD2, 50 WDC_SN65X_TEMP_BOARD3, 51 WDC_SN65X_TEMP_INLET_LED, 52 WDC_SN65X_TEMP_OUTLET_HOST, 53 WDC_SN65X_TEMP_NAND, 54 WDC_SN65X_TEMP_FE, 55 WDC_SN65X_TEMP_FM0, 56 WDC_SN65X_TEMP_FM1, 57 WDC_SN65X_TEMP_THERMR, 58 WDC_SN65X_TEMP_AVG_THERMR, 59 WDC_SN65X_TEMP_AVG_NAND, 60 WDC_SN65X_TEMP_AVG_FE, 61 WDC_SN65X_TEMP_NSAMPLES 62 } wdc_sn65x_temp_sample_t; 63 64 /* 65 * All data structures must be packed to account for the layout from the various 66 * programmer's manuals. 67 */ 68 #pragma pack(1) 69 70 /* 71 * This structure represents an individual entry in the WDC Customer Unique 72 * SMART log page. 73 */ 74 typedef struct { 75 uint8_t vulp_id; 76 uint8_t vulp_rsvd0[2]; 77 uint8_t vulp_norm; 78 uint8_t vulp_rsvd1[1]; 79 uint8_t vulp_data[4]; 80 uint8_t vulp_pad[3]; 81 } wdc_vul_sn65x_smart_ent_t; 82 83 /* 84 * This structure represents the layout of the 0xca log page. Each entry has an 85 * id that corresponds to it and should be validated when reading this. 86 */ 87 typedef struct { 88 wdc_vul_sn65x_smart_ent_t sm_prog_fail; 89 wdc_vul_sn65x_smart_ent_t sm_erase_fail; 90 wdc_vul_sn65x_smart_ent_t sm_wear_level; 91 wdc_vul_sn65x_smart_ent_t sm_etoe_edet; 92 wdc_vul_sn65x_smart_ent_t sm_crc_err; 93 wdc_vul_sn65x_smart_ent_t sm_timed_wear; 94 wdc_vul_sn65x_smart_ent_t sm_timed_read; 95 wdc_vul_sn65x_smart_ent_t sm_timed_timer; 96 wdc_vul_sn65x_smart_ent_t sm_therm_throt; 97 wdc_vul_sn65x_smart_ent_t sm_retry_buf_over; 98 wdc_vul_sn65x_smart_ent_t sm_pll_lock_loss; 99 wdc_vul_sn65x_smart_ent_t sm_nand_write; 100 wdc_vul_sn65x_smart_ent_t sm_host_write; 101 } wdc_vul_sn65x_smart_t; 102 103 typedef enum { 104 WDC_SN65X_SMART_ENT_ID_PROG_FAIL = 0, 105 WDC_SN65X_SMART_END_ID_ERASE_FAIL, 106 WDC_SN65X_SMART_ENT_ID_WEAR_LEVEL, 107 WDC_SN65X_SMART_ENT_ID_ETOE_ERROR_DET, 108 WDC_SN65X_SMART_ENT_ID_CRC_ERROR, 109 WDC_SN65X_SMART_ENT_ID_TIMED_MEDIA_WEAR, 110 WDC_SN65X_SMART_ENT_ID_TIMED_READS, 111 WDC_SN65X_SMART_ENT_ID_TIMED_TIMER, 112 WDC_SN65X_SMART_ENT_ID_THERMAL_THROTLE, 113 WDC_SN65X_SMART_ENT_ID_RETRY_BUF_OVERFLOW, 114 WDC_SN65X_SMART_ENT_ID_PLL_LOCK_LOSS, 115 WDC_SN65X_SMART_ENT_ID_NAND_WRITTEN, 116 WDC_SN65X_SMART_ENT_ID_HOST_WRITTEN 117 } wdc_sn65x_smart_ent_id_t; 118 119 #pragma pack() /* pack(1) */ 120 121 #ifdef __cplusplus 122 } 123 #endif 124 125 #endif /* _SYS_NVME_WDC_SN65X_H */ 126