1 /* 2 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 #ifndef _SYS_MPI_IOC_H 7 #define _SYS_MPI_IOC_H 8 9 #pragma ident "%Z%%M% %I% %E% SMI" 10 11 #ifdef __cplusplus 12 extern "C" { 13 #endif 14 15 /* 16 * IOCInit message 17 */ 18 typedef struct msg_ioc_init { 19 uint8_t WhoInit; 20 uint8_t Reserved; 21 uint8_t ChainOffset; 22 uint8_t Function; 23 uint8_t Flags; 24 uint8_t MaxDevices; 25 uint8_t MaxBuses; 26 uint8_t MsgFlags; 27 uint32_t MsgContext; 28 uint16_t ReplyFrameSize; 29 uint8_t Reserved1[2]; 30 uint32_t HostMfaHighAddr; 31 uint32_t SenseBufferHighAddr; 32 /* following used in new mpi implementations */ 33 uint32_t ReplyFifoHostSignalingAddr; 34 sge_simple_union_t HostPageBufferSGE; 35 uint16_t MsgVersion; 36 uint16_t HeaderVersion; 37 } msg_ioc_init_t; 38 39 typedef struct msg_ioc_init_reply { 40 uint8_t WhoInit; 41 uint8_t Reserved; 42 uint8_t MsgLength; 43 uint8_t Function; 44 uint8_t Flags; 45 uint8_t MaxDevices; 46 uint8_t MaxBuses; 47 uint8_t MsgFlags; 48 uint32_t MsgContext; 49 uint16_t Reserved2; 50 uint16_t IOCStatus; 51 uint32_t IOCLogInfo; 52 } msg_ioc_init_reply_t; 53 54 /* 55 * WhoInit values 56 */ 57 #define MPI_WHOINIT_NO_ONE 0x00 58 #define MPI_WHOINIT_SYSTEM_BIOS 0x01 59 #define MPI_WHOINIT_ROM_BIOS 0x02 60 #define MPI_WHOINIT_PCI_PEER 0x03 61 #define MPI_WHOINIT_HOST_DRIVER 0x04 62 #define MPI_WHOINIT_MANUFACTURER 0x05 63 64 /* 65 * Flags values 66 */ 67 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE 0x01 68 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL 0x02 69 70 #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) 71 #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) 72 #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) 73 #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0) 74 75 #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00) 76 #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8) 77 #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF) 78 #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0) 79 80 81 /* 82 * IOC Facts message 83 */ 84 typedef struct msg_ioc_facts { 85 uint8_t Reserved[2]; 86 uint8_t ChainOffset; 87 uint8_t Function; 88 uint8_t Reserved1[3]; 89 uint8_t MsgFlags; 90 uint32_t MsgContext; 91 } msg_ioc_facts_t; 92 93 /* 94 * FW version 95 */ 96 typedef struct mpi_fw_version_struct { 97 uint8_t Dev; 98 uint8_t Unit; 99 uint8_t Minor; 100 uint8_t Major; 101 } mpi_fw_version_struct_t; 102 103 typedef union mpi_fw_version { 104 mpi_fw_version_struct_t Struct; 105 uint32_t Word; 106 } mpi_fw_version_t; 107 108 /* 109 * IOC Facts Reply 110 */ 111 typedef struct msg_ioc_facts_reply { 112 uint16_t MsgVersion; 113 uint8_t MsgLength; 114 uint8_t Function; 115 uint16_t HeaderVersion; 116 uint8_t IOCNumber; 117 uint8_t MsgFlags; 118 uint32_t MsgContext; 119 uint16_t IOCExceptions; 120 uint16_t IOCStatus; 121 uint32_t IOCLogInfo; 122 uint8_t MaxChainDepth; 123 uint8_t WhoInit; 124 uint8_t BlockSize; 125 uint8_t Flags; 126 uint16_t ReplyQueueDepth; 127 uint16_t RequestFrameSize; 128 uint16_t Reserved_0101_FWVersion; /* obsolete */ 129 uint16_t ProductID; 130 uint32_t CurrentHostMfaHighAddr; 131 uint16_t GlobalCredits; 132 uint8_t NumberOfPorts; 133 uint8_t EventState; 134 uint32_t CurrentSenseBufferHighAddr; 135 uint16_t CurReplyFrameSize; 136 uint8_t MaxDevices; 137 uint8_t MaxBuses; 138 uint32_t FWImageSize; 139 uint32_t IOCCapabilities; 140 mpi_fw_version_t FWVersion; 141 /* following used in newer mpi implementations */ 142 uint16_t HighPriorityQueueDepth; 143 uint16_t Reserved2; 144 sge_simple_union_t HostPageBufferSGE; 145 } msg_ioc_facts_reply_t; 146 147 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK 0xFF00 148 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK 0x00FF 149 150 #define MPI_IOCFACTS_HEADERVERSION_UNIT_MASK 0xFF00 151 #define MPI_IOCFACTS_HEADERVERSION_DEV_MASK 0x00FF 152 153 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL 0x0001 154 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID 0x0002 155 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL 0x0004 156 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL 0x0008 157 158 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT 0x01 159 160 #define MPI_IOCFACTS_EVENTSTATE_DISABLED 0x00 161 #define MPI_IOCFACTS_EVENTSTATE_ENABLED 0x01 162 163 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q 0x00000001 164 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL 0x00000002 165 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING 0x00000004 166 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER 0x00000008 167 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER 0x00000010 168 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER 0x00000020 169 #define MPI_IOCFACTS_CAPABILITY_EEDP 0x00000040 170 171 /* 172 * Port Facts message and Reply 173 */ 174 typedef struct msg_port_facts { 175 uint8_t Reserved[2]; 176 uint8_t ChainOffset; 177 uint8_t Function; 178 uint8_t Reserved1[2]; 179 uint8_t PortNumber; 180 uint8_t MsgFlags; 181 uint32_t MsgContext; 182 } msg_port_facts_t; 183 184 typedef struct msg_port_facts_reply { 185 uint16_t Reserved; 186 uint8_t MsgLength; 187 uint8_t Function; 188 uint16_t Reserved1; 189 uint8_t PortNumber; 190 uint8_t MsgFlags; 191 uint32_t MsgContext; 192 uint16_t Reserved2; 193 uint16_t IOCStatus; 194 uint32_t IOCLogInfo; 195 uint8_t Reserved3; 196 uint8_t PortType; 197 uint16_t MaxDevices; 198 uint16_t PortSCSIID; 199 uint16_t ProtocolFlags; 200 uint16_t MaxPostedCmdBuffers; 201 uint16_t MaxPersistentIDs; 202 uint16_t MaxLanBuckets; 203 uint16_t Reserved4; 204 uint32_t Reserved5; 205 } msg_port_facts_reply_t; 206 207 /* 208 * PortTypes values 209 */ 210 #define MPI_PORTFACTS_PORTTYPE_INACTIVE 0x00 211 #define MPI_PORTFACTS_PORTTYPE_SCSI 0x01 212 #define MPI_PORTFACTS_PORTTYPE_FC 0x10 213 #define MPI_PORTFACTS_PORTTYPE_ISCSI 0x20 214 #define MPI_PORTFACTS_PORTTYPE_SAS 0x30 215 216 /* 217 * ProtocolFlags values 218 */ 219 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR 0x01 220 #define MPI_PORTFACTS_PROTOCOL_LAN 0x02 221 #define MPI_PORTFACTS_PROTOCOL_TARGET 0x04 222 #define MPI_PORTFACTS_PROTOCOL_INITIATOR 0x08 223 224 /* 225 * Port Enable Message 226 */ 227 typedef struct msg_port_enable { 228 uint8_t Reserved[2]; 229 uint8_t ChainOffset; 230 uint8_t Function; 231 uint8_t Reserved1[2]; 232 uint8_t PortNumber; 233 uint8_t MsgFlags; 234 uint32_t MsgContext; 235 } msg_port_enable_t; 236 237 typedef struct msg_port_enable_reply { 238 uint8_t Reserved[2]; 239 uint8_t MsgLength; 240 uint8_t Function; 241 uint8_t Reserved1[2]; 242 uint8_t PortNumber; 243 uint8_t MsgFlags; 244 uint32_t MsgContext; 245 uint16_t Reserved2; 246 uint16_t IOCStatus; 247 uint32_t IOCLogInfo; 248 } msg_port_enable_reply_t; 249 250 251 /* 252 * Event Notification messages 253 */ 254 typedef struct msg_event_notify { 255 uint8_t Switch; 256 uint8_t Reserved; 257 uint8_t ChainOffset; 258 uint8_t Function; 259 uint8_t Reserved1[3]; 260 uint8_t MsgFlags; 261 uint32_t MsgContext; 262 } msg_event_notify_t; 263 264 /* 265 * Event Notification Reply 266 */ 267 typedef struct msg_event_notify_reply { 268 uint16_t EventDataLength; 269 uint8_t MsgLength; 270 uint8_t Function; 271 uint8_t Reserved1[2]; 272 uint8_t AckRequired; 273 uint8_t MsgFlags; 274 uint32_t MsgContext; 275 uint8_t Reserved2[2]; 276 uint16_t IOCStatus; 277 uint32_t IOCLogInfo; 278 uint32_t Event; 279 uint32_t EventContext; 280 uint32_t Data[1]; 281 } msg_event_notify_reply_t; 282 283 /* 284 * Event Acknowledge 285 */ 286 typedef struct msg_event_ack { 287 uint8_t Reserved[2]; 288 uint8_t ChainOffset; 289 uint8_t Function; 290 uint8_t Reserved1[3]; 291 uint8_t MsgFlags; 292 uint32_t MsgContext; 293 uint32_t Event; 294 uint32_t EventContext; 295 } msg_event_ack_t; 296 297 typedef struct msg_event_ack_reply { 298 uint8_t Reserved[2]; 299 uint8_t Function; 300 uint8_t MsgLength; 301 uint8_t Reserved1[3]; 302 uint8_t MsgFlags; 303 uint32_t MsgContext; 304 uint16_t Reserved2; 305 uint16_t IOCStatus; 306 uint32_t IOCLogInfo; 307 } msg_event_ack_reply_t; 308 309 /* 310 * Switch 311 */ 312 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF 0x00 313 #define MPI_EVENT_NOTIFICATION_SWITCH_ON 0x01 314 315 /* 316 * Event 317 */ 318 #define MPI_EVENT_NONE 0x00000000 319 #define MPI_EVENT_LOG_DATA 0x00000001 320 #define MPI_EVENT_STATE_CHANGE 0x00000002 321 #define MPI_EVENT_UNIT_ATTENTION 0x00000003 322 #define MPI_EVENT_IOC_BUS_RESET 0x00000004 323 #define MPI_EVENT_EXT_BUS_RESET 0x00000005 324 #define MPI_EVENT_RESCAN 0x00000006 325 #define MPI_EVENT_LINK_STATUS_CHANGE 0x00000007 326 #define MPI_EVENT_LOOP_STATE_CHANGE 0x00000008 327 #define MPI_EVENT_LOGOUT 0x00000009 328 #define MPI_EVENT_EVENT_CHANGE 0x0000000A 329 #define MPI_EVENT_INTEGRATED_RAID 0x0000000B 330 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE 0x0000000C 331 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED 0x0000000D 332 #define MPI_EVENT_QUEUE_FULL 0x0000000E 333 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE 0x0000000F 334 #define MPI_EVENT_SAS_SES 0x00000010 335 #define MPI_EVENT_PERSISTENT_TABLE_FULL 0x00000011 336 #define MPI_EVENT_SAS_PHY_LINK_STATUS 0x00000012 337 #define MPI_EVENT_SAS_DISCOVERY_ERROR 0x00000013 338 339 /* 340 * AckRequired field values 341 */ 342 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED 0x00 343 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED 0x01 344 345 /* 346 * Eventchange event data 347 */ 348 typedef struct event_data_event_change { 349 uint8_t EventState; 350 uint8_t Reserved; 351 uint16_t Reserved1; 352 } event_data_event_change_t; 353 354 /* 355 * SCSI Event data for Port, Bus and Device forms) 356 */ 357 typedef struct event_data_scsi { 358 uint8_t TargetID; 359 uint8_t BusPort; 360 uint16_t Reserved; 361 } event_data_scsi_t; 362 363 /* 364 * SCSI Device Status Change Event data 365 */ 366 typedef struct event_data_scsi_device_status_change { 367 uint8_t TargetID; 368 uint8_t Bus; 369 uint8_t ReasonCode; 370 uint8_t LUN; 371 uint8_t ASC; 372 uint8_t ASCQ; 373 uint16_t Reserved; 374 } event_data_scsi_device_status_change_t; 375 376 /* 377 * SCSI Device Status Change Event data ReasonCode values 378 */ 379 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED 0x03 380 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING 0x04 381 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA 0x05 382 383 /* 384 * SAS Device Status Change event data 385 */ 386 typedef struct event_data_sas_device_status_change { 387 uint8_t TargetID; 388 uint8_t Bus; 389 uint8_t ReasonCode; 390 uint8_t Reserved; 391 uint8_t ASC; 392 uint8_t ASCQ; 393 uint16_t DevHandle; 394 uint32_t DeviceInfo; 395 uint16_t ParentDevHandle; 396 uint8_t PhyNum; 397 uint8_t Reserved1; 398 uint64_t SASAddress; 399 } event_data_sas_device_status_change_t; 400 401 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED 0x03 402 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING 0x04 403 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA 0x05 404 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED 0x06 405 406 /* 407 * SCSI event data for queue full event 408 */ 409 typedef struct event_data_queue_full { 410 uint8_t TargetID; 411 uint8_t Bus; 412 uint16_t CurrentDepth; 413 } event_data_queue_full_t; 414 415 /* 416 * MPI Link Status Change Event data 417 */ 418 typedef struct event_data_link_status { 419 uint8_t State; 420 uint8_t Reserved; 421 uint16_t Reserved1; 422 uint8_t Reserved2; 423 uint8_t Port; 424 uint16_t Reserved3; 425 } event_data_link_status_t; 426 427 #define MPI_EVENT_LINK_STATUS_FAILURE 0x00000000 428 #define MPI_EVENT_LINK_STATUS_ACTIVE 0x00000001 429 430 /* MPI Loop State Change Event data */ 431 432 typedef struct event_data_loop_state { 433 uint8_t Character4; 434 uint8_t Character3; 435 uint8_t Type; 436 uint8_t Reserved; 437 uint8_t Reserved1; 438 uint8_t Port; 439 uint16_t Reserved2; 440 } event_data_loop_state_t; 441 442 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP 0x0001 443 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE 0x0002 444 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB 0x0003 445 446 /* 447 * MPI LOGOUT Event data 448 */ 449 typedef struct event_data_logout { 450 uint32_t NPortID; 451 uint8_t Reserved; 452 uint8_t Port; 453 uint16_t Reserved1; 454 } event_data_logout_t; 455 456 /* 457 * MPI RAID Status Change Event Data 458 */ 459 typedef struct event_data_raid { 460 uint8_t VolumeID; 461 uint8_t VolumeBus; 462 uint8_t ReasonCode; 463 uint8_t PhysDiskNum; 464 uint8_t ASC; 465 uint8_t ASCQ; 466 uint16_t Reserved; 467 uint32_t SettingsStatus; 468 } event_data_raid_t; 469 470 /* MPI RAID Status Change Event data ReasonCode values */ 471 #define MPI_EVENT_RAID_RC_VOLUME_CREATED 0x00 472 #define MPI_EVENT_RAID_RC_VOLUME_DELETED 0x01 473 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED 0x02 474 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED 0x03 475 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED 0x04 476 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED 0x05 477 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED 0x06 478 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED 0x07 479 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED 0x08 480 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED 0x09 481 #define MPI_EVENT_RAID_RC_SMART_DATA 0x0A 482 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED 0x0B 483 484 /* 485 * SAS Phy link down event data 486 */ 487 typedef struct event_data_sas_phy_link_status { 488 uint8_t PhyNum; 489 uint8_t LinkRates; 490 uint16_t DevHandle; 491 uint64_t SASAddress; 492 } event_data_sas_phy_link_status_t; 493 494 #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK 0xF0 495 #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT 4 496 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK 0x0F 497 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT 0 498 #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN 0x00 499 #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED 0x01 500 #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION 0x02 501 #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE 0x03 502 #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 0x08 503 #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 0x09 504 505 /* 506 * Firmware Load Messages 507 */ 508 509 /* 510 * Firmware download message and associated structures 511 */ 512 typedef struct msg_fw_download { 513 uint8_t ImageType; 514 uint8_t Reserved; 515 uint8_t ChainOffset; 516 uint8_t Function; 517 uint8_t Reserved1[3]; 518 uint8_t MsgFlags; 519 uint32_t MsgContext; 520 sge_mpi_union_t SGL; 521 } msg_fw_download_t; 522 523 #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT 0x01 524 525 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED 0x00 526 #define MPI_FW_DOWNLOAD_ITYPE_FW 0x01 527 #define MPI_FW_DOWNLOAD_ITYPE_BIOS 0x02 528 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA 0x03 529 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER 0x04 530 531 typedef struct fw_download_tcsge { 532 uint8_t Reserved; 533 uint8_t ContextSize; 534 uint8_t DetailsLength; 535 uint8_t Flags; 536 uint32_t Reserved_0100_Checksum; /* obsolete */ 537 uint32_t ImageOffset; 538 uint32_t ImageSize; 539 } fw_download_tcsge_t; 540 541 typedef struct msg_fw_download_reply { 542 uint8_t ImageType; 543 uint8_t Reserved; 544 uint8_t MsgLength; 545 uint8_t Function; 546 uint8_t Reserved1[3]; 547 uint8_t MsgFlags; 548 uint32_t MsgContext; 549 uint16_t Reserved2; 550 uint16_t IOCStatus; 551 uint32_t IOCLogInfo; 552 } msg_fw_download_reply_t; 553 554 /* 555 * Firmware upload messages and associated structures 556 */ 557 typedef struct msg_fw_upload { 558 uint8_t ImageType; 559 uint8_t Reserved; 560 uint8_t ChainOffset; 561 uint8_t Function; 562 uint8_t Reserved1[3]; 563 uint8_t MsgFlags; 564 uint32_t MsgContext; 565 sge_mpi_union_t SGL; 566 } msg_fw_upload_t; 567 568 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM 0x00 569 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH 0x01 570 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH 0x02 571 #define MPI_FW_UPLOAD_ITYPE_NVDATA 0x03 572 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER 0x04 573 574 typedef struct fw_upload_tcsge { 575 uint8_t Reserved; 576 uint8_t ContextSize; 577 uint8_t DetailsLength; 578 uint8_t Flags; 579 uint32_t Reserved1; 580 uint32_t ImageOffset; 581 uint32_t ImageSize; 582 } fw_upload_tcsge_t; 583 584 typedef struct msg_fw_upload_reply { 585 uint8_t ImageType; 586 uint8_t Reserved; 587 uint8_t MsgLength; 588 uint8_t Function; 589 uint8_t Reserved1[3]; 590 uint8_t MsgFlags; 591 uint32_t MsgContext; 592 uint16_t Reserved2; 593 uint16_t IOCStatus; 594 uint32_t IOCLogInfo; 595 uint32_t ActualImageSize; 596 } msg_fw_upload_reply_t; 597 598 typedef struct msg_fw_header { 599 uint32_t ArmBranchInstruction0; 600 uint32_t Signature0; 601 uint32_t Signature1; 602 uint32_t Signature2; 603 uint32_t ArmBranchInstruction1; 604 uint32_t ArmBranchInstruction2; 605 uint32_t Reserved; 606 uint32_t Checksum; 607 uint16_t VendorId; 608 uint16_t ProductId; 609 mpi_fw_version_t FWVersion; 610 uint32_t SeqCodeVersion; 611 uint32_t ImageSize; 612 uint32_t NextImageHeaderOffset; 613 uint32_t LoadStartAddress; 614 uint32_t IopResetVectorValue; 615 uint32_t IopResetRegAddr; 616 uint32_t VersionNameWhat; 617 uint8_t VersionName[32]; 618 uint32_t VendorNameWhat; 619 uint8_t VendorName[32]; 620 } msg_fw_header_t; 621 622 #define MPI_FW_HEADER_WHAT_SIGNATURE 0x29232840 623 624 /* defines for using the ProductId field */ 625 #define MPI_FW_HEADER_PID_TYPE_MASK 0xF000 626 #define MPI_FW_HEADER_PID_TYPE_SCSI 0x0000 627 #define MPI_FW_HEADER_PID_TYPE_FC 0x1000 628 629 #define MPI_FW_HEADER_PID_PROD_MASK 0x0F00 630 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI 0x0100 631 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI 0x0200 632 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI 0x0300 633 #define MPI_FW_HEADER_PID_PROD_IM_SCSI 0x0400 634 #define MPI_FW_HEADER_PID_PROD_IS_SCSI 0x0500 635 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI 0x0600 636 #define MPI_FW_HEADER_PID_PROD_IR_SCSI 0x0700 637 638 #define MPI_FW_HEADER_PID_FAMILY_MASK 0x00FF 639 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI 0x0001 640 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI 0x0002 641 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI 0x0003 642 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI 0x0004 643 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI 0x0005 644 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI 0x0006 645 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI 0x0007 646 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI 0x0008 647 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI 0x0009 648 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI 0x000A 649 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI 0x000B 650 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI 0x000C 651 #define MPI_FW_HEADER_PID_FAMILY_909_FC 0x0000 652 #define MPI_FW_HEADER_PID_FAMILY_919_FC 0x0001 653 #define MPI_FW_HEADER_PID_FAMILY_919X_FC 0x0002 654 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS 0x0001 655 #define MPI_FW_HEADER_PID_FAMILY_1068_SAS 0x0002 656 #define MPI_FW_HEADER_PID_FAMILY_1078_SAS 0x0003 657 658 typedef struct mpi_ext_image_header { 659 uint8_t ImageType; 660 uint8_t Reserved; 661 uint16_t Reserved1; 662 uint32_t Checksum; 663 uint32_t ImageSize; 664 uint32_t NextImageHeaderOffset; 665 uint32_t LoadStartAddress; 666 uint32_t Reserved2; 667 } mpi_ext_image_header_t; 668 669 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED 0x00 670 #define MPI_EXT_IMAGE_TYPE_FW 0x01 671 #define MPI_EXT_IMAGE_TYPE_NVDATA 0x03 672 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER 0x04 673 674 #ifdef __cplusplus 675 } 676 #endif 677 678 #endif /* _SYS_MPI_IOC_H */ 679